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Diffstat (limited to 'cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h')
-rw-r--r--cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h49
1 files changed, 44 insertions, 5 deletions
diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h
index 31ec0ac8bb..da38ecacf7 100644
--- a/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h
+++ b/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (c) 2013 embedded brains GmbH
+ * Copyright (c) 2013 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -50,6 +50,8 @@
#define CPU_INTERRUPT_FRAME_SIZE 52
+#define CPU_THREAD_LOCAL_STORAGE_VARIANT 20
+
#ifndef ASM
#ifdef __cplusplus
@@ -58,28 +60,65 @@ extern "C" {
RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error );
-RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern )
+static inline void _CPU_Context_volatile_clobber( uintptr_t pattern )
{
+ (void) pattern;
+
/* TODO */
}
-RTEMS_INLINE_ROUTINE void _CPU_Context_validate( uintptr_t pattern )
+static inline void _CPU_Context_validate( uintptr_t pattern )
{
+ (void) pattern;
+
while (1) {
/* TODO */
}
}
-RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void )
+static inline void _CPU_Instruction_illegal( void )
{
__asm__ volatile ( ".word 0" );
}
-RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void )
+static inline void _CPU_Instruction_no_operation( void )
{
__asm__ volatile ( "nop" );
}
+static inline void _CPU_Use_thread_local_storage(
+ const Context_Control *context
+)
+{
+ uint32_t tmp;
+ uint32_t cpu_index;
+
+#ifdef RTEMS_SMP
+ cpu_index = _CPU_SMP_Get_current_processor();
+#else
+ cpu_index = 0;
+#endif
+
+ __asm__ volatile (
+ "movl " RTEMS_XSTRING( I386_CONTEXT_CONTROL_GS_0_OFFSET ) "(%2), %0\n"
+ "movl %0, _Global_descriptor_table+24(,%1,8)\n"
+ "movl " RTEMS_XSTRING( I386_CONTEXT_CONTROL_GS_1_OFFSET ) "(%2), %0\n"
+ "movl %0, _Global_descriptor_table+28(,%1,8)\n"
+ "leal 24(,%1,8), %0\n"
+ "movl %0, %%gs\n"
+ : "=&r" ( tmp )
+ : "r" ( cpu_index ), "r" ( context )
+ : "memory"
+ );
+}
+
+static inline void *_CPU_Get_TLS_thread_pointer(
+ const Context_Control *context
+)
+{
+ return (void *) &context->gs;
+}
+
#ifdef __cplusplus
}
#endif