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-rw-r--r--cpukit/score/cpu/h8300/cpu.c134
1 files changed, 0 insertions, 134 deletions
diff --git a/cpukit/score/cpu/h8300/cpu.c b/cpukit/score/cpu/h8300/cpu.c
deleted file mode 100644
index 36c41a256a..0000000000
--- a/cpukit/score/cpu/h8300/cpu.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/**
- * @file
- *
- * @brief H8300 CPU Dependent Source
- */
-
-/*
- * COPYRIGHT (c) 1989-1999.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <rtems/system.h>
-#include <rtems/score/isr.h>
-#include <rtems/score/wkspace.h>
-
-/* _CPU_Initialize
- *
- * This routine performs processor dependent initialization.
- *
- * INPUT PARAMETERS: NONE
- */
-
-
-void _CPU_Initialize(void)
-{
- /*
- * If there is not an easy way to initialize the FP context
- * during Context_Initialize, then it is usually easier to
- * save an "uninitialized" FP context here and copy it to
- * the task's during Context_Initialize.
- */
-
- /* FP context initialization support goes here */
-}
-
-uint32_t _CPU_ISR_Get_level( void )
-{
- unsigned int _ccr;
-
-#if defined(__H8300__)
-#warning "How do we get ccr on base CPU models"
-#else
- __asm__ volatile ( "stc ccr, %0" : "=m" (_ccr) : );
-#endif
-
- if ( _ccr & 0x80 )
- return 1;
- return 0;
-}
-
-/*
- * _CPU_ISR_install_raw_handler
- */
-
-void _CPU_ISR_install_raw_handler(
- uint32_t vector,
- proc_ptr new_handler,
- proc_ptr *old_handler
-)
-{
- /*
- * This is where we install the interrupt handler into the "raw" interrupt
- * table used by the CPU to dispatch interrupt handlers.
- * Use Debug level IRQ Handlers
- */
- H8BD_Install_IRQ(vector,new_handler,old_handler);
-}
-
-void _CPU_ISR_install_vector(
- uint32_t vector,
- proc_ptr new_handler,
- proc_ptr *old_handler
-)
-{
- *old_handler = _ISR_Vector_table[ vector ];
-
- /*
- * If the interrupt vector table is a table of pointer to isr entry
- * points, then we need to install the appropriate RTEMS interrupt
- * handler for this vector number.
- */
-
- _CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
-
- /*
- * We put the actual user ISR address in '_ISR_vector_table'. This will
- * be used by the _ISR_Handler so the user gets control.
- */
-
- _ISR_Vector_table[ vector ] = new_handler;
-}
-
-/*
- * _CPU_Install_interrupt_stack
- */
-
-void _CPU_Install_interrupt_stack( void )
-{
-}
-
-/*
- * _CPU_Thread_Idle_body
- *
- * NOTES:
- *
- * 1. This is the same as the regular CPU independent algorithm.
- *
- * 2. If you implement this using a "halt", "idle", or "shutdown"
- * instruction, then don't forget to put it in an infinite loop.
- *
- * 3. Be warned. Some processors with onboard DMA have been known
- * to stop the DMA if the CPU were put in IDLE mode. This might
- * also be a problem with other on-chip peripherals. So use this
- * hook with caution.
- */
-
-#if 0
-void *_CPU_Thread_Idle_body( uintptr_t ignored )
-{
-
- for( ; ; )
- IDLE_Monitor();
- /* __asm__ (" sleep \n"); */
- /* insert your "halt" instruction here */ ;
-}
-#endif