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-rw-r--r--cpukit/score/cpu/bfin/rtems/bfin/bf52x.h23
-rw-r--r--cpukit/score/cpu/bfin/rtems/bfin/bf533.h20
-rw-r--r--cpukit/score/cpu/bfin/rtems/bfin/bfin.h10
3 files changed, 31 insertions, 22 deletions
diff --git a/cpukit/score/cpu/bfin/rtems/bfin/bf52x.h b/cpukit/score/cpu/bfin/rtems/bfin/bf52x.h
index 3c5bf7b3ef..7b4a41ac05 100644
--- a/cpukit/score/cpu/bfin/rtems/bfin/bf52x.h
+++ b/cpukit/score/cpu/bfin/rtems/bfin/bf52x.h
@@ -1,13 +1,17 @@
/**
- *@file bf52x.h
+ * @file
*
- * This file defines basic MMR for the Blackfin 52x CPU.
- * The MMR have been taken from the ADSP-BF52x Blackfin Processor
- * Hardware Reference from Analog Devices. Mentioned Chapters
- * refer to this Documentation.
+ * @brief Basic MMR for the Blackfin 52x CPU
*
- * Based on bf533.h
+ * This file defines basic MMR for the Blackfin 52x CPU.
+ * The MMR have been taken from the ADSP-BF52x Blackfin Processor
+ * Hardware Reference from Analog Devices. Mentioned Chapters
+ * refer to this Documentation.
*
+ * Based on bf533.h
+ */
+
+/*
* COPYRIGHT (c) 2006.
* Atos Automacao Industrial LTDA.
* modified by Alain Schaefer <alain.schaefer@easc.ch>
@@ -18,11 +22,8 @@
* http://www.rtems.com/license/LICENSE.
*
*
- * @author Rohan Kangralkar, ECE Department Northeastern University
- * @date 02/15/2011
- *
- * HISTORY:
- *
+ * Author: Rohan Kangralkar, ECE Department Northeastern University
+ * Date: 02/15/2011
*/
#ifndef _RTEMS_BFIN_52x_H
diff --git a/cpukit/score/cpu/bfin/rtems/bfin/bf533.h b/cpukit/score/cpu/bfin/rtems/bfin/bf533.h
index 005a6fbb81..3ebff2cd90 100644
--- a/cpukit/score/cpu/bfin/rtems/bfin/bf533.h
+++ b/cpukit/score/cpu/bfin/rtems/bfin/bf533.h
@@ -1,14 +1,18 @@
-/* bfin.h
+/**
+ * @file
*
- * This file defines basic MMR for the Blackfin 531/532/533 CPU.
- * The MMR have been taken from the ADSP-BF533 Blackfin Processor
- * Hardware Reference from Analog Devices. Mentioned Chapters
- * refer to this Documentation.
+ * @brief Basic MMR for the Blackfin 531/532/533 CPU
*
- * The Blackfins MMRs are divided into core MMRs (0xFFE0 0000–0xFFFF FFFF)
- * and System MMRs (0xFFC0 0000–0xFFE0 0000). The core MMRs are defined
- * in bfin.h which is included.
+ * This file defines basic MMR for the Blackfin 531/532/533 CPU.
+ * The MMR have been taken from the ADSP-BF533 Blackfin Processor
+ * Hardware Reference from Analog Devices. Mentioned Chapters
+ * refer to this Documentation.
*
+ * The Blackfins MMRs are divided into core MMRs (0xFFE0 0000–0xFFFF FFFF)
+ * and System MMRs (0xFFC0 0000–0xFFE0 0000). The core MMRs are defined
+ * in bfin.h which is included.
+ */
+/*
* COPYRIGHT (c) 2006.
* Atos Automacao Industrial LTDA.
* modified by Alain Schaefer <alain.schaefer@easc.ch>
diff --git a/cpukit/score/cpu/bfin/rtems/bfin/bfin.h b/cpukit/score/cpu/bfin/rtems/bfin/bfin.h
index f3d6341d5c..ad7631d054 100644
--- a/cpukit/score/cpu/bfin/rtems/bfin/bfin.h
+++ b/cpukit/score/cpu/bfin/rtems/bfin/bfin.h
@@ -1,8 +1,12 @@
-/* bfin.h
+/**
+ * @file
*
- * This file defines Macros for MMR register common to all Blackfin
- * Processors.
+ * @brief Macros for MMR register common to all Blackfin Processors
*
+ * This file defines Macros for MMR register common to all Blackfin
+ * Processors.
+ */
+/*
* COPYRIGHT (c) 2006 by Atos Automacao Industrial Ltda.
* modified by Alain Schaefer <alain.schaefer@easc.ch>
* and Antonio Giovanini <antonio@atos.com.br>