diff options
Diffstat (limited to '')
-rw-r--r-- | cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h index 4f20113b71..04d23f0ea7 100644 --- a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h @@ -3,11 +3,14 @@ /** * @file * - * @brief CPU Port Implementation API + * @ingroup RTEMSScoreCPUARM + * + * @brief This header file defines implementation interfaces pertaining to the + * port of the executive to the ARM architecture. */ /* - * Copyright (c) 2013, 2016 embedded brains GmbH + * Copyright (C) 2013, 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -60,6 +63,8 @@ #endif /* ARM_MULTILIB_ARCH_V4 */ +#define CPU_THREAD_LOCAL_STORAGE_VARIANT 11 + #ifndef ASM #ifdef __cplusplus @@ -150,17 +155,17 @@ void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); -RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void ) +static inline void _CPU_Instruction_illegal( void ) { __asm__ volatile ( "udf" ); } -RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void ) +static inline void _CPU_Instruction_no_operation( void ) { __asm__ volatile ( "nop" ); } -RTEMS_INLINE_ROUTINE void _CPU_Use_thread_local_storage( +static inline void _CPU_Use_thread_local_storage( const Context_Control *context ) { @@ -173,6 +178,13 @@ RTEMS_INLINE_ROUTINE void _CPU_Use_thread_local_storage( #endif } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + return (void *) context->thread_id; +} + #ifdef __cplusplus } #endif |