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-rw-r--r--cpukit/score/cpu/arm/cpu.c32
1 files changed, 5 insertions, 27 deletions
diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c
index b685c4d6ab..c27f4de9f9 100644
--- a/cpukit/score/cpu/arm/cpu.c
+++ b/cpukit/score/cpu/arm/cpu.c
@@ -5,7 +5,10 @@
*
* @ingroup RTEMSScoreCPUARM
*
- * @brief ARM architecture support implementation.
+ * @brief This source file contains static assertions to ensure the consistency
+ * of interfaces used in C and assembler and it contains the ARM-specific
+ * implementation of _CPU_Initialize(), _CPU_ISR_Get_level(),
+ * _CPU_ISR_Set_level(), _CPU_Context_Initialize(), and _CPU_Fatal_halt().
*/
/*
@@ -17,7 +20,7 @@
*
* Copyright (c) 2007 Ray xu <rayx.cn@gmail.com>
*
- * Copyright (c) 2009, 2017 embedded brains GmbH
+ * Copyright (C) 2009, 2017 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -156,31 +159,6 @@ uint32_t _CPU_ISR_Get_level( void )
return ( level & ARM_PSR_I ) != 0;
}
-void _CPU_ISR_install_vector(
- uint32_t vector,
- CPU_ISR_handler new_handler,
- CPU_ISR_handler *old_handler
-)
-{
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Warray-bounds"
- /* Redirection table starts at the end of the vector table */
- CPU_ISR_handler volatile *table = (CPU_ISR_handler *) (MAX_EXCEPTIONS * 4);
-
- CPU_ISR_handler current_handler = table [vector];
-
- /* The current handler is now the old one */
- if (old_handler != NULL) {
- *old_handler = current_handler;
- }
-
- /* Write only if necessary to avoid writes to a maybe read-only memory */
- if (current_handler != new_handler) {
- table [vector] = new_handler;
- }
-#pragma GCC diagnostic pop
-}
-
void _CPU_Initialize( void )
{
/* Do nothing */