diff options
Diffstat (limited to '')
-rw-r--r-- | cpukit/score/cpu/aarch64/include/rtems/score/cpu.h | 80 |
1 files changed, 56 insertions, 24 deletions
diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h b/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h index dacc18638e..aa4f90f1a8 100644 --- a/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h @@ -43,6 +43,7 @@ #endif #include <rtems/score/aarch64.h> #include <libcpu/vectors.h> +#include <limits.h> /** * @addtogroup RTEMSScoreCPUAArch64 @@ -101,7 +102,7 @@ #define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE -#define CPU_STACK_MINIMUM_SIZE (1024 * 10) +#define CPU_STACK_MINIMUM_SIZE (1024 * 8) /* This could be either 4 or 8, depending on the ABI in use. * Could also use __LP64__ or __ILP32__ */ @@ -134,9 +135,9 @@ #ifdef RTEMS_SMP #if defined(AARCH64_MULTILIB_VFP) - #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0x70 + #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0xb8 #else - #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0x30 + #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0x78 #endif #endif @@ -156,7 +157,14 @@ extern "C" { #endif +/* + This is to fix the following warning + ISO C does not support 'uint128_t' types +*/ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" typedef unsigned __int128 uint128_t; +#pragma GCC diagnostic pop typedef struct { uint64_t register_x19; @@ -191,12 +199,12 @@ typedef struct { static inline void _AARCH64_Data_memory_barrier( void ) { - __asm__ volatile ( "dmb LD" : : : "memory" ); + __asm__ volatile ( "dmb SY" : : : "memory" ); } static inline void _AARCH64_Data_synchronization_barrier( void ) { - __asm__ volatile ( "dsb LD" : : : "memory" ); + __asm__ volatile ( "dsb SY" : : : "memory" ); } static inline void _AARCH64_Instruction_synchronization_barrier( void ) @@ -204,9 +212,9 @@ static inline void _AARCH64_Instruction_synchronization_barrier( void ) __asm__ volatile ( "isb" : : : "memory" ); } -void _CPU_ISR_Set_level( uint64_t level ); +void _CPU_ISR_Set_level( uint32_t level ); -uint64_t _CPU_ISR_Get_level( void ); +uint32_t _CPU_ISR_Get_level( void ); #if defined(AARCH64_DISABLE_INLINE_ISR_DISABLE_ENABLE) uint64_t AArch64_interrupt_disable( void ); @@ -252,7 +260,7 @@ static inline void AArch64_interrupt_flash( uint64_t isr_cookie ) #define _CPU_ISR_Flash( _isr_cookie ) \ AArch64_interrupt_flash( _isr_cookie ) -RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint64_t isr_cookie ) +static inline bool _CPU_ISR_Is_enabled( uint64_t isr_cookie ) { return ( isr_cookie & AARCH64_PSTATE_I ) == 0; } @@ -285,6 +293,10 @@ void _CPU_Context_Initialize( { context->is_executing = is_executing; } + + RTEMS_NO_RETURN void _AArch64_Start_multitasking( Context_Control *heir ); + + #define _CPU_Start_multitasking( _heir ) _AArch64_Start_multitasking( _heir ) #endif #define _CPU_Context_Restart_self( _the_context ) \ @@ -302,17 +314,16 @@ void _CPU_Initialize( void ); typedef void ( *CPU_ISR_handler )( void ); -void _CPU_ISR_install_vector( - uint32_t vector, - CPU_ISR_handler new_handler, - CPU_ISR_handler *old_handler -); - /** * @brief CPU switch context. */ void _CPU_Context_switch( Context_Control *run, Context_Control *heir ); +RTEMS_NO_RETURN void _CPU_Context_switch_no_return( + Context_Control *executing, + Context_Control *heir +); + RTEMS_NO_RETURN void _CPU_Context_restore( Context_Control *new_context ); #ifdef RTEMS_SMP @@ -373,14 +384,6 @@ uint32_t _CPU_Counter_frequency( void ); CPU_Counter_ticks _CPU_Counter_read( void ); -static inline CPU_Counter_ticks _CPU_Counter_difference( - CPU_Counter_ticks second, - CPU_Counter_ticks first -) -{ - return second - first; -} - void *_CPU_Thread_Idle_body( uintptr_t ignored ); typedef enum { @@ -401,7 +404,7 @@ typedef enum { AARCH64_EXCEPTION_LEL32_FIQ = 14, AARCH64_EXCEPTION_LEL32_SERROR = 15, MAX_EXCEPTIONS = 16, - AARCH64_EXCEPTION_MAKE_ENUM_64_BIT = 0xffffffffffffffff + AARCH64_EXCEPTION_MAKE_ENUM_64_BIT = INT_MAX } AArch64_symbolic_exception_name; #define VECTOR_POINTER_OFFSET 0x78 @@ -429,7 +432,15 @@ static inline void* AArch64_set_exception_handler( *vector_address = handler; /* return now-previous vector pointer */ - return (void*)current_vector_pointer; + +/* + * This was put in to fix the following warning: + * warning: ISO C forbids conversion of function pointer to object pointer type. + */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" + return (void*)current_vector_pointer; +#pragma GCC diagnostic pop } typedef struct { @@ -519,6 +530,27 @@ typedef struct { void _CPU_Exception_frame_print( const CPU_Exception_frame *frame ); +RTEMS_NO_RETURN void _CPU_Exception_resume( CPU_Exception_frame *frame ); + +RTEMS_NO_RETURN void +_CPU_Exception_dispatch_and_resume( CPU_Exception_frame *frame ); + +void _CPU_Exception_disable_thread_dispatch( void ); + +int _CPU_Exception_frame_get_signal( CPU_Exception_frame *frame ); + +void _CPU_Exception_frame_set_resume( CPU_Exception_frame *frame, + void *address ); + +void _CPU_Exception_frame_make_resume_next_instruction( + CPU_Exception_frame *frame +); + +void _AArch64_Exception_frame_copy( + CPU_Exception_frame *new_ef, + CPU_Exception_frame *old_ef +); + void _AArch64_Exception_default( CPU_Exception_frame *frame ); /** Type that can store a 32-bit integer or a pointer. */ |