diff options
Diffstat (limited to '')
69 files changed, 1745 insertions, 2136 deletions
diff --git a/cpukit/include/rtems/score/assert.h b/cpukit/include/rtems/score/assert.h index 9eeccacf76..ad92a585fd 100644 --- a/cpukit/include/rtems/score/assert.h +++ b/cpukit/include/rtems/score/assert.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -71,22 +71,7 @@ extern "C" { * @note This is based on the code in newlib's assert.h. */ #ifndef __RTEMS_ASSERT_FUNCTION - /* Use g++'s demangled names in C++. */ - #if defined __cplusplus && defined __GNUC__ - #define __RTEMS_ASSERT_FUNCTION __PRETTY_FUNCTION__ - - /* C99 requires the use of __func__. */ - #elif __STDC_VERSION__ >= 199901L - #define __RTEMS_ASSERT_FUNCTION __func__ - - /* Older versions of gcc don't have __func__ but can use __FUNCTION__. */ - #elif __GNUC__ >= 2 - #define __RTEMS_ASSERT_FUNCTION __FUNCTION__ - - /* failed to detect __func__ support. */ - #else - #define __RTEMS_ASSERT_FUNCTION ((char *) 0) - #endif + #define __RTEMS_ASSERT_FUNCTION RTEMS_FUNCTION_NAME #endif /* !__RTEMS_ASSERT_FUNCTION */ #if !defined( RTEMS_SCHEDSIM ) diff --git a/cpukit/include/rtems/score/atomic.h b/cpukit/include/rtems/score/atomic.h index 161b0ec03e..9ef1779e60 100644 --- a/cpukit/include/rtems/score/atomic.h +++ b/cpukit/include/rtems/score/atomic.h @@ -10,6 +10,7 @@ */ /* + * Copyright (C) 2015 embedded brains GmbH & Co. KG * COPYRIGHT (c) 2012-2013 Deng Hengyi. * * Redistribution and use in source and binary forms, with or without @@ -37,7 +38,7 @@ #ifndef _RTEMS_SCORE_ATOMIC_H #define _RTEMS_SCORE_ATOMIC_H -#include <rtems/score/cpuatomic.h> +#include <rtems/score/basedefs.h> /** * @defgroup RTEMSScoreAtomic Atomic Operations @@ -54,122 +55,935 @@ * @{ */ -typedef CPU_atomic_Uint Atomic_Uint; +#ifdef RTEMS_SMP + #if defined(__cplusplus) \ + && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)) + /* + * The GCC 4.9 ships its own <stdatomic.h> which is not C++ compatible. The + * suggested solution was to include <atomic> in case C++ is used. This works + * at least with GCC 4.9. See also: + * + * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60932 + * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60940 + */ + #include <atomic> + #define _RTEMS_SCORE_ATOMIC_USE_ATOMIC + #else + #include <stdatomic.h> + #define _RTEMS_SCORE_ATOMIC_USE_STDATOMIC + #endif +#else + #include <rtems/score/isrlevel.h> +#endif -typedef CPU_atomic_Ulong Atomic_Ulong; +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) -typedef CPU_atomic_Uintptr Atomic_Uintptr; +typedef std::atomic_uint Atomic_Uint; -typedef CPU_atomic_Flag Atomic_Flag; +typedef std::atomic_ulong Atomic_Ulong; -typedef CPU_atomic_Order Atomic_Order; +typedef std::atomic_uintptr_t Atomic_Uintptr; -#define ATOMIC_ORDER_RELAXED CPU_ATOMIC_ORDER_RELAXED +typedef std::atomic_flag Atomic_Flag; -#define ATOMIC_ORDER_ACQUIRE CPU_ATOMIC_ORDER_ACQUIRE +typedef std::memory_order Atomic_Order; -#define ATOMIC_ORDER_RELEASE CPU_ATOMIC_ORDER_RELEASE +#define ATOMIC_ORDER_RELAXED std::memory_order_relaxed -#define ATOMIC_ORDER_ACQ_REL CPU_ATOMIC_ORDER_ACQ_REL +#define ATOMIC_ORDER_ACQUIRE std::memory_order_acquire -#define ATOMIC_ORDER_SEQ_CST CPU_ATOMIC_ORDER_SEQ_CST +#define ATOMIC_ORDER_RELEASE std::memory_order_release -#define ATOMIC_INITIALIZER_UINT( value ) CPU_ATOMIC_INITIALIZER_UINT( value ) +#define ATOMIC_ORDER_ACQ_REL std::memory_order_acq_rel -#define ATOMIC_INITIALIZER_ULONG( value ) CPU_ATOMIC_INITIALIZER_ULONG( value ) +#define ATOMIC_ORDER_SEQ_CST std::memory_order_seq_cst -#define ATOMIC_INITIALIZER_UINTPTR( value ) CPU_ATOMIC_INITIALIZER_UINTPTR( value ) +#define ATOMIC_INITIALIZER_UINT( value ) ATOMIC_VAR_INIT( value ) -#define ATOMIC_INITIALIZER_FLAG CPU_ATOMIC_INITIALIZER_FLAG +#define ATOMIC_INITIALIZER_ULONG( value ) ATOMIC_VAR_INIT( value ) -#define _Atomic_Fence( order ) _CPU_atomic_Fence( order ) +#define ATOMIC_INITIALIZER_UINTPTR( value ) ATOMIC_VAR_INIT( value ) -#define _Atomic_Init_uint( obj, desired ) \ - _CPU_atomic_Init_uint( obj, desired ) +#define ATOMIC_INITIALIZER_FLAG ATOMIC_FLAG_INIT -#define _Atomic_Init_ulong( obj, desired ) \ - _CPU_atomic_Init_ulong( obj, desired ) +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) -#define _Atomic_Init_uintptr( obj, desired ) \ - _CPU_atomic_Init_uintptr( obj, desired ) +typedef atomic_uint Atomic_Uint; -#define _Atomic_Load_uint( obj, order ) \ - _CPU_atomic_Load_uint( obj, order ) +typedef atomic_ulong Atomic_Ulong; -#define _Atomic_Load_ulong( obj, order ) \ - _CPU_atomic_Load_ulong( obj, order ) +typedef atomic_uintptr_t Atomic_Uintptr; -#define _Atomic_Load_uintptr( obj, order ) \ - _CPU_atomic_Load_uintptr( obj, order ) +typedef atomic_flag Atomic_Flag; -#define _Atomic_Store_uint( obj, desr, order ) \ - _CPU_atomic_Store_uint( obj, desr, order ) +typedef memory_order Atomic_Order; -#define _Atomic_Store_ulong( obj, desr, order ) \ - _CPU_atomic_Store_ulong( obj, desr, order ) +#define ATOMIC_ORDER_RELAXED memory_order_relaxed -#define _Atomic_Store_uintptr( obj, desr, order ) \ - _CPU_atomic_Store_uintptr( obj, desr, order ) +#define ATOMIC_ORDER_ACQUIRE memory_order_acquire -#define _Atomic_Fetch_add_uint( obj, arg, order ) \ - _CPU_atomic_Fetch_add_uint( obj, arg, order ) +#define ATOMIC_ORDER_RELEASE memory_order_release -#define _Atomic_Fetch_add_ulong( obj, arg, order ) \ - _CPU_atomic_Fetch_add_ulong( obj, arg, order ) +#define ATOMIC_ORDER_ACQ_REL memory_order_acq_rel -#define _Atomic_Fetch_add_uintptr( obj, arg, order ) \ - _CPU_atomic_Fetch_add_uintptr( obj, arg, order ) +#define ATOMIC_ORDER_SEQ_CST memory_order_seq_cst -#define _Atomic_Fetch_sub_uint( obj, arg, order ) \ - _CPU_atomic_Fetch_sub_uint( obj, arg, order ) +#define ATOMIC_INITIALIZER_UINT( value ) ATOMIC_VAR_INIT( value ) -#define _Atomic_Fetch_sub_ulong( obj, arg, order ) \ - _CPU_atomic_Fetch_sub_ulong( obj, arg, order ) +#define ATOMIC_INITIALIZER_ULONG( value ) ATOMIC_VAR_INIT( value ) -#define _Atomic_Fetch_sub_uintptr( obj, arg, order ) \ - _CPU_atomic_Fetch_sub_uintptr( obj, arg, order ) +#define ATOMIC_INITIALIZER_UINTPTR( value ) ATOMIC_VAR_INIT( value ) -#define _Atomic_Fetch_or_uint( obj, arg, order ) \ - _CPU_atomic_Fetch_or_uint( obj, arg, order ) +#define ATOMIC_INITIALIZER_FLAG ATOMIC_FLAG_INIT -#define _Atomic_Fetch_or_ulong( obj, arg, order ) \ - _CPU_atomic_Fetch_or_ulong( obj, arg, order ) +#else -#define _Atomic_Fetch_or_uintptr( obj, arg, order ) \ - _CPU_atomic_Fetch_or_uintptr( obj, arg, order ) +typedef unsigned int Atomic_Uint; -#define _Atomic_Fetch_and_uint( obj, arg, order ) \ - _CPU_atomic_Fetch_and_uint( obj, arg, order ) +typedef unsigned long Atomic_Ulong; -#define _Atomic_Fetch_and_ulong( obj, arg, order ) \ - _CPU_atomic_Fetch_and_ulong( obj, arg, order ) +typedef uintptr_t Atomic_Uintptr; -#define _Atomic_Fetch_and_uintptr( obj, arg, order ) \ - _CPU_atomic_Fetch_and_uintptr( obj, arg, order ) +typedef bool Atomic_Flag; -#define _Atomic_Exchange_uint( obj, desr, order ) \ - _CPU_atomic_Exchange_uint( obj, desr, order ) +typedef int Atomic_Order; -#define _Atomic_Exchange_ulong( obj, desr, order ) \ - _CPU_atomic_Exchange_ulong( obj, desr, order ) +#define ATOMIC_ORDER_RELAXED 0 -#define _Atomic_Exchange_uintptr( obj, desr, order ) \ - _CPU_atomic_Exchange_uintptr( obj, desr, order ) +#define ATOMIC_ORDER_ACQUIRE 2 -#define _Atomic_Compare_exchange_uint( obj, expected, desired, succ, fail ) \ - _CPU_atomic_Compare_exchange_uint( obj, expected, desired, succ, fail ) +#define ATOMIC_ORDER_RELEASE 3 -#define _Atomic_Compare_exchange_ulong( obj, expected, desired, succ, fail ) \ - _CPU_atomic_Compare_exchange_ulong( obj, expected, desired, succ, fail ) +#define ATOMIC_ORDER_ACQ_REL 4 -#define _Atomic_Compare_exchange_uintptr( obj, expected, desired, succ, fail ) \ - _CPU_atomic_Compare_exchange_uintptr( obj, expected, desired, succ, fail ) +#define ATOMIC_ORDER_SEQ_CST 5 -#define _Atomic_Flag_clear( obj, order ) \ - _CPU_atomic_Flag_clear( obj, order ) +#define ATOMIC_INITIALIZER_UINT( value ) ( value ) -#define _Atomic_Flag_test_and_set( obj, order ) \ - _CPU_atomic_Flag_test_and_set( obj, order ) +#define ATOMIC_INITIALIZER_ULONG( value ) ( value ) + +#define ATOMIC_INITIALIZER_UINTPTR( value ) ( value ) + +#define ATOMIC_INITIALIZER_FLAG false + +#endif + +/** + * @brief Sets up a cpu fence. + * + * @param[out] order The order for the fence. + */ +static inline void _Atomic_Fence( Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + std::atomic_thread_fence( order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + atomic_thread_fence( order ); +#else + (void) order; + RTEMS_COMPILER_MEMORY_BARRIER(); +#endif +} + +/** + * @brief Initializes Uint. + * + * @param[out] obj The CPU atomic Uint to initialize. + * @param desired The desired value for @a obj. + */ +static inline void _Atomic_Init_uint( Atomic_Uint *obj, unsigned int desired ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + obj->store( desired ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + atomic_init( obj, desired ); +#else + *obj = desired; +#endif +} + +/** + * @brief Initializes Ulong. + * + * @param[out] obj The CPU atomic Ulong to initialize. + * @param desired The desired value for @a obj. + */ +static inline void _Atomic_Init_ulong( Atomic_Ulong *obj, unsigned long desired ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + obj->store( desired ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + atomic_init( obj, desired ); +#else + *obj = desired; +#endif +} + +/** + * @brief Initializes Uintptr. + * + * @param[out] obj The CPU atomic Uintptr to initialize. + * @param desired The desired value for @a obj. + */ +static inline void _Atomic_Init_uintptr( Atomic_Uintptr *obj, uintptr_t desired ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + obj->store( desired ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + atomic_init( obj, desired ); +#else + *obj = desired; +#endif +} + +/** + * @brief Loads value of Uint considering the order. + * + * @param obj The CPU atomic Uint to get the value from. + * @param order The atomic order for getting the value. + * + * @return The value of @a obj considering the @a order. + */ +static inline unsigned int _Atomic_Load_uint( const Atomic_Uint *obj, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->load( order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_load_explicit( obj, order ); +#else + unsigned int val; + + (void) order; + val = *obj; + RTEMS_COMPILER_MEMORY_BARRIER(); + + return val; +#endif +} + +/** + * @brief Loads value of Ulong considering the order. + * + * @param obj The CPU atomic Ulong to get the value from. + * @param order The atomic order for getting the value. + * + * @return The value of @a obj considering the @a order. + */ +static inline unsigned long _Atomic_Load_ulong( const Atomic_Ulong *obj, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->load( order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_load_explicit( obj, order ); +#else + unsigned long val; + + (void) order; + val = *obj; + RTEMS_COMPILER_MEMORY_BARRIER(); + + return val; +#endif +} + +/** + * @brief Loads value of Uintptr considering the order. + * + * @param obj The CPU atomic Uintptr to get the value from. + * @param order The atomic order for getting the value. + * + * @return The value of @a obj considering the @a order. + */ +static inline uintptr_t _Atomic_Load_uintptr( const Atomic_Uintptr *obj, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->load( order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_load_explicit( obj, order ); +#else + uintptr_t val; + + (void) order; + val = *obj; + RTEMS_COMPILER_MEMORY_BARRIER(); + + return val; +#endif +} + +/** + * @brief Stores a value to Uint considering the order. + * + * @param[out] obj The CPU atomic Uint to store a value in. + * @param desired The desired value for @a obj. + * @param order The atomic order for storing the value. + */ +static inline void _Atomic_Store_uint( Atomic_Uint *obj, unsigned int desired, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + obj->store( desired, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + atomic_store_explicit( obj, desired, order ); +#else + (void) order; + RTEMS_COMPILER_MEMORY_BARRIER(); + *obj = desired; +#endif +} + +/** + * @brief Stores a value to Ulong considering the order. + * + * @param[out] obj The CPU atomic Ulong to store a value in. + * @param desired The desired value for @a obj. + * @param order The atomic order for storing the value. + */ +static inline void _Atomic_Store_ulong( Atomic_Ulong *obj, unsigned long desired, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + obj->store( desired, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + atomic_store_explicit( obj, desired, order ); +#else + (void) order; + RTEMS_COMPILER_MEMORY_BARRIER(); + *obj = desired; +#endif +} + +/** + * @brief Stores a value to Uintptr considering the order. + * + * @param[out] obj The CPU atomic Uintptr to store a value in. + * @param desired The desired value for @a obj. + * @param order The atomic order for storing the value. + */ +static inline void _Atomic_Store_uintptr( Atomic_Uintptr *obj, uintptr_t desired, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + obj->store( desired, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + atomic_store_explicit( obj, desired, order ); +#else + (void) order; + RTEMS_COMPILER_MEMORY_BARRIER(); + *obj = desired; +#endif +} + +/** + * @brief Fetches current value of Uint and adds a value to the stored value. + * + * @param[in, out] obj The CPU atomic Uint to get the value from and add @a arg to. + * @param arg The value to add to @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the addition of @a arg. + */ +static inline unsigned int _Atomic_Fetch_add_uint( Atomic_Uint *obj, unsigned int arg, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->fetch_add( arg, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_fetch_add_explicit( obj, arg, order ); +#else + unsigned int val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = val + arg; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Ulong and adds a value to the stored value. + * + * @param[in, out] obj The CPU atomic Ulong to get the value from and add @a arg to. + * @param arg The value to add to @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the addition of @a arg. + */ +static inline unsigned long _Atomic_Fetch_add_ulong( Atomic_Ulong *obj, unsigned long arg, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->fetch_add( arg, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_fetch_add_explicit( obj, arg, order ); +#else + unsigned long val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = val + arg; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Uintptr and adds a value to the stored value. + * + * @param[in, out] obj The CPU atomic Uintptr to get the value from and add @a arg to. + * @param arg The value to add to @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the addition of @a arg. + */ +static inline uintptr_t _Atomic_Fetch_add_uintptr( Atomic_Uintptr *obj, uintptr_t arg, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->fetch_add( arg, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_fetch_add_explicit( obj, arg, order ); +#else + uintptr_t val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = val + arg; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Uint and subtracts a value from the stored value. + * + * @param[in, out] obj The CPU atomic Uint to get the value from and subtract @a arg from. + * @param arg The value to subtract from @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the subtraction of @a arg. + */ +static inline unsigned int _Atomic_Fetch_sub_uint( Atomic_Uint *obj, unsigned int arg, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->fetch_sub( arg, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_fetch_sub_explicit( obj, arg, order ); +#else + unsigned int val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = val - arg; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Ulong and subtracts a value from the stored value. + * + * @param[in, out] obj The CPU atomic Ulong to get the value from and subtract @a arg from. + * @param arg The value to subtract from @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the subtraction of @a arg. + */ +static inline unsigned long _Atomic_Fetch_sub_ulong( Atomic_Ulong *obj, unsigned long arg, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->fetch_sub( arg, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_fetch_sub_explicit( obj, arg, order ); +#else + unsigned long val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = val - arg; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Uintptr and subtracts a value from the stored value. + * + * @param[in, out] obj The CPU atomic Uintptr to get the value from and subtract @a arg from. + * @param arg The value to subtract from @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the subtraction of @a arg. + */ +static inline uintptr_t _Atomic_Fetch_sub_uintptr( Atomic_Uintptr *obj, uintptr_t arg, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->fetch_sub( arg, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_fetch_sub_explicit( obj, arg, order ); +#else + uintptr_t val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = val - arg; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Uint and ORs a value with the stored value. + * + * @param[in, out] obj The CPU atomic Uint to get the value from and OR @a arg to. + * @param arg The value to OR with @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the OR operation with @a arg. + */ +static inline unsigned int _Atomic_Fetch_or_uint( Atomic_Uint *obj, unsigned int arg, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->fetch_or( arg, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_fetch_or_explicit( obj, arg, order ); +#else + unsigned int val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = val | arg; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Ulong and ORs a value with the stored value. + * + * @param[in, out] obj The CPU atomic Ulong to get the value from and OR @a arg to. + * @param arg The value to OR with @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the OR operation with @a arg. + */ +static inline unsigned long _Atomic_Fetch_or_ulong( Atomic_Ulong *obj, unsigned long arg, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->fetch_or( arg, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_fetch_or_explicit( obj, arg, order ); +#else + unsigned long val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = val | arg; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Uintptr and ORs a value with the stored value. + * + * @param[in, out] obj The CPU atomic Uintptr to get the value from and OR @a arg to. + * @param arg The value to OR with @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the OR operation with @a arg. + */ +static inline uintptr_t _Atomic_Fetch_or_uintptr( Atomic_Uintptr *obj, uintptr_t arg, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->fetch_or( arg, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_fetch_or_explicit( obj, arg, order ); +#else + uintptr_t val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = val | arg; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Uint and ANDs a value with the stored value. + * + * @param[in, out] obj The CPU atomic Uint to get the value from and AND @a arg to. + * @param arg The value to AND with @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the AND operation with @a arg. + */ +static inline unsigned int _Atomic_Fetch_and_uint( Atomic_Uint *obj, unsigned int arg, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->fetch_and( arg, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_fetch_and_explicit( obj, arg, order ); +#else + unsigned int val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = val & arg; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Ulong and ANDs a value with the stored value. + * + * @param[in, out] obj The CPU atomic Ulong to get the value from and AND @a arg to. + * @param arg The value to AND with @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the AND operation with @a arg. + */ +static inline unsigned long _Atomic_Fetch_and_ulong( Atomic_Ulong *obj, unsigned long arg, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->fetch_and( arg, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_fetch_and_explicit( obj, arg, order ); +#else + unsigned long val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = val & arg; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Uintptr and ANDs a value with the stored value. + * + * @param[in, out] obj The CPU atomic Uintptr to get the value from and AND @a arg to. + * @param arg The value to AND with @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the AND operation with @a arg. + */ +static inline uintptr_t _Atomic_Fetch_and_uintptr( Atomic_Uintptr *obj, uintptr_t arg, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->fetch_and( arg, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_fetch_and_explicit( obj, arg, order ); +#else + uintptr_t val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = val & arg; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Uint and sets its value. + * + * @param[in, out] obj The CPU atomic Uint to get the value from and set the value to @a desired. + * @param arg The value to set for @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the exchange with @a desired. + */ +static inline unsigned int _Atomic_Exchange_uint( Atomic_Uint *obj, unsigned int desired, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->exchange( desired, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_exchange_explicit( obj, desired, order ); +#else + unsigned int val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = desired; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Ulong and sets its value. + * + * @param[in, out] obj The CPU atomic Ulong to get the value from and set the value to @a desired. + * @param arg The value to set for @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the exchange with @a desired. + */ +static inline unsigned long _Atomic_Exchange_ulong( Atomic_Ulong *obj, unsigned long desired, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->exchange( desired, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_exchange_explicit( obj, desired, order ); +#else + unsigned long val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = desired; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Fetches current value of Uintptr and sets its value. + * + * @param[in, out] obj The CPU atomic Uintptr to get the value from and set the value to @a desired. + * @param arg The value to set for @a obj. + * @param order The atomic order for the operation. + * + * @return The value of @a obj prior to the exchange with @a desired. + */ +static inline uintptr_t _Atomic_Exchange_uintptr( Atomic_Uintptr *obj, uintptr_t desired, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->exchange( desired, order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_exchange_explicit( obj, desired, order ); +#else + uintptr_t val; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + val = *obj; + *obj = desired; + _ISR_Local_enable( level ); + + return val; +#endif +} + +/** + * @brief Checks if value of Uint is as expected. + * + * This method checks if the value of @a obj is equal to the value of @a expected. If + * this is the case, the value of @a obj is changed to @a desired. Otherwise, the value + * of @a obj is changed to @a expected. + * + * @param[in, out] obj The CPU atomic Uint to operate upon. + * @param[in, out] expected The expected value of @a obj. If @a obj has a different + * value, @a expected is changed to the actual value of @a obj. + * @param desired The new value of @a obj if the old value of @a obj was as expected. + * @param succ The order if it is successful. + * @param fail The order if it fails. + * + * @retval true The old value of @a obj was as expected. + * @retval false The old value of @a obj was not as expected. + */ +static inline bool _Atomic_Compare_exchange_uint( Atomic_Uint *obj, unsigned int *expected, unsigned int desired, Atomic_Order succ, Atomic_Order fail ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->compare_exchange_strong( *expected, desired, succ, fail ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail ); +#else + bool success; + ISR_Level level; + unsigned int actual; + + (void) succ; + (void) fail; + _ISR_Local_disable( level ); + actual = *obj; + success = ( actual == *expected ); + if ( success ) { + *obj = desired; + } else { + *expected = actual; + } + _ISR_Local_enable( level ); + + return success; +#endif +} + +/** + * @brief Checks if value of Ulong is as expected. + * + * This method checks if the value of @a obj is equal to the value of @a expected. If + * this is the case, the value of @a obj is changed to @a desired. Otherwise, the value + * of @a obj is changed to @a expected. + * + * @param[in, out] obj The CPU atomic Ulong to operate upon. + * @param[in, out] expected The expected value of @a obj. If @a obj has a different + * value, @a expected is changed to the actual value of @a obj. + * @param desired The new value of @a obj if the old value of @a obj was as expected. + * @param succ The order if it is successful. + * @param fail The order if it fails. + * + * @retval true The old value of @a obj was as expected. + * @retval false The old value of @a obj was not as expected. + */ +static inline bool _Atomic_Compare_exchange_ulong( Atomic_Ulong *obj, unsigned long *expected, unsigned long desired, Atomic_Order succ, Atomic_Order fail ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->compare_exchange_strong( *expected, desired, succ, fail ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail ); +#else + bool success; + ISR_Level level; + unsigned long actual; + + (void) succ; + (void) fail; + _ISR_Local_disable( level ); + actual = *obj; + success = ( actual == *expected ); + if ( success ) { + *obj = desired; + } else { + *expected = actual; + } + _ISR_Local_enable( level ); + + return success; +#endif +} + +/** + * @brief Checks if value of Uintptr is as expected. + * + * This method checks if the value of @a obj is equal to the value of @a expected. If + * this is the case, the value of @a obj is changed to @a desired. Otherwise, the value + * of @a obj is changed to @a expected. + * + * @param[in, out] obj The CPU atomic Uintptr to operate upon. + * @param[in, out] expected The expected value of @a obj. If @a obj has a different + * value, @a expected is changed to the actual value of @a obj. + * @param desired The new value of @a obj if the old value of @a obj was as expected. + * @param succ The order if it is successful. + * @param fail The order if it fails. + * + * @retval true The old value of @a obj was as expected. + * @retval false The old value of @a obj was not as expected. + */ +static inline bool _Atomic_Compare_exchange_uintptr( Atomic_Uintptr *obj, uintptr_t *expected, uintptr_t desired, Atomic_Order succ, Atomic_Order fail ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->compare_exchange_strong( *expected, desired, succ, fail ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail ); +#else + bool success; + ISR_Level level; + uintptr_t actual; + + (void) succ; + (void) fail; + _ISR_Local_disable( level ); + actual = *obj; + success = ( actual == *expected ); + if ( success ) { + *obj = desired; + } else { + *expected = actual; + } + _ISR_Local_enable( level ); + + return success; +#endif +} + +/** + * @brief Clears the atomic flag. + * + * @param[out] obj The atomic flag to be cleared. + * @param order The atomic order for the operation. + */ +static inline void _Atomic_Flag_clear( Atomic_Flag *obj, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + obj->clear( order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + atomic_flag_clear_explicit( obj, order ); +#else + (void) order; + *obj = false; +#endif +} + +/** + * @brief Returns current flag state and sets it. + * + * @param[in, out] obj The atomic flag to be set. + * @param order The atomic order for the operation. + * + * @retval true @a obj was set prior to this operation. + * @retval false @a obj was not set prior to this operation. + */ +static inline bool _Atomic_Flag_test_and_set( Atomic_Flag *obj, Atomic_Order order ) +{ +#if defined(_RTEMS_SCORE_ATOMIC_USE_ATOMIC) + return obj->test_and_set( order ); +#elif defined(_RTEMS_SCORE_ATOMIC_USE_STDATOMIC) + return atomic_flag_test_and_set_explicit( obj, order ); +#else + bool flag; + ISR_Level level; + + (void) order; + _ISR_Local_disable( level ); + flag = *obj; + *obj = true; + _ISR_Local_enable( level ); + + return flag; +#endif +} /** @} */ diff --git a/cpukit/include/rtems/score/basedefs.h b/cpukit/include/rtems/score/basedefs.h index c182ea02ec..010728d795 100644 --- a/cpukit/include/rtems/score/basedefs.h +++ b/cpukit/include/rtems/score/basedefs.h @@ -10,9 +10,9 @@ */ /* - * Copyright (C) 2014 Paval Pisa + * Copyright (C) 2014 Pavel Pisa * Copyright (C) 2011, 2013 On-Line Applications Research Corporation (OAR) - * Copyright (C) 2009, 2021 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2009, 2023 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -75,9 +75,8 @@ extern "C" { /** * @defgroup RTEMSAPI API * - * @brief API - * - * This group contains the RTEMS Application Programming Interface (API). + * @brief This group contains the RTEMS Application Programming Interface + * (API). */ /* Generated from spec:/rtems/basedefs/if/group */ @@ -169,9 +168,9 @@ extern "C" { * * @return Returns the alignment requirement of the type. */ -#if __cplusplus >= 201103L +#if defined( __cplusplus ) && __cplusplus >= 201103L #define RTEMS_ALIGNOF( _type_name ) alignof( _type_name ) -#elif __STDC_VERSION__ >= 201112L +#elif defined( __STDC_VERSION__ ) && __STDC_VERSION__ >= 201112L #define RTEMS_ALIGNOF( _type_name ) _Alignof( _type_name ) #else #define RTEMS_ALIGNOF( _type_name ) sizeof( _type_name ) @@ -355,6 +354,47 @@ extern "C" { */ #define RTEMS_EXPAND( _token ) _token +/* Generated from spec:/rtems/basedefs/if/function-name */ + +/** + * @ingroup RTEMSAPIBaseDefs + * + * @brief Expands to the name of the function containing the use of this + * define. + */ +#if defined(__cplusplus) && defined(__GNUC__) + #define RTEMS_FUNCTION_NAME __PRETTY_FUNCTION__ +#else + #define RTEMS_FUNCTION_NAME __func__ +#endif + +/* Generated from spec:/rtems/basedefs/if/no-return */ + +/** + * @ingroup RTEMSAPIBaseDefs + * + * @brief Tells the compiler in a function declaration that this function does + * not return. + */ +#if defined( __cplusplus ) && __cplusplus >= 201103L + #define RTEMS_NO_RETURN [[noreturn]] +#elif defined( __STDC_VERSION__ ) && __STDC_VERSION__ >= 201112L + #define RTEMS_NO_RETURN _Noreturn +#elif defined(__GNUC__) + #define RTEMS_NO_RETURN __attribute__(( __noreturn__ )) +#else + #define RTEMS_NO_RETURN +#endif + +/* Generated from spec:/rtems/basedefs/if/compiler-no-return-attribute */ + +/** + * @ingroup RTEMSAPIBaseDefs + * + * @brief Provided for backward compatibility. + */ +#define RTEMS_COMPILER_NO_RETURN_ATTRIBUTE RTEMS_NO_RETURN + /* Generated from spec:/rtems/basedefs/if/section */ /** @@ -392,7 +432,7 @@ extern "C" { * * @brief Gets the pointer reference type. * - * @param _level is the pointer indirection level expressed in *. + * @param _level is the pointer indirection level expressed in ``*``. * * @param _target is the reference target type. * @@ -425,17 +465,25 @@ extern "C" { */ #define RTEMS_XCONCAT( _x, _y ) RTEMS_CONCAT( _x, _y ) -/* Generated from spec:/score/basedefs/if/assert-unreachable */ +#if !defined(ASM) && defined(RTEMS_DEBUG) + /* Generated from spec:/score/basedefs/if/debug-unreachable */ -/** - * @ingroup RTEMSScore - * - * @brief Asserts that this program point is unreachable. - */ -#if defined(RTEMS_DEBUG) - #define _Assert_Unreachable() _Assert( 0 ) -#else - #define _Assert_Unreachable() do { } while ( 0 ) + /** + * @ingroup RTEMSScore + * + * @brief Terminates the program with a failed assertion. + * + * @param file is the file name. + * + * @param line is the line of the file. + * + * @param func is the function name. + */ + RTEMS_NO_RETURN void _Debug_Unreachable( + const char *file, + int line, + const char *func + ); #endif #if !defined(ASM) @@ -463,7 +511,7 @@ extern "C" { * @brief Performs a type cast which removes qualifiers without warnings to the * type for the variable. * - * @param _ptr_level is the pointer indirection level expressed in *. + * @param _ptr_level is the pointer indirection level expressed in ``*``. * * @param _type is the target type of the cast. * @@ -614,33 +662,6 @@ extern "C" { #define RTEMS_NO_INLINE #endif -/* Generated from spec:/rtems/basedefs/if/no-return */ - -/** - * @ingroup RTEMSAPIBaseDefs - * - * @brief Tells the compiler in a function declaration that this function does - * not return. - */ -#if __cplusplus >= 201103L - #define RTEMS_NO_RETURN [[noreturn]] -#elif __STDC_VERSION__ >= 201112L - #define RTEMS_NO_RETURN _Noreturn -#elif defined(__GNUC__) - #define RTEMS_NO_RETURN __attribute__(( __noreturn__ )) -#else - #define RTEMS_NO_RETURN -#endif - -/* Generated from spec:/rtems/basedefs/if/compiler-no-return-attribute */ - -/** - * @ingroup RTEMSAPIBaseDefs - * - * @brief Provided for backward compatibility. - */ -#define RTEMS_COMPILER_NO_RETURN_ATTRIBUTE RTEMS_NO_RETURN - /* Generated from spec:/rtems/basedefs/if/noinit */ /** @@ -812,9 +833,9 @@ extern "C" { * * @param _msg is the error message in case the static assertion fails. */ -#if __cplusplus >= 201103L +#if defined( __cplusplus ) && __cplusplus >= 201103L #define RTEMS_STATIC_ASSERT( _cond, _msg ) static_assert( _cond, # _msg ) -#elif __STDC_VERSION__ >= 201112L +#elif defined( __STDC_VERSION__ ) && __STDC_VERSION__ >= 201112L #define RTEMS_STATIC_ASSERT( _cond, _msg ) _Static_assert( _cond, # _msg ) #else #define RTEMS_STATIC_ASSERT( _cond, _msg ) \ @@ -858,14 +879,13 @@ extern "C" { * * @brief Tells the compiler that this program point is unreachable. */ -#if defined(__GNUC__) +#if defined(RTEMS_DEBUG) #define RTEMS_UNREACHABLE() \ - do { \ - __builtin_unreachable(); \ - _Assert_Unreachable(); \ - } while ( 0 ) + _Debug_Unreachable( __FILE__, __LINE__, RTEMS_FUNCTION_NAME ) +#elif defined(__GNUC__) + #define RTEMS_UNREACHABLE() __builtin_unreachable() #else - #define RTEMS_UNREACHABLE() _Assert_Unreachable() + #define RTEMS_UNREACHABLE() do { } while ( 0 ) #endif /* Generated from spec:/rtems/basedefs/if/unused */ @@ -979,11 +999,12 @@ extern "C" { * * @param _value is the value of the symbol. On the value a macro expansion is * performed and afterwards it is stringified. It shall expand to an integer - * expression understood by the assembler. + * expression understood by the assembler. The value shall be representable + * in the code model of the target architecture. * * This macro shall be placed at file scope. */ -#if defined(__USER_LABEL_PREFIX__) +#if defined(__GNUC__) #define RTEMS_DEFINE_GLOBAL_SYMBOL( _name, _value ) \ __asm__( \ "\t.globl " RTEMS_XSTRING( RTEMS_SYMBOL_NAME( _name ) ) \ diff --git a/cpukit/include/rtems/score/chain.h b/cpukit/include/rtems/score/chain.h index 7414fdb697..0b1ede75cf 100644 --- a/cpukit/include/rtems/score/chain.h +++ b/cpukit/include/rtems/score/chain.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. + * Copyright (c) 2010 embedded brains GmbH & Co. KG * * COPYRIGHT (c) 1989-2006. * On-Line Applications Research Corporation (OAR). @@ -61,17 +61,7 @@ extern "C" { */ /** - * @typedef Chain_Node - * - * This type definition promotes the name for the Chain Node used by - * all RTEMS code. It is a separate type definition because a forward - * reference is required to define it. See @ref Chain_Node_struct for - * detailed information. - */ -typedef struct Chain_Node_struct Chain_Node; - -/** - * @struct Chain_Node_struct + * @brief This structure represents a chain node. * * This is used to manage each element (node) which is placed * on a chain. @@ -85,15 +75,15 @@ typedef struct Chain_Node_struct Chain_Node; * so the user can cast the pointers back and forth. * */ -struct Chain_Node_struct { +typedef struct Chain_Node { /** This points to the node after this one on this chain. */ - Chain_Node *next; + struct Chain_Node *next; /** This points to the node immediate prior to this one on this chain. */ - Chain_Node *previous; -}; + struct Chain_Node *previous; +} Chain_Node; /** - * @struct Chain_Control + * @brief This union represents a chain control block. * * This is used to manage a chain. A chain consists of a doubly * linked list of zero or more nodes. diff --git a/cpukit/include/rtems/score/chainimpl.h b/cpukit/include/rtems/score/chainimpl.h index 1f0d29cc6d..a2ea5e2645 100644 --- a/cpukit/include/rtems/score/chainimpl.h +++ b/cpukit/include/rtems/score/chainimpl.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2010 embedded brains GmbH. + * Copyright (c) 2010 embedded brains GmbH & Co. KG * * COPYRIGHT (c) 1989-2014. * On-Line Applications Research Corporation (OAR). diff --git a/cpukit/include/rtems/score/copyrt.h b/cpukit/include/rtems/score/copyrt.h index 17067a26cf..21c4bec635 100644 --- a/cpukit/include/rtems/score/copyrt.h +++ b/cpukit/include/rtems/score/copyrt.h @@ -3,7 +3,7 @@ /** * @file * - * @ingroup RTEMSSuperCoreCopyright + * @ingroup RTEMSScoreCopyright * * @brief This header file provides the interfaces of the * @ref RTEMSScoreCopyright. diff --git a/cpukit/include/rtems/score/coremsgbuffer.h b/cpukit/include/rtems/score/coremsgbuffer.h index 330a480423..cceb80bdf5 100644 --- a/cpukit/include/rtems/score/coremsgbuffer.h +++ b/cpukit/include/rtems/score/coremsgbuffer.h @@ -11,7 +11,7 @@ */ /* - * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2020 embedded brains GmbH & Co. KG * Copyright (C) 1989, 2009 On-Line Applications Research Corporation (OAR) * * Redistribution and use in source and binary forms, with or without diff --git a/cpukit/include/rtems/score/coremsgimpl.h b/cpukit/include/rtems/score/coremsgimpl.h index 8ed5719e04..a11beef938 100644 --- a/cpukit/include/rtems/score/coremsgimpl.h +++ b/cpukit/include/rtems/score/coremsgimpl.h @@ -430,7 +430,7 @@ static inline Status_Control _CORE_message_queue_Urgent( /** * @brief Acquires the message queue. * - * @param[in, out] the_message_queue Rhe message queue to acquire. + * @param[in, out] the_message_queue The message queue to acquire. * @param queue_context The thread queue context. */ static inline void _CORE_message_queue_Acquire( diff --git a/cpukit/include/rtems/score/cpustdatomic.h b/cpukit/include/rtems/score/cpustdatomic.h deleted file mode 100644 index 899f52cd83..0000000000 --- a/cpukit/include/rtems/score/cpustdatomic.h +++ /dev/null @@ -1,984 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * @file - * - * @brief This header file provides the interfaces of the - * @ref RTEMSScoreAtomicCPU. - */ - -/* - * COPYRIGHT (c) 2013 Deng Hengyi. - * Copyright (c) 2015 embedded brains GmbH. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_CPUSTDATOMIC_H -#define _RTEMS_SCORE_CPUSTDATOMIC_H - -#include <rtems/score/basedefs.h> - -/** - * @defgroup RTEMSScoreAtomicCPU C11/C++11 Atomic Operations - * - * @ingroup RTEMSScoreAtomic - * - * @brief This group contains the atomic operations implementation using - * functions provided by the C11/C++11. - * - * @{ - */ - -#ifdef RTEMS_SMP - #if defined(__cplusplus) \ - && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)) - /* - * The GCC 4.9 ships its own <stdatomic.h> which is not C++ compatible. The - * suggested solution was to include <atomic> in case C++ is used. This works - * at least with GCC 4.9. See also: - * - * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60932 - * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60940 - */ - #include <atomic> - #define _RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC - #else - #include <stdatomic.h> - #define _RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC - #endif -#else - #include <rtems/score/isrlevel.h> -#endif - -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - -typedef std::atomic_uint CPU_atomic_Uint; - -typedef std::atomic_ulong CPU_atomic_Ulong; - -typedef std::atomic_uintptr_t CPU_atomic_Uintptr; - -typedef std::atomic_flag CPU_atomic_Flag; - -typedef std::memory_order CPU_atomic_Order; - -#define CPU_ATOMIC_ORDER_RELAXED std::memory_order_relaxed - -#define CPU_ATOMIC_ORDER_ACQUIRE std::memory_order_acquire - -#define CPU_ATOMIC_ORDER_RELEASE std::memory_order_release - -#define CPU_ATOMIC_ORDER_ACQ_REL std::memory_order_acq_rel - -#define CPU_ATOMIC_ORDER_SEQ_CST std::memory_order_seq_cst - -#define CPU_ATOMIC_INITIALIZER_UINT( value ) ATOMIC_VAR_INIT( value ) - -#define CPU_ATOMIC_INITIALIZER_ULONG( value ) ATOMIC_VAR_INIT( value ) - -#define CPU_ATOMIC_INITIALIZER_UINTPTR( value ) ATOMIC_VAR_INIT( value ) - -#define CPU_ATOMIC_INITIALIZER_FLAG ATOMIC_FLAG_INIT - -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - -typedef atomic_uint CPU_atomic_Uint; - -typedef atomic_ulong CPU_atomic_Ulong; - -typedef atomic_uintptr_t CPU_atomic_Uintptr; - -typedef atomic_flag CPU_atomic_Flag; - -typedef memory_order CPU_atomic_Order; - -#define CPU_ATOMIC_ORDER_RELAXED memory_order_relaxed - -#define CPU_ATOMIC_ORDER_ACQUIRE memory_order_acquire - -#define CPU_ATOMIC_ORDER_RELEASE memory_order_release - -#define CPU_ATOMIC_ORDER_ACQ_REL memory_order_acq_rel - -#define CPU_ATOMIC_ORDER_SEQ_CST memory_order_seq_cst - -#define CPU_ATOMIC_INITIALIZER_UINT( value ) ATOMIC_VAR_INIT( value ) - -#define CPU_ATOMIC_INITIALIZER_ULONG( value ) ATOMIC_VAR_INIT( value ) - -#define CPU_ATOMIC_INITIALIZER_UINTPTR( value ) ATOMIC_VAR_INIT( value ) - -#define CPU_ATOMIC_INITIALIZER_FLAG ATOMIC_FLAG_INIT - -#else - -typedef unsigned int CPU_atomic_Uint; - -typedef unsigned long CPU_atomic_Ulong; - -typedef uintptr_t CPU_atomic_Uintptr; - -typedef bool CPU_atomic_Flag; - -typedef int CPU_atomic_Order; - -#define CPU_ATOMIC_ORDER_RELAXED 0 - -#define CPU_ATOMIC_ORDER_ACQUIRE 2 - -#define CPU_ATOMIC_ORDER_RELEASE 3 - -#define CPU_ATOMIC_ORDER_ACQ_REL 4 - -#define CPU_ATOMIC_ORDER_SEQ_CST 5 - -#define CPU_ATOMIC_INITIALIZER_UINT( value ) ( value ) - -#define CPU_ATOMIC_INITIALIZER_ULONG( value ) ( value ) - -#define CPU_ATOMIC_INITIALIZER_UINTPTR( value ) ( value ) - -#define CPU_ATOMIC_INITIALIZER_FLAG false - -#endif - -/** - * @brief Sets up a cpu fence. - * - * @param[out] order The order for the fence. - */ -static inline void _CPU_atomic_Fence( CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - std::atomic_thread_fence( order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - atomic_thread_fence( order ); -#else - (void) order; - RTEMS_COMPILER_MEMORY_BARRIER(); -#endif -} - -/** - * @brief Initializes Uint. - * - * @param[out] obj The CPU atomic Uint to initialize. - * @param desired The desired value for @a obj. - */ -static inline void _CPU_atomic_Init_uint( CPU_atomic_Uint *obj, unsigned int desired ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - obj->store( desired ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - atomic_init( obj, desired ); -#else - *obj = desired; -#endif -} - -/** - * @brief Initializes Ulong. - * - * @param[out] obj The CPU atomic Ulong to initialize. - * @param desired The desired value for @a obj. - */ -static inline void _CPU_atomic_Init_ulong( CPU_atomic_Ulong *obj, unsigned long desired ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - obj->store( desired ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - atomic_init( obj, desired ); -#else - *obj = desired; -#endif -} - -/** - * @brief Initializes Uintptr. - * - * @param[out] obj The CPU atomic Uintptr to initialize. - * @param desired The desired value for @a obj. - */ -static inline void _CPU_atomic_Init_uintptr( CPU_atomic_Uintptr *obj, uintptr_t desired ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - obj->store( desired ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - atomic_init( obj, desired ); -#else - *obj = desired; -#endif -} - -/** - * @brief Loads value of Uint considering the order. - * - * @param obj The CPU atomic Uint to get the value from. - * @param order The atomic order for getting the value. - * - * @return The value of @a obj considering the @a order. - */ -static inline unsigned int _CPU_atomic_Load_uint( const CPU_atomic_Uint *obj, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->load( order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_load_explicit( obj, order ); -#else - unsigned int val; - - (void) order; - val = *obj; - RTEMS_COMPILER_MEMORY_BARRIER(); - - return val; -#endif -} - -/** - * @brief Loads value of Ulong considering the order. - * - * @param obj The CPU atomic Ulong to get the value from. - * @param order The atomic order for getting the value. - * - * @return The value of @a obj considering the @a order. - */ -static inline unsigned long _CPU_atomic_Load_ulong( const CPU_atomic_Ulong *obj, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->load( order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_load_explicit( obj, order ); -#else - unsigned long val; - - (void) order; - val = *obj; - RTEMS_COMPILER_MEMORY_BARRIER(); - - return val; -#endif -} - -/** - * @brief Loads value of Uintptr considering the order. - * - * @param obj The CPU atomic Uintptr to get the value from. - * @param order The atomic order for getting the value. - * - * @return The value of @a obj considering the @a order. - */ -static inline uintptr_t _CPU_atomic_Load_uintptr( const CPU_atomic_Uintptr *obj, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->load( order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_load_explicit( obj, order ); -#else - uintptr_t val; - - (void) order; - val = *obj; - RTEMS_COMPILER_MEMORY_BARRIER(); - - return val; -#endif -} - -/** - * @brief Stores a value to Uint considering the order. - * - * @param[out] obj The CPU atomic Uint to store a value in. - * @param desired The desired value for @a obj. - * @param order The atomic order for storing the value. - */ -static inline void _CPU_atomic_Store_uint( CPU_atomic_Uint *obj, unsigned int desired, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - obj->store( desired, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - atomic_store_explicit( obj, desired, order ); -#else - (void) order; - RTEMS_COMPILER_MEMORY_BARRIER(); - *obj = desired; -#endif -} - -/** - * @brief Stores a value to Ulong considering the order. - * - * @param[out] obj The CPU atomic Ulong to store a value in. - * @param desired The desired value for @a obj. - * @param order The atomic order for storing the value. - */ -static inline void _CPU_atomic_Store_ulong( CPU_atomic_Ulong *obj, unsigned long desired, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - obj->store( desired, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - atomic_store_explicit( obj, desired, order ); -#else - (void) order; - RTEMS_COMPILER_MEMORY_BARRIER(); - *obj = desired; -#endif -} - -/** - * @brief Stores a value to Uintptr considering the order. - * - * @param[out] obj The CPU atomic Uintptr to store a value in. - * @param desired The desired value for @a obj. - * @param order The atomic order for storing the value. - */ -static inline void _CPU_atomic_Store_uintptr( CPU_atomic_Uintptr *obj, uintptr_t desired, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - obj->store( desired, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - atomic_store_explicit( obj, desired, order ); -#else - (void) order; - RTEMS_COMPILER_MEMORY_BARRIER(); - *obj = desired; -#endif -} - -/** - * @brief Fetches current value of Uint and adds a value to the stored value. - * - * @param[in, out] obj The CPU atomic Uint to get the value from and add @a arg to. - * @param arg The value to add to @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the addition of @a arg. - */ -static inline unsigned int _CPU_atomic_Fetch_add_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->fetch_add( arg, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_fetch_add_explicit( obj, arg, order ); -#else - unsigned int val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = val + arg; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Ulong and adds a value to the stored value. - * - * @param[in, out] obj The CPU atomic Ulong to get the value from and add @a arg to. - * @param arg The value to add to @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the addition of @a arg. - */ -static inline unsigned long _CPU_atomic_Fetch_add_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->fetch_add( arg, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_fetch_add_explicit( obj, arg, order ); -#else - unsigned long val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = val + arg; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Uintptr and adds a value to the stored value. - * - * @param[in, out] obj The CPU atomic Uintptr to get the value from and add @a arg to. - * @param arg The value to add to @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the addition of @a arg. - */ -static inline uintptr_t _CPU_atomic_Fetch_add_uintptr( CPU_atomic_Uintptr *obj, uintptr_t arg, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->fetch_add( arg, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_fetch_add_explicit( obj, arg, order ); -#else - uintptr_t val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = val + arg; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Uint and subtracts a value from the stored value. - * - * @param[in, out] obj The CPU atomic Uint to get the value from and subtract @a arg from. - * @param arg The value to subtract from @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the subtraction of @a arg. - */ -static inline unsigned int _CPU_atomic_Fetch_sub_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->fetch_sub( arg, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_fetch_sub_explicit( obj, arg, order ); -#else - unsigned int val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = val - arg; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Ulong and subtracts a value from the stored value. - * - * @param[in, out] obj The CPU atomic Ulong to get the value from and subtract @a arg from. - * @param arg The value to subtract from @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the subtraction of @a arg. - */ -static inline unsigned long _CPU_atomic_Fetch_sub_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->fetch_sub( arg, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_fetch_sub_explicit( obj, arg, order ); -#else - unsigned long val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = val - arg; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Uintptr and subtracts a value from the stored value. - * - * @param[in, out] obj The CPU atomic Uintptr to get the value from and subtract @a arg from. - * @param arg The value to subtract from @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the subtraction of @a arg. - */ -static inline uintptr_t _CPU_atomic_Fetch_sub_uintptr( CPU_atomic_Uintptr *obj, uintptr_t arg, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->fetch_sub( arg, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_fetch_sub_explicit( obj, arg, order ); -#else - uintptr_t val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = val - arg; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Uint and ORs a value with the stored value. - * - * @param[in, out] obj The CPU atomic Uint to get the value from and OR @a arg to. - * @param arg The value to OR with @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the OR operation with @a arg. - */ -static inline unsigned int _CPU_atomic_Fetch_or_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->fetch_or( arg, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_fetch_or_explicit( obj, arg, order ); -#else - unsigned int val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = val | arg; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Ulong and ORs a value with the stored value. - * - * @param[in, out] obj The CPU atomic Ulong to get the value from and OR @a arg to. - * @param arg The value to OR with @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the OR operation with @a arg. - */ -static inline unsigned long _CPU_atomic_Fetch_or_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->fetch_or( arg, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_fetch_or_explicit( obj, arg, order ); -#else - unsigned long val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = val | arg; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Uintptr and ORs a value with the stored value. - * - * @param[in, out] obj The CPU atomic Uintptr to get the value from and OR @a arg to. - * @param arg The value to OR with @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the OR operation with @a arg. - */ -static inline uintptr_t _CPU_atomic_Fetch_or_uintptr( CPU_atomic_Uintptr *obj, uintptr_t arg, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->fetch_or( arg, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_fetch_or_explicit( obj, arg, order ); -#else - uintptr_t val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = val | arg; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Uint and ANDs a value with the stored value. - * - * @param[in, out] obj The CPU atomic Uint to get the value from and AND @a arg to. - * @param arg The value to AND with @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the AND operation with @a arg. - */ -static inline unsigned int _CPU_atomic_Fetch_and_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->fetch_and( arg, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_fetch_and_explicit( obj, arg, order ); -#else - unsigned int val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = val & arg; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Ulong and ANDs a value with the stored value. - * - * @param[in, out] obj The CPU atomic Ulong to get the value from and AND @a arg to. - * @param arg The value to AND with @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the AND operation with @a arg. - */ -static inline unsigned long _CPU_atomic_Fetch_and_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->fetch_and( arg, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_fetch_and_explicit( obj, arg, order ); -#else - unsigned long val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = val & arg; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Uintptr and ANDs a value with the stored value. - * - * @param[in, out] obj The CPU atomic Uintptr to get the value from and AND @a arg to. - * @param arg The value to AND with @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the AND operation with @a arg. - */ -static inline uintptr_t _CPU_atomic_Fetch_and_uintptr( CPU_atomic_Uintptr *obj, uintptr_t arg, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->fetch_and( arg, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_fetch_and_explicit( obj, arg, order ); -#else - uintptr_t val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = val & arg; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Uint and sets its value. - * - * @param[in, out] obj The CPU atomic Uint to get the value from and set the value to @a desired. - * @param arg The value to set for @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the exchange with @a desired. - */ -static inline unsigned int _CPU_atomic_Exchange_uint( CPU_atomic_Uint *obj, unsigned int desired, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->exchange( desired, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_exchange_explicit( obj, desired, order ); -#else - unsigned int val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = desired; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Ulong and sets its value. - * - * @param[in, out] obj The CPU atomic Ulong to get the value from and set the value to @a desired. - * @param arg The value to set for @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the exchange with @a desired. - */ -static inline unsigned long _CPU_atomic_Exchange_ulong( CPU_atomic_Ulong *obj, unsigned long desired, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->exchange( desired, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_exchange_explicit( obj, desired, order ); -#else - unsigned long val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = desired; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Fetches current value of Uintptr and sets its value. - * - * @param[in, out] obj The CPU atomic Uintptr to get the value from and set the value to @a desired. - * @param arg The value to set for @a obj. - * @param order The atomic order for the operation. - * - * @return The value of @a obj prior to the exchange with @a desired. - */ -static inline uintptr_t _CPU_atomic_Exchange_uintptr( CPU_atomic_Uintptr *obj, uintptr_t desired, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->exchange( desired, order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_exchange_explicit( obj, desired, order ); -#else - uintptr_t val; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - val = *obj; - *obj = desired; - _ISR_Local_enable( level ); - - return val; -#endif -} - -/** - * @brief Checks if value of Uint is as expected. - * - * This method checks if the value of @a obj is equal to the value of @a expected. If - * this is the case, the value of @a obj is changed to @a desired. Otherwise, the value - * of @a obj is changed to @a expected. - * - * @param[in, out] obj The CPU atomic Uint to operate upon. - * @param[in, out] expected The expected value of @a obj. If @a obj has a different - * value, @a expected is changed to the actual value of @a obj. - * @param desired The new value of @a obj if the old value of @a obj was as expected. - * @param succ The order if it is successful. - * @param fail The order if it fails. - * - * @retval true The old value of @a obj was as expected. - * @retval false The old value of @a obj was not as expected. - */ -static inline bool _CPU_atomic_Compare_exchange_uint( CPU_atomic_Uint *obj, unsigned int *expected, unsigned int desired, CPU_atomic_Order succ, CPU_atomic_Order fail ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->compare_exchange_strong( *expected, desired, succ, fail ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail ); -#else - bool success; - ISR_Level level; - unsigned int actual; - - (void) succ; - (void) fail; - _ISR_Local_disable( level ); - actual = *obj; - success = ( actual == *expected ); - if ( success ) { - *obj = desired; - } else { - *expected = actual; - } - _ISR_Local_enable( level ); - - return success; -#endif -} - -/** - * @brief Checks if value of Ulong is as expected. - * - * This method checks if the value of @a obj is equal to the value of @a expected. If - * this is the case, the value of @a obj is changed to @a desired. Otherwise, the value - * of @a obj is changed to @a expected. - * - * @param[in, out] obj The CPU atomic Ulong to operate upon. - * @param[in, out] expected The expected value of @a obj. If @a obj has a different - * value, @a expected is changed to the actual value of @a obj. - * @param desired The new value of @a obj if the old value of @a obj was as expected. - * @param succ The order if it is successful. - * @param fail The order if it fails. - * - * @retval true The old value of @a obj was as expected. - * @retval false The old value of @a obj was not as expected. - */ -static inline bool _CPU_atomic_Compare_exchange_ulong( CPU_atomic_Ulong *obj, unsigned long *expected, unsigned long desired, CPU_atomic_Order succ, CPU_atomic_Order fail ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->compare_exchange_strong( *expected, desired, succ, fail ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail ); -#else - bool success; - ISR_Level level; - unsigned long actual; - - (void) succ; - (void) fail; - _ISR_Local_disable( level ); - actual = *obj; - success = ( actual == *expected ); - if ( success ) { - *obj = desired; - } else { - *expected = actual; - } - _ISR_Local_enable( level ); - - return success; -#endif -} - -/** - * @brief Checks if value of Uintptr is as expected. - * - * This method checks if the value of @a obj is equal to the value of @a expected. If - * this is the case, the value of @a obj is changed to @a desired. Otherwise, the value - * of @a obj is changed to @a expected. - * - * @param[in, out] obj The CPU atomic Uintptr to operate upon. - * @param[in, out] expected The expected value of @a obj. If @a obj has a different - * value, @a expected is changed to the actual value of @a obj. - * @param desired The new value of @a obj if the old value of @a obj was as expected. - * @param succ The order if it is successful. - * @param fail The order if it fails. - * - * @retval true The old value of @a obj was as expected. - * @retval false The old value of @a obj was not as expected. - */ -static inline bool _CPU_atomic_Compare_exchange_uintptr( CPU_atomic_Uintptr *obj, uintptr_t *expected, uintptr_t desired, CPU_atomic_Order succ, CPU_atomic_Order fail ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->compare_exchange_strong( *expected, desired, succ, fail ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail ); -#else - bool success; - ISR_Level level; - uintptr_t actual; - - (void) succ; - (void) fail; - _ISR_Local_disable( level ); - actual = *obj; - success = ( actual == *expected ); - if ( success ) { - *obj = desired; - } else { - *expected = actual; - } - _ISR_Local_enable( level ); - - return success; -#endif -} - -/** - * @brief Clears the atomic flag. - * - * @param[out] obj The atomic flag to be cleared. - * @param order The atomic order for the operation. - */ -static inline void _CPU_atomic_Flag_clear( CPU_atomic_Flag *obj, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - obj->clear( order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - atomic_flag_clear_explicit( obj, order ); -#else - (void) order; - *obj = false; -#endif -} - -/** - * @brief Returns current flag state and sets it. - * - * @param[in, out] obj The atomic flag to be set. - * @param order The atomic order for the operation. - * - * @retval true @a obj was set prior to this operation. - * @retval false @a obj was not set prior to this operation. - */ -static inline bool _CPU_atomic_Flag_test_and_set( CPU_atomic_Flag *obj, CPU_atomic_Order order ) -{ -#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) - return obj->test_and_set( order ); -#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) - return atomic_flag_test_and_set_explicit( obj, order ); -#else - bool flag; - ISR_Level level; - - (void) order; - _ISR_Local_disable( level ); - flag = *obj; - *obj = true; - _ISR_Local_enable( level ); - - return flag; -#endif -} - -/** @} */ - -#endif /* _RTEMS_SCORE_CPUSTDATOMIC_H */ diff --git a/cpukit/include/rtems/score/gcov.h b/cpukit/include/rtems/score/gcov.h deleted file mode 100644 index b150c9f763..0000000000 --- a/cpukit/include/rtems/score/gcov.h +++ /dev/null @@ -1,87 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * @file - * - * @ingroup RTEMSScoreGcov - * - * @brief This header file provides the interfaces of the - * @ref RTEMSScoreGcov. - */ - -/* - * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_GCOV_H -#define _RTEMS_SCORE_GCOV_H - -#include <gcov.h> - -#include <rtems/linkersets.h> -#include <rtems/score/io.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup RTEMSScoreGcov Gcov Support - * - * @ingroup RTEMSScore - * - * @brief This group contains the gocv support. - * - * @{ - */ - -RTEMS_LINKER_ROSET_DECLARE( gcov_info, const struct gcov_info * ); - -/** - * @brief Dumps the gcov information as a binary gcfn and gcda data - * stream using the put character handler. - * - * @param put_char is the put character handler used to output the data stream. - * - * @param arg is the argument passed to the put character handler. - */ -void _Gcov_Dump_info( IO_Put_char put_char, void *arg ); - -/** - * @brief Dumps the gcov information as a base64 encoded gcfn and gcda data - * stream using the put character handler. - * - * @param put_char is the put character handler used to output the data stream. - * - * @param arg is the argument passed to the put character handler. - */ -void _Gcov_Dump_info_base64( IO_Put_char put_char, void *arg ); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* _RTEMS_SCORE_GCOV_H */ diff --git a/cpukit/include/rtems/score/hash.h b/cpukit/include/rtems/score/hash.h index 06c88c6948..666407a791 100644 --- a/cpukit/include/rtems/score/hash.h +++ b/cpukit/include/rtems/score/hash.h @@ -10,7 +10,7 @@ */ /* - * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2021 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/interr.h b/cpukit/include/rtems/score/interr.h index ae4966d6d8..003e80e0bd 100644 --- a/cpukit/include/rtems/score/interr.h +++ b/cpukit/include/rtems/score/interr.h @@ -229,6 +229,9 @@ typedef enum { INTERNAL_ERROR_NO_MEMORY_FOR_PER_CPU_DATA = 40, INTERNAL_ERROR_TOO_LARGE_TLS_SIZE = 41, INTERNAL_ERROR_RTEMS_INIT_TASK_CONSTRUCT_FAILED = 42, + INTERNAL_ERROR_IDLE_THREAD_CREATE_FAILED = 43, + INTERNAL_ERROR_NO_MEMORY_FOR_IDLE_TASK_STORAGE = 44, + INTERNAL_ERROR_IDLE_THREAD_STACK_TOO_SMALL = 45 } Internal_errors_Core_list; typedef CPU_Uint32ptr Internal_errors_t; diff --git a/cpukit/include/rtems/score/io.h b/cpukit/include/rtems/score/io.h deleted file mode 100644 index 106418f185..0000000000 --- a/cpukit/include/rtems/score/io.h +++ /dev/null @@ -1,150 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * @file - * - * @ingroup RTEMSScoreIO - * - * @brief This header file provides the interfaces of the - * @ref RTEMSScoreIO. - */ - -/* - * Copyright (c) 2017 embedded brains GmbH. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_IO_H -#define _RTEMS_SCORE_IO_H - -#include <rtems/score/basedefs.h> - -#include <stdarg.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup RTEMSScoreIO IO Handler - * - * @ingroup RTEMSScore - * - * @brief This group contains the IO Handler implementation. - * - * @{ - */ - -typedef void ( *IO_Put_char )( int c, void *arg ); - -int _IO_Printf( - IO_Put_char put_char, - void *arg, - char const *fmt, - ... -) RTEMS_PRINTFLIKE( 3, 4 ); - -int _IO_Vprintf( - IO_Put_char put_char, - void *arg, - char const *fmt, - va_list ap -); - -/** - * @brief Outputs the source buffer in base64 encoding. - * - * After word length of output characters produced by the encoding a word break - * is produced. - * - * @param put_char is the put character function used to output the encoded - * source buffer. - * - * @param arg is the argument passed to the put character function. - * - * @param src is the pointer to the source buffer begin. - * - * @param srclen is the length of the source buffer in bytes. - * - * @param wordbreak is the word break string. - * - * @param wordlen is the word length in bytes. If the word length is less than - * four, then a word length of four will be used. - * - * @return Returns the count of output characters. - */ -int _IO_Base64( - IO_Put_char put_char, - void *arg, - const void *src, - size_t len, - const char *wordbreak, - int wordlen -); - -/** - * @brief Outputs the source buffer in base64url encoding. - * - * After word length of output characters produced by the encoding a word break - * is produced. - * - * @param put_char is the put character function used to output the encoded - * source buffer. - * - * @param arg is the argument passed to the put character function. - * - * @param src is the pointer to the source buffer begin. - * - * @param srclen is the length of the source buffer in bytes. - * - * @param wordbreak is the word break string. - * - * @param wordlen is the word length in bytes. If the word length is less than - * four, then a word length of four will be used. - * - * @return Returns the count of output characters. - */ -int _IO_Base64url( - IO_Put_char put_char, - void *arg, - const void *src, - size_t len, - const char *wordbreak, - int wordlen -); - -/** - * @brief Issues a couple of no-operation instructions. - * - * This function may be used to burn a couple of processor cycles with minimum - * impact on the system bus. It may be used in busy wait loops. - */ -void _IO_Relax( void ); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* _RTEMS_SCORE_IO_H */ diff --git a/cpukit/include/rtems/score/isr.h b/cpukit/include/rtems/score/isr.h index bb1f3cee50..96ad816245 100644 --- a/cpukit/include/rtems/score/isr.h +++ b/cpukit/include/rtems/score/isr.h @@ -98,7 +98,11 @@ extern ISR_Handler_entry _ISR_Vector_table[ CPU_INTERRUPT_NUMBER_OF_VECTORS ]; #endif /** - * @brief Global symbol with a value equal to the configure interrupt stack size. + * @brief Provides the configured interrupt stack size through an address. + * + * The address of this global symbol is equal to the configured interrupt stack + * size. The address of this symbol has an arbitrary value an may not be + * representable in the code model used by the compiler. * * This global symbol is defined by the application configuration option * CONFIGURE_INIT_TASK_STACK_SIZE via <rtems/confdefs.h>. @@ -106,6 +110,14 @@ extern ISR_Handler_entry _ISR_Vector_table[ CPU_INTERRUPT_NUMBER_OF_VECTORS ]; RTEMS_DECLARE_GLOBAL_SYMBOL( _ISR_Stack_size ); /** + * @brief Provides the configured interrupt stack size through an object. + * + * This object is provided to avoid issues with the _ISR_Stack_size symbol + * address and the code model used by the compiler. + */ +extern const char * const volatile _ISR_Stack_size_object; + +/** * @brief The interrupt stack area begin. * * The interrupt stack area is defined by the application configuration via diff --git a/cpukit/include/rtems/score/isrlock.h b/cpukit/include/rtems/score/isrlock.h index 72ac760196..7586624f9d 100644 --- a/cpukit/include/rtems/score/isrlock.h +++ b/cpukit/include/rtems/score/isrlock.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2013, 2019 embedded brains GmbH. All rights reserved. + * Copyright (C) 2013, 2019 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/memory.h b/cpukit/include/rtems/score/memory.h index 7eceef360b..a593d98d76 100644 --- a/cpukit/include/rtems/score/memory.h +++ b/cpukit/include/rtems/score/memory.h @@ -10,7 +10,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2019, 2022 embedded brains GmbH + * Copyright (C) 2019, 2022 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/mpci.h b/cpukit/include/rtems/score/mpci.h index 874c195e95..796c881929 100644 --- a/cpukit/include/rtems/score/mpci.h +++ b/cpukit/include/rtems/score/mpci.h @@ -40,9 +40,6 @@ #define _RTEMS_SCORE_MPCI_H #include <rtems/score/mppkt.h> -#include <rtems/score/thread.h> -#include <rtems/score/threadq.h> -#include <rtems/score/watchdog.h> #ifdef __cplusplus extern "C" { diff --git a/cpukit/include/rtems/score/mpciimpl.h b/cpukit/include/rtems/score/mpciimpl.h index b646d4be4d..d0c2d0558a 100644 --- a/cpukit/include/rtems/score/mpciimpl.h +++ b/cpukit/include/rtems/score/mpciimpl.h @@ -39,6 +39,9 @@ #define _RTEMS_SCORE_MPCIIMPL_H #include <rtems/score/mpci.h> +#include <rtems/score/thread.h> +#include <rtems/score/threadq.h> +#include <rtems/score/watchdog.h> #include <rtems/score/status.h> #ifdef __cplusplus diff --git a/cpukit/include/rtems/score/mrsp.h b/cpukit/include/rtems/score/mrsp.h index 266e52fc60..cd9b0a046d 100644 --- a/cpukit/include/rtems/score/mrsp.h +++ b/cpukit/include/rtems/score/mrsp.h @@ -11,7 +11,7 @@ */ /* - * Copyright (c) 2014, 2016 embedded brains GmbH. All rights reserved. + * Copyright (C) 2014, 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/mrspimpl.h b/cpukit/include/rtems/score/mrspimpl.h index 4a5e68fa41..fd783bf2a0 100644 --- a/cpukit/include/rtems/score/mrspimpl.h +++ b/cpukit/include/rtems/score/mrspimpl.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2014, 2019 embedded brains GmbH. All rights reserved. + * Copyright (C) 2014, 2019 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -130,6 +130,7 @@ static inline Priority_Control _MRSP_Get_priority( uint32_t scheduler_index; scheduler_index = _Scheduler_Get_index( scheduler ); + _Assert( scheduler_index < _Scheduler_Count ); return mrsp->ceiling_priorities[ scheduler_index ]; } @@ -149,6 +150,7 @@ static inline void _MRSP_Set_priority( uint32_t scheduler_index; scheduler_index = _Scheduler_Get_index( scheduler ); + _Assert( scheduler_index < _Scheduler_Count ); mrsp->ceiling_priorities[ scheduler_index ] = new_priority; } diff --git a/cpukit/include/rtems/score/muteximpl.h b/cpukit/include/rtems/score/muteximpl.h index c024a00060..aa76b7e7b8 100644 --- a/cpukit/include/rtems/score/muteximpl.h +++ b/cpukit/include/rtems/score/muteximpl.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2015, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2015, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/objectimpl.h b/cpukit/include/rtems/score/objectimpl.h index c58957ccb5..a1a87b5ccb 100644 --- a/cpukit/include/rtems/score/objectimpl.h +++ b/cpukit/include/rtems/score/objectimpl.h @@ -542,9 +542,7 @@ static inline bool _Objects_Is_api_valid( uint32_t the_api ) { - if ( !the_api || the_api > OBJECTS_APIS_LAST ) - return false; - return true; + return ( 1 <= the_api && the_api <= OBJECTS_APIS_LAST ); } /** diff --git a/cpukit/include/rtems/score/onceimpl.h b/cpukit/include/rtems/score/onceimpl.h index 2060a376a2..9552cc0a67 100644 --- a/cpukit/include/rtems/score/onceimpl.h +++ b/cpukit/include/rtems/score/onceimpl.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2014, 2019 embedded brains GmbH. All rights reserved. + * Copyright (C) 2014, 2019 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/percpu.h b/cpukit/include/rtems/score/percpu.h index f740ed2a00..288445bc6f 100644 --- a/cpukit/include/rtems/score/percpu.h +++ b/cpukit/include/rtems/score/percpu.h @@ -13,7 +13,7 @@ * COPYRIGHT (c) 1989-2011. * On-Line Applications Research Corporation (OAR). * - * Copyright (c) 2012, 2018 embedded brains GmbH + * Copyright (C) 2012, 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/percpudata.h b/cpukit/include/rtems/score/percpudata.h index 07045525bc..817adde232 100644 --- a/cpukit/include/rtems/score/percpudata.h +++ b/cpukit/include/rtems/score/percpudata.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2018 embedded brains GmbH. All rights reserved. + * Copyright (c) 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/priority.h b/cpukit/include/rtems/score/priority.h index aa29fef8c0..bbb8fd03f2 100644 --- a/cpukit/include/rtems/score/priority.h +++ b/cpukit/include/rtems/score/priority.h @@ -14,7 +14,7 @@ * COPYRIGHT (c) 1989-2011. * On-Line Applications Research Corporation (OAR). * - * Copyright (c) 2016, 2017 embedded brains GmbH. + * Copyright (C) 2016, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/priorityimpl.h b/cpukit/include/rtems/score/priorityimpl.h index ccd4cd7c64..2a95ea605c 100644 --- a/cpukit/include/rtems/score/priorityimpl.h +++ b/cpukit/include/rtems/score/priorityimpl.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2016 embedded brains GmbH. All rights reserved. + * Copyright (c) 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/processormask.h b/cpukit/include/rtems/score/processormask.h index bcdc1c471e..71ed37cd0e 100644 --- a/cpukit/include/rtems/score/processormask.h +++ b/cpukit/include/rtems/score/processormask.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2016, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2016, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -39,9 +39,7 @@ #include <rtems/score/cpu.h> -#include <sys/cpuset.h> - -#include <strings.h> +#include <sys/_bitset.h> #ifdef __cplusplus extern "C" { @@ -123,381 +121,6 @@ extern "C" { */ typedef __BITSET_DEFINE( Processor_mask, CPU_MAXIMUM_PROCESSORS ) Processor_mask; -/** - * @brief Sets the bits of the mask to zero, also considers CPU_MAXIMUM_PROCESSORS. - * - * @param[out] mask The mask to set to zero. - */ -static inline void _Processor_mask_Zero( Processor_mask *mask ) -{ - __BIT_ZERO( CPU_MAXIMUM_PROCESSORS, mask ); -} - -/** - * @brief Checks if the mask is zero, also considers CPU_MAXIMUM_PROCESSORS. - * - * @param mask The mask to check whether is is zero - * - * @retval true The mask is zero. - * @retval false The mask is not zero. - */ -static inline bool _Processor_mask_Is_zero( const Processor_mask *mask ) -{ - return __BIT_EMPTY( CPU_MAXIMUM_PROCESSORS, mask ); -} - -/** - * @brief Fills the mask, also considers CPU_MAXIMUM_PROCESSORS. - * - * @param[out] mask The mask to fill - */ -static inline void _Processor_mask_Fill( Processor_mask *mask ) -{ - __BIT_FILL( CPU_MAXIMUM_PROCESSORS, mask ); -} - -/** - * @brief Copies the mask to another mask, also considers CPU_MAXIMUM_PROCESSORS. - * - * @param[out] dst The mask to copy @a src to. - * @param src The mask to copy to @a dst. - */ -static inline void _Processor_mask_Assign( - Processor_mask *dst, const Processor_mask *src -) -{ - __BIT_COPY( CPU_MAXIMUM_PROCESSORS, src, dst ); -} - -/** - * @brief Sets the specified index bit of the mask. - * - * @param[out] mask The mask to set the bit of. - * @param index The index of the bit that shall be set. - */ -static inline void _Processor_mask_Set( - Processor_mask *mask, - uint32_t index -) -{ - __BIT_SET( CPU_MAXIMUM_PROCESSORS, index, mask ); -} - -/** - * @brief Clears the specified index bit of the mask. - * - * @param[out] mask The mask to clear the bit of. - * @param index The index of the bit that shall be cleared. - */ -static inline void _Processor_mask_Clear( - Processor_mask *mask, - uint32_t index -) -{ - __BIT_CLR( CPU_MAXIMUM_PROCESSORS, index, mask ); -} - -/** - * @brief Checks if the specified index bit of the mask is set. - * - * @param mask The mask to check if the specified bit is set. - * @param index The index of the bit that is checked. - * - * @retval true The specified index bit is set. - * @retval false The specified index bit is not set. - */ -static inline bool _Processor_mask_Is_set( - const Processor_mask *mask, - uint32_t index -) -{ - return __BIT_ISSET( CPU_MAXIMUM_PROCESSORS, index, mask ); -} - -/** - * @brief Checks if the processor sets a and b are equal. - * - * @param a The first processor set. - * @param b The seconde processor set. - * - * @retval true The processor sets a and b are equal. - * @retval false The processor sets a and b are not equal. - */ -static inline bool _Processor_mask_Is_equal( - const Processor_mask *a, - const Processor_mask *b -) -{ - return !__BIT_CMP( CPU_MAXIMUM_PROCESSORS, a, b ); -} - -/** - * @brief Checks if the intersection of the processor sets a and b is - * non-empty. - * - * @param a The first processor set. - * @param b The second processor set. - * - * @retval true The intersection of the processor sets a and b is non-empty. - * @retval false The intersection of the processor sets a and b is empty. - */ -static inline bool _Processor_mask_Has_overlap( - const Processor_mask *a, - const Processor_mask *b -) -{ - return __BIT_OVERLAP( CPU_MAXIMUM_PROCESSORS, a, b ); -} - -/** - * @brief Checks if the processor set small is a subset of processor set - * big. - * - * @param big The bigger processor set. - * @param small The smaller processor set. - * - * @retval true @a small is a subset of @a big. - * @retval false @a small is not a subset of @a big. - */ -static inline bool _Processor_mask_Is_subset( - const Processor_mask *big, - const Processor_mask *small -) -{ - return __BIT_SUBSET( CPU_MAXIMUM_PROCESSORS, big, small ); -} - -/** - * @brief Performs a bitwise a = b & c. - * - * @param[out] a The processor mask that is set by this operation. - * @param b The first parameter of the AND-operation. - * @param c The second parameter of the AND-operation. - */ -static inline void _Processor_mask_And( - Processor_mask *a, - const Processor_mask *b, - const Processor_mask *c -) -{ - __BIT_AND2( CPU_MAXIMUM_PROCESSORS, a, b, c ); -} - -/** - * @brief Performs a bitwise a = b | c. - * - * @param[out] a The processor mask that is set by this operation. - * @param b The first parameter of the OR-operation. - * @param c The second parameter of the OR-operation. - */ -static inline void _Processor_mask_Or( - Processor_mask *a, - const Processor_mask *b, - const Processor_mask *c -) -{ - __BIT_OR2( CPU_MAXIMUM_PROCESSORS, a, b, c ); -} - -/** - * @brief Performs a bitwise a = b ^ c. - * - * @param[out] a The processor mask that is set by this operation. - * @param b The first parameter of the XOR-operation. - * @param c The second parameter of the XOR-operation. - */ -static inline void _Processor_mask_Xor( - Processor_mask *a, - const Processor_mask *b, - const Processor_mask *c -) -{ - __BIT_XOR2( CPU_MAXIMUM_PROCESSORS, a, b, c ); -} - -/** - * @brief Gets the number of set bits in the processor mask. - * - * @param a The processor mask of which the set bits are counted. - * - * @return The number of set bits in @a a. - */ -static inline uint32_t _Processor_mask_Count( const Processor_mask *a ) -{ - return (uint32_t) __BIT_COUNT( CPU_MAXIMUM_PROCESSORS, a ); -} - -/** - * @brief Finds the last set of the processor mask. - * - * @param a The processor mask wo find the last set of. - * - * @return The last set of @a a. - */ -static inline uint32_t _Processor_mask_Find_last_set( const Processor_mask *a ) -{ - return (uint32_t) __BIT_FLS( CPU_MAXIMUM_PROCESSORS, a ); -} - -/** - * @brief Returns the subset of 32 processors containing the specified index as - * an unsigned 32-bit integer. - * - * @param mask The processor mask. - * @param index The specified index. - * - * @return The subset containing the specified index as an unsigned 32-bit integer. - */ -static inline uint32_t _Processor_mask_To_uint32_t( - const Processor_mask *mask, - uint32_t index -) -{ - long bits = mask->__bits[ __bitset_words( index ) ]; - - return (uint32_t) (bits >> (32 * (index % _BITSET_BITS) / 32)); -} - -/** - * @brief Creates a processor set from an unsigned 32-bit integer relative to - * the specified index. - * - * @param[out] mask The mask that is created. - * @param bits The bits for creating the mask. - * @param index The index to which the mask is relative. - */ -static inline void _Processor_mask_From_uint32_t( - Processor_mask *mask, - uint32_t bits, - uint32_t index -) -{ - _Processor_mask_Zero( mask ); - mask->__bits[ __bitset_words( index ) ] = ((long) bits) << (32 * (index % _BITSET_BITS) / 32); -} - -/** - * @brief Creates a processor set from the specified index. - * - * @param[out] The mask that is created. - * @param index The specified index. - */ -static inline void _Processor_mask_From_index( - Processor_mask *mask, - uint32_t index -) -{ - __BIT_SETOF( CPU_MAXIMUM_PROCESSORS, (int) index, mask ); -} - -typedef enum { - PROCESSOR_MASK_COPY_LOSSLESS, - PROCESSOR_MASK_COPY_PARTIAL_LOSS, - PROCESSOR_MASK_COPY_COMPLETE_LOSS, - PROCESSOR_MASK_COPY_INVALID_SIZE -} Processor_mask_Copy_status; - -/** - * @brief Checks if the copy status guarantees at most partial loss. - * - * @param status The copy status to check. - * - * @retval true At most partial loss can be guaranteed. - * @retval false The status indicates more than partial loss. - */ -static inline bool _Processor_mask_Is_at_most_partial_loss( - Processor_mask_Copy_status status -) -{ - return (unsigned int) status <= PROCESSOR_MASK_COPY_PARTIAL_LOSS; -} - -/** - * @brief Copies one mask to another. - * - * @param[out] dst The destination of the copy operation. - * @param dst_size The size of @a dst. - * @param src The source of the copy operation. - * @param src_size The size of @a src. - * - * @retval PROCESSOR_MASK_COPY_LOSSLESS It is guaranteed that the copy - * operation is lossless. - * @retval PROCESSOR_MASK_COPY_PARTIAL_LOSS Partial loss happened due - * to the sizes of @a src and @a dst. - * @retval PROCESSOR_MASK_COPY_COMPLETE_LOSS Complete loss happened due - * to the sizes of @a src and @a dst. - * @retval PROCESSOR_MASK_COPY_INVALID_SIZE One of the arguments sizes - * is invalid (bigger than the size of a long). - */ -Processor_mask_Copy_status _Processor_mask_Copy( - long *dst, - size_t dst_size, - const long *src, - size_t src_size -); - -/** - * @brief Copies one mask to another. - * - * @param src The source for the copy operation. - * @param dst_size The size of @a dst. - * @param[out] dst The destination for the copy operation. - * - * @retval PROCESSOR_MASK_COPY_LOSSLESS It is guaranteed that the copy - * operation is lossless. - * @retval PROCESSOR_MASK_COPY_PARTIAL_LOSS Partial loss happened due - * to the sizes of @a src and @a dst. - * @retval PROCESSOR_MASK_COPY_COMPLETE_LOSS Complete loss happened due - * to the sizes of @a src and @a dst. - * @retval PROCESSOR_MASK_COPY_INVALID_SIZE One of the arguments sizes - * is invalid (bigger than the size of a long). - */ -static inline Processor_mask_Copy_status _Processor_mask_To_cpu_set_t( - const Processor_mask *src, - size_t dst_size, - cpu_set_t *dst -) -{ - return _Processor_mask_Copy( - &dst->__bits[ 0 ], - dst_size, - &src->__bits[ 0 ], - sizeof( *src ) - ); -} - -/** - * @brief Copies one mask to another. - * - * @param src The source for the copy operation. - * @param src_size The size of @a src. - * @param[out] dst The destination for the copy operation. - * - * @retval PROCESSOR_MASK_COPY_LOSSLESS It is guaranteed that the copy - * operation is lossless. - * @retval PROCESSOR_MASK_COPY_PARTIAL_LOSS Partial loss happened due - * to the sizes of @a src and @a dst. - * @retval PROCESSOR_MASK_COPY_COMPLETE_LOSS Complete loss happened due - * to the sizes of @a src and @a dst. - * @retval PROCESSOR_MASK_COPY_INVALID_SIZE One of the arguments sizes - * is invalid (bigger than the size of a long). - */ -static inline Processor_mask_Copy_status _Processor_mask_From_cpu_set_t( - Processor_mask *dst, - size_t src_size, - const cpu_set_t *src -) -{ - return _Processor_mask_Copy( - &dst->__bits[ 0 ], - sizeof( *dst ), - &src->__bits[ 0 ], - src_size - ); -} - -extern const Processor_mask _Processor_mask_The_one_and_only; - /** @} */ #ifdef __cplusplus diff --git a/cpukit/include/rtems/score/processormaskimpl.h b/cpukit/include/rtems/score/processormaskimpl.h new file mode 100644 index 0000000000..bc997edfd4 --- /dev/null +++ b/cpukit/include/rtems/score/processormaskimpl.h @@ -0,0 +1,437 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSScoreProcessorMask + * + * @brief This header file provides the interfaces of the + * @ref RTEMSScoreProcessorMask. + */ + +/* + * Copyright (C) 2016, 2017 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RTEMS_SCORE_PROCESSORMASKIMPL_H +#define _RTEMS_SCORE_PROCESSORMASKIMPL_H + +#include <rtems/score/processormask.h> + +#include <sys/cpuset.h> + +#include <strings.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +/** + * @addtogroup RTEMSScoreProcessorMask + * + * @{ + */ + +/** + * @brief Sets the bits of the mask to zero, also considers CPU_MAXIMUM_PROCESSORS. + * + * @param[out] mask The mask to set to zero. + */ +static inline void _Processor_mask_Zero( Processor_mask *mask ) +{ + __BIT_ZERO( CPU_MAXIMUM_PROCESSORS, mask ); +} + +/** + * @brief Checks if the mask is zero, also considers CPU_MAXIMUM_PROCESSORS. + * + * @param mask The mask to check whether is is zero + * + * @retval true The mask is zero. + * @retval false The mask is not zero. + */ +static inline bool _Processor_mask_Is_zero( const Processor_mask *mask ) +{ + return __BIT_EMPTY( CPU_MAXIMUM_PROCESSORS, mask ); +} + +/** + * @brief Fills the mask, also considers CPU_MAXIMUM_PROCESSORS. + * + * @param[out] mask The mask to fill + */ +static inline void _Processor_mask_Fill( Processor_mask *mask ) +{ + __BIT_FILL( CPU_MAXIMUM_PROCESSORS, mask ); +} + +/** + * @brief Copies the mask to another mask, also considers CPU_MAXIMUM_PROCESSORS. + * + * @param[out] dst The mask to copy @a src to. + * @param src The mask to copy to @a dst. + */ +static inline void _Processor_mask_Assign( + Processor_mask *dst, const Processor_mask *src +) +{ + __BIT_COPY( CPU_MAXIMUM_PROCESSORS, src, dst ); +} + +/** + * @brief Sets the specified index bit of the mask. + * + * @param[out] mask The mask to set the bit of. + * @param index The index of the bit that shall be set. + */ +static inline void _Processor_mask_Set( + Processor_mask *mask, + uint32_t index +) +{ + __BIT_SET( CPU_MAXIMUM_PROCESSORS, index, mask ); +} + +/** + * @brief Clears the specified index bit of the mask. + * + * @param[out] mask The mask to clear the bit of. + * @param index The index of the bit that shall be cleared. + */ +static inline void _Processor_mask_Clear( + Processor_mask *mask, + uint32_t index +) +{ + __BIT_CLR( CPU_MAXIMUM_PROCESSORS, index, mask ); +} + +/** + * @brief Checks if the specified index bit of the mask is set. + * + * @param mask The mask to check if the specified bit is set. + * @param index The index of the bit that is checked. + * + * @retval true The specified index bit is set. + * @retval false The specified index bit is not set. + */ +static inline bool _Processor_mask_Is_set( + const Processor_mask *mask, + uint32_t index +) +{ + return __BIT_ISSET( CPU_MAXIMUM_PROCESSORS, index, mask ); +} + +/** + * @brief Checks if the processor sets a and b are equal. + * + * @param a The first processor set. + * @param b The seconde processor set. + * + * @retval true The processor sets a and b are equal. + * @retval false The processor sets a and b are not equal. + */ +static inline bool _Processor_mask_Is_equal( + const Processor_mask *a, + const Processor_mask *b +) +{ + return !__BIT_CMP( CPU_MAXIMUM_PROCESSORS, a, b ); +} + +/** + * @brief Checks if the intersection of the processor sets a and b is + * non-empty. + * + * @param a The first processor set. + * @param b The second processor set. + * + * @retval true The intersection of the processor sets a and b is non-empty. + * @retval false The intersection of the processor sets a and b is empty. + */ +static inline bool _Processor_mask_Has_overlap( + const Processor_mask *a, + const Processor_mask *b +) +{ + return __BIT_OVERLAP( CPU_MAXIMUM_PROCESSORS, a, b ); +} + +/** + * @brief Checks if the processor set small is a subset of processor set + * big. + * + * @param big The bigger processor set. + * @param small The smaller processor set. + * + * @retval true @a small is a subset of @a big. + * @retval false @a small is not a subset of @a big. + */ +static inline bool _Processor_mask_Is_subset( + const Processor_mask *big, + const Processor_mask *small +) +{ + return __BIT_SUBSET( CPU_MAXIMUM_PROCESSORS, big, small ); +} + +/** + * @brief Performs a bitwise a = b & c. + * + * @param[out] a The processor mask that is set by this operation. + * @param b The first parameter of the AND-operation. + * @param c The second parameter of the AND-operation. + */ +static inline void _Processor_mask_And( + Processor_mask *a, + const Processor_mask *b, + const Processor_mask *c +) +{ + __BIT_AND2( CPU_MAXIMUM_PROCESSORS, a, b, c ); +} + +/** + * @brief Performs a bitwise a = b | c. + * + * @param[out] a The processor mask that is set by this operation. + * @param b The first parameter of the OR-operation. + * @param c The second parameter of the OR-operation. + */ +static inline void _Processor_mask_Or( + Processor_mask *a, + const Processor_mask *b, + const Processor_mask *c +) +{ + __BIT_OR2( CPU_MAXIMUM_PROCESSORS, a, b, c ); +} + +/** + * @brief Performs a bitwise a = b ^ c. + * + * @param[out] a The processor mask that is set by this operation. + * @param b The first parameter of the XOR-operation. + * @param c The second parameter of the XOR-operation. + */ +static inline void _Processor_mask_Xor( + Processor_mask *a, + const Processor_mask *b, + const Processor_mask *c +) +{ + __BIT_XOR2( CPU_MAXIMUM_PROCESSORS, a, b, c ); +} + +/** + * @brief Gets the number of set bits in the processor mask. + * + * @param a The processor mask of which the set bits are counted. + * + * @return The number of set bits in @a a. + */ +static inline uint32_t _Processor_mask_Count( const Processor_mask *a ) +{ + return (uint32_t) __BIT_COUNT( CPU_MAXIMUM_PROCESSORS, a ); +} + +/** + * @brief Finds the last set of the processor mask. + * + * @param a The processor mask wo find the last set of. + * + * @return The last set of @a a. + */ +static inline uint32_t _Processor_mask_Find_last_set( const Processor_mask *a ) +{ + return (uint32_t) __BIT_FLS( CPU_MAXIMUM_PROCESSORS, a ); +} + +/** + * @brief Returns the subset of 32 processors containing the specified index as + * an unsigned 32-bit integer. + * + * @param mask The processor mask. + * @param index The specified index. + * + * @return The subset containing the specified index as an unsigned 32-bit integer. + */ +static inline uint32_t _Processor_mask_To_uint32_t( + const Processor_mask *mask, + uint32_t index +) +{ + long bits = mask->__bits[ index / _BITSET_BITS ]; + + return (uint32_t) ( bits >> ( 32 * ( ( index % _BITSET_BITS ) / 32 ) ) ); +} + +/** + * @brief Creates a processor set from an unsigned 32-bit integer relative to + * the specified index. + * + * @param[out] mask The mask that is created. + * @param bits The bits for creating the mask. + * @param index The index to which the mask is relative. + */ +static inline void _Processor_mask_From_uint32_t( + Processor_mask *mask, + uint32_t bits, + uint32_t index +) +{ + _Processor_mask_Zero( mask ); + mask->__bits[ __bitset_words( index ) ] = ((long) bits) << (32 * (index % _BITSET_BITS) / 32); +} + +/** + * @brief Creates a processor set from the specified index. + * + * @param[out] The mask that is created. + * @param index The specified index. + */ +static inline void _Processor_mask_From_index( + Processor_mask *mask, + uint32_t index +) +{ + __BIT_SETOF( CPU_MAXIMUM_PROCESSORS, (int) index, mask ); +} + +typedef enum { + PROCESSOR_MASK_COPY_LOSSLESS, + PROCESSOR_MASK_COPY_PARTIAL_LOSS, + PROCESSOR_MASK_COPY_COMPLETE_LOSS, + PROCESSOR_MASK_COPY_INVALID_SIZE +} Processor_mask_Copy_status; + +/** + * @brief Checks if the copy status guarantees at most partial loss. + * + * @param status The copy status to check. + * + * @retval true At most partial loss can be guaranteed. + * @retval false The status indicates more than partial loss. + */ +static inline bool _Processor_mask_Is_at_most_partial_loss( + Processor_mask_Copy_status status +) +{ + return (unsigned int) status <= PROCESSOR_MASK_COPY_PARTIAL_LOSS; +} + +/** + * @brief Copies one mask to another. + * + * @param[out] dst The destination of the copy operation. + * @param dst_size The size of @a dst. + * @param src The source of the copy operation. + * @param src_size The size of @a src. + * + * @retval PROCESSOR_MASK_COPY_LOSSLESS It is guaranteed that the copy + * operation is lossless. + * @retval PROCESSOR_MASK_COPY_PARTIAL_LOSS Partial loss happened due + * to the sizes of @a src and @a dst. + * @retval PROCESSOR_MASK_COPY_COMPLETE_LOSS Complete loss happened due + * to the sizes of @a src and @a dst. + * @retval PROCESSOR_MASK_COPY_INVALID_SIZE One of the arguments sizes + * is invalid (bigger than the size of a long). + */ +Processor_mask_Copy_status _Processor_mask_Copy( + long *dst, + size_t dst_size, + const long *src, + size_t src_size +); + +/** + * @brief Copies one mask to another. + * + * @param src The source for the copy operation. + * @param dst_size The size of @a dst. + * @param[out] dst The destination for the copy operation. + * + * @retval PROCESSOR_MASK_COPY_LOSSLESS It is guaranteed that the copy + * operation is lossless. + * @retval PROCESSOR_MASK_COPY_PARTIAL_LOSS Partial loss happened due + * to the sizes of @a src and @a dst. + * @retval PROCESSOR_MASK_COPY_COMPLETE_LOSS Complete loss happened due + * to the sizes of @a src and @a dst. + * @retval PROCESSOR_MASK_COPY_INVALID_SIZE One of the arguments sizes + * is invalid (bigger than the size of a long). + */ +static inline Processor_mask_Copy_status _Processor_mask_To_cpu_set_t( + const Processor_mask *src, + size_t dst_size, + cpu_set_t *dst +) +{ + return _Processor_mask_Copy( + &dst->__bits[ 0 ], + dst_size, + &src->__bits[ 0 ], + sizeof( *src ) + ); +} + +/** + * @brief Copies one mask to another. + * + * @param src The source for the copy operation. + * @param src_size The size of @a src. + * @param[out] dst The destination for the copy operation. + * + * @retval PROCESSOR_MASK_COPY_LOSSLESS It is guaranteed that the copy + * operation is lossless. + * @retval PROCESSOR_MASK_COPY_PARTIAL_LOSS Partial loss happened due + * to the sizes of @a src and @a dst. + * @retval PROCESSOR_MASK_COPY_COMPLETE_LOSS Complete loss happened due + * to the sizes of @a src and @a dst. + * @retval PROCESSOR_MASK_COPY_INVALID_SIZE One of the arguments sizes + * is invalid (bigger than the size of a long). + */ +static inline Processor_mask_Copy_status _Processor_mask_From_cpu_set_t( + Processor_mask *dst, + size_t src_size, + const cpu_set_t *src +) +{ + return _Processor_mask_Copy( + &dst->__bits[ 0 ], + sizeof( *dst ), + &src->__bits[ 0 ], + src_size + ); +} + +extern const Processor_mask _Processor_mask_The_one_and_only; + +/** @} */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* _RTEMS_SCORE_PROCESSORMASKIMPL_H */ diff --git a/cpukit/include/rtems/score/profiling.h b/cpukit/include/rtems/score/profiling.h index 90d441b0d0..af26970dcd 100644 --- a/cpukit/include/rtems/score/profiling.h +++ b/cpukit/include/rtems/score/profiling.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2014 embedded brains GmbH. All rights reserved. + * Copyright (c) 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/protectedheap.h b/cpukit/include/rtems/score/protectedheap.h index 884d7e1c47..287108568a 100644 --- a/cpukit/include/rtems/score/protectedheap.h +++ b/cpukit/include/rtems/score/protectedheap.h @@ -163,59 +163,6 @@ static inline void *_Protected_heap_Allocate( } /** - * @brief Returns the size of the allocatable memory area. - * - * The size value may be greater than the initially requested size in - * _Heap_Allocate_aligned_with_boundary(). - * - * Inappropriate values for @a addr will not corrupt the heap, but may yield - * invalid size values. - * - * This method first locks the allocator and after the operation, unlocks it again. - * - * @param heap The heap to operate upon. - * @param addr The starting address of the allocatable memory area. - * @param[out] size Stores the size of the allocatable memory area after the method call. - * - * @retval true The operation was successful. - * @retval false The operation was not successful. - */ -bool _Protected_heap_Get_block_size( - Heap_Control *heap, - void *addr, - uintptr_t *size -); - -/** - * @brief Resizes the block of the allocated memory area. - * - * Inappropriate values for @a addr may corrupt the heap. - * - * This method first locks the allocator and after the resize, unlocks it again. - * - * @param[in, out] heap The heap to operate upon. - * @param addr The starting address of the allocated memory area to be resized. - * @param size The least possible size for the new memory area. Resize may be - * impossible and depends on the current heap usage. - * @param[out] old_size Stores the size available for allocation in the current - * block before the resize after the method call. - * @param[out] new_size Stores the size available for allocation in the resized - * block after the method call. In the case of an unsuccessful resize, - * zero is returned in this parameter - * - * @retval HEAP_RESIZE_SUCCESSFUL The resize was successful. - * @retval HEAP_RESIZE_UNSATISFIED The least possible size @a size was too big. - * Resize not possible. - * @retval HEAP_RESIZE_FATAL_ERROR The block starting at @a addr is not part of - * the heap. - */ -bool _Protected_heap_Resize_block( - Heap_Control *heap, - void *addr, - uintptr_t size -); - -/** * @brief Frees the allocated memory area. * * Inappropriate values for @a addr may corrupt the heap. This method first locks @@ -245,22 +192,6 @@ bool _Protected_heap_Free( Heap_Control *heap, void *addr ); bool _Protected_heap_Walk( Heap_Control *heap, int source, bool dump ); /** - * @brief Iterates over all blocks of the heap. - * - * This method first locks the allocator and after the operation, unlocks it again. - * - * @param[in, out] heap The heap to iterate over. - * @param visitor This will be called for each heap block with - * the argument @a visitor_arg. - * @param[in, out] visitor_arg The argument for all calls of @a visitor. - */ -void _Protected_heap_Iterate( - Heap_Control *heap, - Heap_Block_visitor visitor, - void *visitor_arg -); - -/** * @brief Returns information about used and free blocks for the heap. * * This method first locks the allocator and after the operation, unlocks it again. diff --git a/cpukit/include/rtems/score/schedulercbsimpl.h b/cpukit/include/rtems/score/schedulercbsimpl.h index 83d4eac9d8..95e19f149d 100644 --- a/cpukit/include/rtems/score/schedulercbsimpl.h +++ b/cpukit/include/rtems/score/schedulercbsimpl.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2014 embedded brains GmbH. All rights reserved. + * Copyright (c) 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/scheduleredfsmp.h b/cpukit/include/rtems/score/scheduleredfsmp.h index ef1a116eb1..f915154241 100644 --- a/cpukit/include/rtems/score/scheduleredfsmp.h +++ b/cpukit/include/rtems/score/scheduleredfsmp.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2017, 2018 embedded brains GmbH. + * Copyright (C) 2017, 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/schedulerimpl.h b/cpukit/include/rtems/score/schedulerimpl.h index 2056408e6a..2ca3e6e8b7 100644 --- a/cpukit/include/rtems/score/schedulerimpl.h +++ b/cpukit/include/rtems/score/schedulerimpl.h @@ -12,7 +12,7 @@ /* * Copyright (C) 2010 Gedare Bloom. * Copyright (C) 2011 On-Line Applications Research Corporation (OAR). - * Copyright (c) 2014, 2017 embedded brains GmbH + * Copyright (C) 2014, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/schedulernode.h b/cpukit/include/rtems/score/schedulernode.h index 0a2de3b6e3..65a33a1485 100644 --- a/cpukit/include/rtems/score/schedulernode.h +++ b/cpukit/include/rtems/score/schedulernode.h @@ -11,7 +11,7 @@ */ /* - * Copyright (c) 2014, 2016 embedded brains GmbH. All rights reserved. + * Copyright (C) 2014, 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/schedulernodeimpl.h b/cpukit/include/rtems/score/schedulernodeimpl.h index ef1813d39c..db14184723 100644 --- a/cpukit/include/rtems/score/schedulernodeimpl.h +++ b/cpukit/include/rtems/score/schedulernodeimpl.h @@ -11,7 +11,7 @@ */ /* - * Copyright (c) 2014, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2014, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/schedulerpriority.h b/cpukit/include/rtems/score/schedulerpriority.h index 1325224fa9..86681cd201 100644 --- a/cpukit/include/rtems/score/schedulerpriority.h +++ b/cpukit/include/rtems/score/schedulerpriority.h @@ -3,10 +3,10 @@ /** * @file * - * @ingroup RTEMSScoreSchedulerDPS + * @ingroup RTEMSScoreSchedulerPriority * * @brief This header file provides interfaces of the - * @ref RTEMSScoreSchedulerDPS which are used by the implementation and the + * @ref RTEMSScoreSchedulerPriority which are used by the implementation and the * @ref RTEMSImplApplConfig. */ @@ -48,7 +48,7 @@ extern "C" { #endif /** - * @defgroup RTEMSScoreSchedulerDPS Deterministic Priority Scheduler + * @defgroup RTEMSScoreSchedulerPriority Deterministic Priority Scheduler * * @ingroup RTEMSScoreScheduler * diff --git a/cpukit/include/rtems/score/schedulerpriorityimpl.h b/cpukit/include/rtems/score/schedulerpriorityimpl.h index eef0de59b1..5e80918b20 100644 --- a/cpukit/include/rtems/score/schedulerpriorityimpl.h +++ b/cpukit/include/rtems/score/schedulerpriorityimpl.h @@ -3,10 +3,10 @@ /** * @file * - * @ingroup RTEMSScoreSchedulerDPS + * @ingroup RTEMSScoreSchedulerPriority * * @brief This header file provides interfaces of the - * @ref RTEMSScoreSchedulerDPS which are only used by the implementation. + * @ref RTEMSScoreSchedulerPriority which are only used by the implementation. */ /* @@ -49,7 +49,7 @@ extern "C" { #endif /** - * @addtogroup RTEMSScoreSchedulerDPS + * @addtogroup RTEMSScoreSchedulerPriority * * @{ */ diff --git a/cpukit/include/rtems/score/schedulerprioritysmp.h b/cpukit/include/rtems/score/schedulerprioritysmp.h index af4ad2aaf3..476036b3bd 100644 --- a/cpukit/include/rtems/score/schedulerprioritysmp.h +++ b/cpukit/include/rtems/score/schedulerprioritysmp.h @@ -11,7 +11,7 @@ */ /* - * Copyright (c) 2013, 2018 embedded brains GmbH. All rights reserved. + * Copyright (C) 2013, 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/schedulerprioritysmpimpl.h b/cpukit/include/rtems/score/schedulerprioritysmpimpl.h index c6e2dbb285..12fe6b1004 100644 --- a/cpukit/include/rtems/score/schedulerprioritysmpimpl.h +++ b/cpukit/include/rtems/score/schedulerprioritysmpimpl.h @@ -11,7 +11,7 @@ */ /* - * Copyright (c) 2013, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2013, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/schedulersimplesmp.h b/cpukit/include/rtems/score/schedulersimplesmp.h index 5781a11b2b..4ef34847b8 100644 --- a/cpukit/include/rtems/score/schedulersimplesmp.h +++ b/cpukit/include/rtems/score/schedulersimplesmp.h @@ -12,7 +12,7 @@ /* * Copyright (C) 2011 On-Line Applications Research Corporation (OAR). * - * Copyright (c) 2013, 2018 embedded brains GmbH. + * Copyright (C) 2013, 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/schedulersmp.h b/cpukit/include/rtems/score/schedulersmp.h index f6421504c9..3d1fe86582 100644 --- a/cpukit/include/rtems/score/schedulersmp.h +++ b/cpukit/include/rtems/score/schedulersmp.h @@ -11,7 +11,7 @@ */ /* - * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/schedulersmpimpl.h b/cpukit/include/rtems/score/schedulersmpimpl.h index 93716be256..c1839c4517 100644 --- a/cpukit/include/rtems/score/schedulersmpimpl.h +++ b/cpukit/include/rtems/score/schedulersmpimpl.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2013, 2021 embedded brains GmbH. All rights reserved. + * Copyright (C) 2013, 2021 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/schedulerstrongapa.h b/cpukit/include/rtems/score/schedulerstrongapa.h index 8db3ae8634..9bf0e615b6 100644 --- a/cpukit/include/rtems/score/schedulerstrongapa.h +++ b/cpukit/include/rtems/score/schedulerstrongapa.h @@ -11,7 +11,7 @@ /* * Copyright (C) 2020 Richi Dubey - * Copyright (C) 2013, 2018 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2013, 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/scheduleruniimpl.h b/cpukit/include/rtems/score/scheduleruniimpl.h index 5cc4942fcc..9fe9ec394c 100644 --- a/cpukit/include/rtems/score/scheduleruniimpl.h +++ b/cpukit/include/rtems/score/scheduleruniimpl.h @@ -12,7 +12,7 @@ /* * Copyright (C) 2010 Gedare Bloom. * Copyright (C) 2011 On-Line Applications Research Corporation (OAR). - * Copyright (C) 2014, 2022 embedded brains GmbH + * Copyright (C) 2014, 2022 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/semaphoreimpl.h b/cpukit/include/rtems/score/semaphoreimpl.h index e28375521c..6c0b62adcd 100644 --- a/cpukit/include/rtems/score/semaphoreimpl.h +++ b/cpukit/include/rtems/score/semaphoreimpl.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2015, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2015, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/smpbarrier.h b/cpukit/include/rtems/score/smpbarrier.h index 51dfddae56..fc14859c41 100644 --- a/cpukit/include/rtems/score/smpbarrier.h +++ b/cpukit/include/rtems/score/smpbarrier.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/smpimpl.h b/cpukit/include/rtems/score/smpimpl.h index ef32687bec..a8e3a3be15 100644 --- a/cpukit/include/rtems/score/smpimpl.h +++ b/cpukit/include/rtems/score/smpimpl.h @@ -40,7 +40,7 @@ #include <rtems/score/smp.h> #include <rtems/score/percpu.h> -#include <rtems/score/processormask.h> +#include <rtems/score/processormaskimpl.h> #include <rtems/fatal.h> #ifdef __cplusplus @@ -166,12 +166,9 @@ RTEMS_NO_RETURN void _SMP_Start_multitasking_on_secondary_processor( * @param[in, out] cpu_self is the processor control of the processor executing * this function. * - * @return Returns the processed message. + * @param message is the message to process. */ -long unsigned _SMP_Process_message( - Per_CPU_Control *cpu_self, - long unsigned message -); +void _SMP_Process_message( Per_CPU_Control *cpu_self, long unsigned message ); /** * @brief Tries to process the current SMP message. @@ -200,10 +197,8 @@ void _SMP_Try_to_process_message( * * @param[in, out] cpu_self is the processor control of the processor executing * this function. - * - * @return Returns the processed message. */ -static inline long unsigned _SMP_Inter_processor_interrupt_handler( +static inline void _SMP_Inter_processor_interrupt_handler( Per_CPU_Control *cpu_self ) { @@ -222,10 +217,8 @@ static inline long unsigned _SMP_Inter_processor_interrupt_handler( ); if ( RTEMS_PREDICT_FALSE( message != 0 ) ) { - return _SMP_Process_message( cpu_self, message ); + _SMP_Process_message( cpu_self, message ); } - - return message; } /** diff --git a/cpukit/include/rtems/score/smplock.h b/cpukit/include/rtems/score/smplock.h index ca874fef08..52324fc76c 100644 --- a/cpukit/include/rtems/score/smplock.h +++ b/cpukit/include/rtems/score/smplock.h @@ -13,7 +13,7 @@ * COPYRIGHT (c) 1989-2011. * On-Line Applications Research Corporation (OAR). * - * Copyright (c) 2013, 2016 embedded brains GmbH + * Copyright (C) 2013, 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/smplockmcs.h b/cpukit/include/rtems/score/smplockmcs.h index deb6ddeb3e..89c66e9ebf 100644 --- a/cpukit/include/rtems/score/smplockmcs.h +++ b/cpukit/include/rtems/score/smplockmcs.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2016 embedded brains GmbH + * Copyright (c) 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/smplockseq.h b/cpukit/include/rtems/score/smplockseq.h index d96cc6acaf..be0225b4dc 100644 --- a/cpukit/include/rtems/score/smplockseq.h +++ b/cpukit/include/rtems/score/smplockseq.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2016 embedded brains GmbH + * Copyright (c) 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/smplockstats.h b/cpukit/include/rtems/score/smplockstats.h index cebfb80bd6..913d551418 100644 --- a/cpukit/include/rtems/score/smplockstats.h +++ b/cpukit/include/rtems/score/smplockstats.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2013, 2018 embedded brains GmbH + * Copyright (C) 2013, 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/smplockticket.h b/cpukit/include/rtems/score/smplockticket.h index 1f6172baa8..d317ea5dd2 100644 --- a/cpukit/include/rtems/score/smplockticket.h +++ b/cpukit/include/rtems/score/smplockticket.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2013, 2016 embedded brains GmbH + * Copyright (C) 2013, 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/stack.h b/cpukit/include/rtems/score/stack.h index 360e4d61f6..6746d6991b 100644 --- a/cpukit/include/rtems/score/stack.h +++ b/cpukit/include/rtems/score/stack.h @@ -11,8 +11,8 @@ */ /* - * COPYRIGHT (c) 1989-2006. - * On-Line Applications Research Corporation (OAR). + * Copyright (C) 2022 embedded brains GmbH & Co. KG + * Copyright (C) 1989, 2021 On-Line Applications Research Corporation (OAR) * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -105,15 +105,22 @@ typedef void ( *Stack_Allocator_free )( void *addr ); * The allocate for idle handler is optional even when the user thread stack * allocator and deallocator are configured. * - * @param cpu Index of the CPU for the IDLE thread using this stack - * @param stack_size The size of the stack area to allocate in bytes. + * @param cpu is the index of the CPU for the IDLE thread using this stack. * - * @retval NULL Not enough memory. - * @retval other Pointer to begin of stack area. + * @param stack_size[in, out] is pointer to a size_t object. On function + * entry, the object contains the proposed size of the stack area to allocate + * in bytes. The proposed size does not take the actual thread-local storage + * size of the application into account. The stack allocator can modify the + * size to ensure that there is enough space available in the stack area for + * the thread-local storage. + * + * @retval NULL There was not enough memory available to allocate a stack area. + * + * @return Returns the pointer to begin of the allocated stack area. */ typedef void *( *Stack_Allocator_allocate_for_idle )( uint32_t cpu, - size_t stack_size + size_t *stack_size ); /** @@ -165,7 +172,57 @@ extern const Stack_Allocator_free _Stack_Allocator_free; */ void _Stack_Allocator_do_initialize( void ); -/** @} */ +/** + * @brief Allocates the IDLE thread storage area from the workspace. + * + * If the thread storage area cannot be allocated, then the + * ::INTERNAL_ERROR_NO_MEMORY_FOR_IDLE_TASK_STACK fatal error will occur. + * + * @param unused is an unused parameter. + * + * @param stack_size[in] is pointer to a size_t object. On function entry, the + * object contains the size of the task storage area to allocate in bytes. + * + * @return Returns a pointer to the begin of the allocated task storage area. + */ +void *_Stack_Allocator_allocate_for_idle_workspace( + uint32_t unused, + size_t *storage_size +); + +/** + * @brief The size in bytes of the idle thread storage area used by + * _Stack_Allocator_allocate_for_idle_static(). + * + * Application provided via <rtems/confdefs.h>. + */ +extern const size_t _Stack_Allocator_allocate_for_idle_storage_size; + +/** + * @brief The thread storage areas used by + * _Stack_Allocator_allocate_for_idle_static(). + * + * Application provided via <rtems/confdefs.h>. + */ +extern char _Stack_Allocator_allocate_for_idle_storage_areas[]; + +/** + * @brief Allocates the IDLE thread storage from the memory statically + * allocated by <rtems/confdefs.h>. + * + * @param cpu_index is the index of the CPU for the IDLE thread using this stack. + * + * @param stack_size[out] is pointer to a size_t object. On function return, the + * object value is set to the value of + * ::_Stack_Allocator_allocate_for_idle_storage_size. + * + * @return Returns a pointer to the begin of the allocated task storage area. + */ +void *_Stack_Allocator_allocate_for_idle_static( + uint32_t cpu_index, + size_t *storage_size +); + /** * @brief The stack allocator allocate stack for idle thread handler. * @@ -174,6 +231,8 @@ void _Stack_Allocator_do_initialize( void ); extern const Stack_Allocator_allocate_for_idle _Stack_Allocator_allocate_for_idle; +/** @} */ + #ifdef __cplusplus } #endif diff --git a/cpukit/include/rtems/score/status.h b/cpukit/include/rtems/score/status.h index ac2da9b7d7..7fdf6a9017 100644 --- a/cpukit/include/rtems/score/status.h +++ b/cpukit/include/rtems/score/status.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2016 embedded brains GmbH. All rights reserved. + * Copyright (c) 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/thread.h b/cpukit/include/rtems/score/thread.h index 40fefbc79a..8ca7d85205 100644 --- a/cpukit/include/rtems/score/thread.h +++ b/cpukit/include/rtems/score/thread.h @@ -14,7 +14,7 @@ * COPYRIGHT (c) 1989-2014. * On-Line Applications Research Corporation (OAR). * - * Copyright (c) 2014, 2016 embedded brains GmbH. + * Copyright (C) 2014, 2016 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -719,50 +719,50 @@ typedef struct { * The individual state flags must be a power of two to allow use of bit * operations to manipulate and evaluate the thread life state. */ -typedef enum { - /** - * @brief Indicates that the thread life is protected. - * - * If this flag is set, then the thread restart or delete requests are deferred - * until the protection and deferred change flags are cleared. It is used by - * _Thread_Set_life_protection(). - */ - THREAD_LIFE_PROTECTED = 0x1, +typedef unsigned int Thread_Life_state; - /** - * @brief Indicates that thread is restarting. - * - * If this flag is set, then a thread restart request is in pending. See - * _Thread_Restart_self() and _Thread_Restart_other(). - */ - THREAD_LIFE_RESTARTING = 0x2, +/** + * @brief Indicates that the thread life is protected. + * + * If this flag is set, then the thread restart or delete requests are deferred + * until the protection and deferred change flags are cleared. It is used by + * _Thread_Set_life_protection(). + */ +#define THREAD_LIFE_PROTECTED 0x1U - /** - * @brief Indicates that thread is terminating. - * - * If this flag is set, then a thread termination request is in pending. See - * _Thread_Exit() and _Thread_Cancel(). - */ - THREAD_LIFE_TERMINATING = 0x4, +/** + * @brief Indicates that thread is restarting. + * + * If this flag is set, then a thread restart request is in pending. See + * _Thread_Restart_self() and _Thread_Restart_other(). + */ +#define THREAD_LIFE_RESTARTING 0x2U - /** - * @brief Indicates that thread life changes are deferred. - * - * If this flag is set, then the thread restart or delete requests are deferred - * until the protection and deferred change flags are cleared. It is used by - * pthread_setcanceltype(). - */ - THREAD_LIFE_CHANGE_DEFERRED = 0x8, +/** + * @brief Indicates that thread is terminating. + * + * If this flag is set, then a thread termination request is in pending. See + * _Thread_Exit() and _Thread_Cancel(). + */ +#define THREAD_LIFE_TERMINATING 0x4U - /** - * @brief Indicates that thread is detached. - * - * If this flag is set, then the thread is detached. Detached threads do not - * wait during termination for other threads to join. See rtems_task_delete(), - * rtems_task_exit(), and pthread_detach(). - */ - THREAD_LIFE_DETACHED = 0x10 -} Thread_Life_state; +/** + * @brief Indicates that thread life changes are deferred. + * + * If this flag is set, then the thread restart or delete requests are deferred + * until the protection and deferred change flags are cleared. It is used by + * pthread_setcanceltype(). + */ +#define THREAD_LIFE_CHANGE_DEFERRED 0x8U + +/** + * @brief Indicates that thread is detached. + * + * If this flag is set, then the thread is detached. Detached threads do not + * wait during termination for other threads to join. See rtems_task_delete(), + * rtems_task_exit(), and pthread_detach(). + */ +#define THREAD_LIFE_DETACHED 0x10U /** * @brief Thread life control. @@ -858,6 +858,15 @@ struct _Thread_Control { #endif /*================= end of common block =================*/ + /** + * @brief This member contains the context of this thread. + * + * This member is placed directly after the end of the common block so that + * the structure offsets are as small as possible. This helps on instruction + * set architectures with a very limited range for intermediate values. + */ + Context_Control Registers; + #if defined(RTEMS_SMP) && defined(RTEMS_PROFILING) /** * @brief Potpourri lock statistics. @@ -913,8 +922,6 @@ struct _Thread_Control { Thread_Action_control Post_switch_actions; - /** This field contains the context of this thread. */ - Context_Control Registers; #if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE ) /** This field points to the floating point context for this thread. * If NULL, the thread is integer only. @@ -1179,13 +1186,6 @@ Thread_Information name##_Information = { \ } \ } -/** - * @brief The idle thread stacks. - * - * Provided by the application via <rtems/confdefs.h>. - */ -extern char _Thread_Idle_stacks[]; - #if defined(RTEMS_MULTIPROCESSING) /** * @brief The configured thread control block. diff --git a/cpukit/include/rtems/score/threadcpubudget.h b/cpukit/include/rtems/score/threadcpubudget.h index bcbaa11bdb..e1d18ef6ed 100644 --- a/cpukit/include/rtems/score/threadcpubudget.h +++ b/cpukit/include/rtems/score/threadcpubudget.h @@ -10,7 +10,7 @@ */ /* - * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2021 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/threaddispatch.h b/cpukit/include/rtems/score/threaddispatch.h index 589935823f..b06ebe8fec 100644 --- a/cpukit/include/rtems/score/threaddispatch.h +++ b/cpukit/include/rtems/score/threaddispatch.h @@ -222,16 +222,17 @@ static inline Per_CPU_Control *_Thread_Dispatch_disable_critical( static inline Per_CPU_Control *_Thread_Dispatch_disable( void ) { Per_CPU_Control *cpu_self; - ISR_lock_Context lock_context; #if defined( RTEMS_SMP ) || defined( RTEMS_PROFILING ) + ISR_lock_Context lock_context; + _ISR_lock_ISR_disable( &lock_context ); -#endif cpu_self = _Thread_Dispatch_disable_critical( &lock_context ); -#if defined( RTEMS_SMP ) || defined( RTEMS_PROFILING ) _ISR_lock_ISR_enable( &lock_context ); +#else + cpu_self = _Thread_Dispatch_disable_critical( NULL ); #endif return cpu_self; diff --git a/cpukit/include/rtems/score/threadidledata.h b/cpukit/include/rtems/score/threadidledata.h index 4f2a785ccd..8e458de345 100644 --- a/cpukit/include/rtems/score/threadidledata.h +++ b/cpukit/include/rtems/score/threadidledata.h @@ -11,7 +11,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2020 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/threadimpl.h b/cpukit/include/rtems/score/threadimpl.h index 01c3860db8..36ddb785e9 100644 --- a/cpukit/include/rtems/score/threadimpl.h +++ b/cpukit/include/rtems/score/threadimpl.h @@ -13,7 +13,7 @@ * COPYRIGHT (c) 1989-2008. * On-Line Applications Research Corporation (OAR). * - * Copyright (c) 2014, 2017 embedded brains GmbH. + * Copyright (C) 2014, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -1598,12 +1598,12 @@ static inline Scheduler_Node *_Thread_Scheduler_get_node_by_index( size_t scheduler_index ) { + _Assert( scheduler_index < _Scheduler_Count ); #if defined(RTEMS_SMP) return (Scheduler_Node *) ( (uintptr_t) the_thread->Scheduler.nodes + scheduler_index * _Scheduler_Node_size ); #else - _Assert( scheduler_index == 0 ); (void) scheduler_index; return the_thread->Scheduler.nodes; #endif diff --git a/cpukit/include/rtems/score/threadqops.h b/cpukit/include/rtems/score/threadqops.h index 504383e98d..d05823eefb 100644 --- a/cpukit/include/rtems/score/threadqops.h +++ b/cpukit/include/rtems/score/threadqops.h @@ -10,7 +10,7 @@ */ /* - * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2021 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/timecounter.h b/cpukit/include/rtems/score/timecounter.h index 6559801559..ced3d7c60c 100644 --- a/cpukit/include/rtems/score/timecounter.h +++ b/cpukit/include/rtems/score/timecounter.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2015, 2021 embedded brains GmbH. All rights reserved. + * Copyright (C) 2015, 2021 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/timecounterimpl.h b/cpukit/include/rtems/score/timecounterimpl.h index a1f79f2ee2..ee8f795bba 100644 --- a/cpukit/include/rtems/score/timecounterimpl.h +++ b/cpukit/include/rtems/score/timecounterimpl.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2015 embedded brains GmbH. All rights reserved. + * Copyright (c) 2015 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/timespec.h b/cpukit/include/rtems/score/timespec.h index 2090f19b32..2e419d69de 100644 --- a/cpukit/include/rtems/score/timespec.h +++ b/cpukit/include/rtems/score/timespec.h @@ -3,7 +3,7 @@ /** * @file * - * @ingroup Timespec + * @ingroup RTEMSScoreTimespec * * @brief This header file provides the interfaces of the * @ref RTEMSScoreTimespec. diff --git a/cpukit/include/rtems/score/tls.h b/cpukit/include/rtems/score/tls.h index ee4fb9a22e..8716c5230c 100644 --- a/cpukit/include/rtems/score/tls.h +++ b/cpukit/include/rtems/score/tls.h @@ -10,7 +10,7 @@ */ /* - * Copyright (c) 2014 embedded brains GmbH. All rights reserved. + * Copyright (C) 2014, 2023 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -37,7 +37,7 @@ #ifndef _RTEMS_SCORE_TLS_H #define _RTEMS_SCORE_TLS_H -#include <rtems/score/cpu.h> +#include <rtems/score/cpuimpl.h> #include <string.h> @@ -59,31 +59,51 @@ extern "C" { * @{ */ -extern char _TLS_Data_begin[]; - -extern char _TLS_Data_end[]; +/** + * @brief Represents the TLS configuration. + */ +typedef struct { + /** + * @brief This member is initialized to _TLS_Data_begin. + */ + const char *data_begin; -extern char _TLS_Data_size[]; + /** + * @brief This member is initialized to _TLS_Data_size. + */ + const char *data_size; -extern char _TLS_BSS_begin[]; + /** + * @brief This member is initialized to _TLS_BSS_begin. + */ + const char *bss_begin; -extern char _TLS_BSS_end[]; + /** + * @brief This member is initialized to _TLS_BSS_size. + */ + const char *bss_size; -extern char _TLS_BSS_size[]; + /** + * @brief This member is initialized to _TLS_Size. + */ + const char *size; -extern char _TLS_Size[]; + /** + * @brief This member is initialized to _TLS_Alignment. + */ + const char *alignment; +} TLS_Configuration; /** - * @brief The TLS section alignment. + * @brief Provides the TLS configuration. * - * This symbol is provided by the linker command file as the maximum alignment - * of the .tdata and .tbss sections. The linker ensures that the first TLS - * output section is aligned to the maximum alignment of all TLS output - * sections, see function _bfd_elf_tls_setup() in bfd/elflink.c of the GNU - * Binutils sources. The linker command file must take into account the case - * that the .tdata section is empty and the .tbss section is non-empty. + * Directly using symbols with an arbitrary absolute address such as + * _TLS_Alignment may not work with all code models (for example the AArch64 + * tiny and small code models). Store the addresses in a read-only object. + * Using the volatile qualifier ensures that the compiler actually loads the + * address from the object. */ -extern char _TLS_Alignment[]; +extern const volatile TLS_Configuration _TLS_Configuration; typedef struct { /* @@ -116,101 +136,71 @@ typedef struct { } TLS_Index; /** - * @brief Gets the TLS size. + * @brief Gets the size of the thread control block area in bytes. * - * @return The TLS size. - */ -static inline uintptr_t _TLS_Get_size( void ) -{ - uintptr_t size; - - /* - * We must be careful with using _TLS_Size here since this could lead GCC to - * assume that this symbol is not 0 and the tests for 0 will be optimized - * away. - */ - size = (uintptr_t) _TLS_Size; - RTEMS_OBFUSCATE_VARIABLE( size ); - return size; -} - -/** - * @brief Returns the value aligned up to the stack alignment. + * @param config is the TLS configuration. * - * @param val The value to align. - * - * @return The value aligned to the stack alignment. - */ -static inline uintptr_t _TLS_Align_up( uintptr_t val ) -{ - uintptr_t alignment = CPU_STACK_ALIGNMENT; - - return RTEMS_ALIGN_UP( val, alignment ); -} - -/** - * @brief Returns the size of the thread control block area size for this - * alignment, or the minimum size if alignment is too small. - * - * @param alignment The alignment for the operation. - * - * @return The size of the thread control block area. + * @return Returns the size of the thread control block area in bytes. */ static inline uintptr_t _TLS_Get_thread_control_block_area_size( - uintptr_t alignment + const volatile TLS_Configuration *config ) { - return alignment <= sizeof(TLS_Thread_control_block) ? - sizeof(TLS_Thread_control_block) : alignment; +#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 11 + uintptr_t alignment; + + alignment = (uintptr_t) config->alignment; + + return RTEMS_ALIGN_UP( sizeof( TLS_Thread_control_block ), alignment ); +#else + (void) config; + return sizeof( TLS_Thread_control_block ); +#endif } /** - * @brief Return the TLS area allocation size. + * @brief Gets the allocation size of the thread-local storage area in bytes. * - * @return The TLS area allocation size. + * @return Returns the allocation size of the thread-local storage area in + * bytes. */ uintptr_t _TLS_Get_allocation_size( void ); /** - * @brief Copies TLS size bytes from the address tls_area and returns a pointer - * to the start of the area after clearing it. + * @brief Initializes the thread-local storage data. * - * @param tls_area The starting address of the area to clear. + * @param config is the TLS configuration. * - * @return The pointer to the beginning of the cleared section. + * @param[out] tls_data is the thread-local storage data to initialize. */ -static inline void *_TLS_Copy_and_clear( void *tls_area ) +static inline void _TLS_Copy_and_clear( + const volatile TLS_Configuration *config, + void *tls_data +) { - tls_area = memcpy( - tls_area, - _TLS_Data_begin, - (size_t) ((uintptr_t)_TLS_Data_size) - ); - + tls_data = + memcpy( tls_data, config->data_begin, (uintptr_t) config->data_size ); memset( - (char *) tls_area + (size_t)((intptr_t) _TLS_BSS_begin) - - (size_t)((intptr_t) _TLS_Data_begin), + (char *) tls_data + + (uintptr_t) config->bss_begin - (uintptr_t) config->data_begin, 0, - ((size_t) (intptr_t)_TLS_BSS_size) + (uintptr_t) config->bss_size ); - - return tls_area; } /** - * @brief Initializes the dynamic thread vector. + * @brief Initializes the thread control block and the dynamic thread vector. * - * @param tls_block The tls block for @a dtv. - * @param tcb The thread control block for @a dtv. - * @param[out] dtv The dynamic thread vector to initialize. + * @param tls_data is the thread-local storage data address. * - * @return Pointer to an area that was copied and cleared from tls_block - * onwards (@see _TLS_Copy_and_clear). + * @param[out] tcb is the thread control block to initialize. + * + * @param[out] dtv is the dynamic thread vector to initialize. */ -static inline void *_TLS_Initialize( - void *tls_block, - TLS_Thread_control_block *tcb, +static inline void _TLS_Initialize_TCB_and_DTV( + void *tls_data, + TLS_Thread_control_block *tcb, TLS_Dynamic_thread_vector *dtv ) { @@ -220,86 +210,72 @@ static inline void *_TLS_Initialize( #else tcb->dtv = dtv; dtv->generation_number = 1; - dtv->tls_blocks[0] = tls_block; + dtv->tls_blocks[0] = tls_data; #endif - - return _TLS_Copy_and_clear( tls_block ); } /** - * @brief Initializes a dynamic thread vector beginning at the given starting - * address. + * @brief Initializes the thread-local storage area. * - * Use Variant I, TLS offsets emitted by linker takes the TCB into account. + * @param tls_area[out] is the thread-local storage area to initialize. * - * @param tls_area The tls area for the initialization. - * - * @return Pointer to an area that was copied and cleared from tls_block - * onwards (@see _TLS_Copy_and_clear). + * @return Where the architectures uses Variant I and the TLS offsets emitted + * by the linker neglect the TCB, returns the address of the thread-local + * storage data. Otherwise, returns the address of the thread control block. */ -static inline void *_TLS_TCB_at_area_begin_initialize( void *tls_area ) +static inline void *_TLS_Initialize_area( void *tls_area ) { - void *tls_block = (char *) tls_area - + _TLS_Get_thread_control_block_area_size( (uintptr_t) _TLS_Alignment ); - TLS_Thread_control_block *tcb = (TLS_Thread_control_block *) tls_area; - uintptr_t aligned_size = _TLS_Align_up( (uintptr_t) _TLS_Size ); - TLS_Dynamic_thread_vector *dtv = (TLS_Dynamic_thread_vector *) - ((char *) tls_block + aligned_size); - - return _TLS_Initialize( tls_block, tcb, dtv ); -} + const volatile TLS_Configuration *config; + uintptr_t alignment; + void *tls_data; + TLS_Thread_control_block *tcb; + TLS_Dynamic_thread_vector *dtv; + void *return_value; +#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 11 + uintptr_t tcb_size; +#endif +#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 20 + uintptr_t size; + uintptr_t alignment_2; +#endif -/** - * @brief Initializes a dynamic thread vector with the area before a given - * starting address as thread control block. - * - * Use Variant I, TLS offsets emitted by linker neglects the TCB. - * - * @param tls_area The tls area for the initialization. - * - * @return Pointer to an area that was copied and cleared from tls_block - * onwards (@see _TLS_Copy_and_clear). - */ -static inline void *_TLS_TCB_before_TLS_block_initialize( void *tls_area ) -{ - void *tls_block = (char *) tls_area - + _TLS_Get_thread_control_block_area_size( (uintptr_t) _TLS_Alignment ); - TLS_Thread_control_block *tcb = (TLS_Thread_control_block *) - ((char *) tls_block - sizeof(*tcb)); - uintptr_t aligned_size = _TLS_Align_up( (uintptr_t) _TLS_Size ); - TLS_Dynamic_thread_vector *dtv = (TLS_Dynamic_thread_vector *) - ((char *) tls_block + aligned_size); - - return _TLS_Initialize( tls_block, tcb, dtv ); -} + config = &_TLS_Configuration; + alignment = (uintptr_t) config->alignment; -/** - * @brief Initializes a dynamic thread vector with the area after a given - * starting address as thread control block. - * - * Use Variant II - * - * @param tls_area The tls area for the initialization. - * - * @return Pointer to an area that was copied and cleared from tls_block - * onwards (@see _TLS_Copy_and_clear). - */ -static inline void *_TLS_TCB_after_TLS_block_initialize( void *tls_area ) -{ - uintptr_t size = (uintptr_t) _TLS_Size; - uintptr_t tls_align = (uintptr_t) _TLS_Alignment; - uintptr_t tls_mask = tls_align - 1; - uintptr_t heap_align = _TLS_Align_up( tls_align ); - uintptr_t heap_mask = heap_align - 1; - TLS_Thread_control_block *tcb = (TLS_Thread_control_block *) - ((char *) tls_area + ((size + heap_mask) & ~heap_mask)); - void *tls_block = (char *) tcb - ((size + tls_mask) & ~tls_mask); - TLS_Dynamic_thread_vector *dtv = (TLS_Dynamic_thread_vector *) - ((char *) tcb + sizeof(*tcb)); - - _TLS_Initialize( tls_block, tcb, dtv ); - - return tcb; +#ifdef __i386__ + dtv = NULL; +#else + dtv = (TLS_Dynamic_thread_vector *) tls_area; + tls_area = (char *) tls_area + sizeof( *dtv ); +#endif + +#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 10 + tls_data = (void *) + RTEMS_ALIGN_UP( (uintptr_t) tls_area + sizeof( *tcb ), alignment ); + tcb = (TLS_Thread_control_block *) ((char *) tls_data - sizeof( *tcb )); + return_value = tls_data; +#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 11 + tcb_size = RTEMS_ALIGN_UP( sizeof( *tcb ), alignment ); + tls_data = (void *) + RTEMS_ALIGN_UP( (uintptr_t) tls_area + tcb_size, alignment ); + tcb = (TLS_Thread_control_block *) ((char *) tls_data - tcb_size); + return_value = tcb; +#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 20 + alignment_2 = RTEMS_ALIGN_UP( alignment, CPU_SIZEOF_POINTER ); + tls_area = (void *) RTEMS_ALIGN_UP( (uintptr_t) tls_area, alignment_2 ); + size = (uintptr_t) config->size; + tcb = (TLS_Thread_control_block *) + ((char *) tls_area + RTEMS_ALIGN_UP( size, alignment_2 )); + tls_data = (char *) tcb - RTEMS_ALIGN_UP( size, alignment ); + return_value = tcb; +#else +#error "unexpected CPU_THREAD_LOCAL_STORAGE_VARIANT value" +#endif + + _TLS_Initialize_TCB_and_DTV( tls_data, tcb, dtv ); + _TLS_Copy_and_clear( config, tls_data ); + + return return_value; } /** @} */ diff --git a/cpukit/include/rtems/score/todimpl.h b/cpukit/include/rtems/score/todimpl.h index ce75ff681f..565e047c7f 100644 --- a/cpukit/include/rtems/score/todimpl.h +++ b/cpukit/include/rtems/score/todimpl.h @@ -382,21 +382,6 @@ static inline void _TOD_Get_timeval( } /** - * @brief Adjusts the Time of Time. - * - * This method is used to adjust the current time of day by the - * specified amount. - * - * @param delta is the amount to adjust. - * - * @retval STATUS_SUCCESSFUL Successful operation. - * @retval other Some error occurred. - */ -Status_Control _TOD_Adjust( - const struct timespec *delta -); - -/** * @brief Check if the TOD is Set * * @retval true The time is set. diff --git a/cpukit/include/rtems/score/wkspacedata.h b/cpukit/include/rtems/score/wkspacedata.h index f1ca524fa0..6d809ca788 100644 --- a/cpukit/include/rtems/score/wkspacedata.h +++ b/cpukit/include/rtems/score/wkspacedata.h @@ -11,7 +11,7 @@ */ /* - * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2020 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/wkspaceinitmulti.h b/cpukit/include/rtems/score/wkspaceinitmulti.h index 44a6b08445..dfb2b3cbde 100644 --- a/cpukit/include/rtems/score/wkspaceinitmulti.h +++ b/cpukit/include/rtems/score/wkspaceinitmulti.h @@ -10,7 +10,7 @@ */ /* - * Copyright (C) 2012, 2020 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2012, 2020 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/cpukit/include/rtems/score/wkspaceinitone.h b/cpukit/include/rtems/score/wkspaceinitone.h index 47ea4efb5e..0dc252ad43 100644 --- a/cpukit/include/rtems/score/wkspaceinitone.h +++ b/cpukit/include/rtems/score/wkspaceinitone.h @@ -10,7 +10,7 @@ */ /* - * Copyright (C) 2012, 2020 embedded brains GmbH (http://www.embedded-brains.de) + * Copyright (C) 2012, 2020 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions |