diff options
Diffstat (limited to '')
20 files changed, 117 insertions, 86 deletions
diff --git a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c index b94bcec81c..e647b4fa92 100644 --- a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c +++ b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c @@ -20,11 +20,6 @@ #include <bsp/irq.h> -int bsp_smp_processor_id(void) -{ - return (int) arm_cortex_a9_get_multiprocessor_cpu_id(); -} - static void ipi_handler(void *arg) { rtems_smp_process_interrupt(); diff --git a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S index d07ae2cb6b..2b16234622 100644 --- a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S +++ b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S @@ -100,7 +100,7 @@ SYM (_ISR_Handler): movl esp, ebp /* ebp = previous stack pointer */ #if defined(RTEMS_SMP) && defined(BSP_HAS_SMP) movl $SYM(_Per_CPU_Information_p), ebx - call SYM(bsp_smp_processor_id) + call SYM(_CPU_SMP_Get_current_processor) mov (ebx,eax,4), ebx pushl ecx call SYM(_ISR_SMP_Enter) diff --git a/c/src/lib/libbsp/i386/shared/smp/getcpuid.c b/c/src/lib/libbsp/i386/shared/smp/getcpuid.c index dc82d3f883..dec816698d 100644 --- a/c/src/lib/libbsp/i386/shared/smp/getcpuid.c +++ b/c/src/lib/libbsp/i386/shared/smp/getcpuid.c @@ -7,13 +7,15 @@ * http://www.rtems.com/license/LICENSE. */ +#include <rtems/score/cpu.h> + #include <bsp/apic.h> #include <bsp/smp-imps.h> static int lapic_dummy = 0; unsigned imps_lapic_addr = ((unsigned)(&lapic_dummy)) - LAPIC_ID; -int bsp_smp_processor_id(void) +uint32_t _CPU_SMP_Get_current_processor( void ) { return APIC_ID(IMPS_LAPIC_READ(LAPIC_ID)); } diff --git a/c/src/lib/libbsp/powerpc/qoriq/startup/smp.c b/c/src/lib/libbsp/powerpc/qoriq/startup/smp.c index 352d7d44cc..4634eef76d 100644 --- a/c/src/lib/libbsp/powerpc/qoriq/startup/smp.c +++ b/c/src/lib/libbsp/powerpc/qoriq/startup/smp.c @@ -43,11 +43,6 @@ void _start_core_1(void); #define TLB_COUNT (TLB_END - TLB_BEGIN) -int bsp_smp_processor_id(void) -{ - return (int) ppc_processor_id(); -} - /* * These values can be obtained with the debugger or a look into the * U-Boot sources (arch/powerpc/cpu/mpc85xx/release.S). diff --git a/c/src/lib/libbsp/shared/smp/getcpuid.c b/c/src/lib/libbsp/shared/smp/getcpuid.c index c1806c8916..8d57b780d3 100644 --- a/c/src/lib/libbsp/shared/smp/getcpuid.c +++ b/c/src/lib/libbsp/shared/smp/getcpuid.c @@ -7,8 +7,9 @@ * http://www.rtems.com/license/LICENSE. */ -int bsp_smp_processor_id(void) +#include <rtems/score/cpu.h> + +uint32_t _CPU_SMP_Get_current_processor( void ) { return 0; } - diff --git a/c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c b/c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c index 5678fd4962..824278db61 100644 --- a/c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c +++ b/c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c @@ -13,9 +13,11 @@ * http://www.rtems.com/license/LICENSE. */ -int bsp_smp_processor_id(void) +#include <rtems/score/cpu.h> + +uint32_t _CPU_SMP_Get_current_processor( void ) { - unsigned int id; + uint32_t id; __asm__ __volatile__( "rd %%asr17,%0\n\t" : "=r" (id) : ); return ((id >> 28) & 0xff); diff --git a/c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c b/c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c index 7dbd5bb12a..39fc9f9dfa 100644 --- a/c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c +++ b/c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c @@ -43,7 +43,7 @@ static rtems_isr bsp_ap_ipi_isr( static void leon3_secondary_cpu_initialize(void) { - int cpu = bsp_smp_processor_id(); + uint32_t cpu = rtems_smp_get_current_processor(); sparc_leon3_set_cctrl( 0x80000F ); LEON_Unmask_interrupt(LEON3_MP_IRQ); @@ -125,11 +125,11 @@ void bsp_smp_interrupt_cpu( void bsp_smp_broadcast_interrupt(void) { - int dest_cpu; - int cpu; - int max_cpus; + uint32_t dest_cpu; + uint32_t cpu; + uint32_t max_cpus; - cpu = bsp_smp_processor_id(); + cpu = rtems_smp_get_current_processor(); max_cpus = rtems_smp_get_processor_count(); for ( dest_cpu=0 ; dest_cpu < max_cpus ; dest_cpu++ ) { diff --git a/cpukit/rtems/include/rtems.h b/cpukit/rtems/include/rtems.h index ab727b250f..9b9480472f 100644 --- a/cpukit/rtems/include/rtems.h +++ b/cpukit/rtems/include/rtems.h @@ -75,7 +75,6 @@ extern "C" { #endif #include <rtems/rtems/smp.h> - #include <rtems/rtems/support.h> #include <rtems/score/sysstate.h> diff --git a/cpukit/rtems/include/rtems/rtems/smp.h b/cpukit/rtems/include/rtems/rtems/smp.h index d8431b07f1..6e45671b32 100644 --- a/cpukit/rtems/include/rtems/rtems/smp.h +++ b/cpukit/rtems/include/rtems/rtems/smp.h @@ -55,14 +55,25 @@ extern "C" { _SMP_Get_processor_count() /** - * @brief Obtain Current Core Number + * @brief Returns the index of the current processor. * - * This method returns the id of the current CPU core. + * On uni-processor configurations this is a compile time constant and defined + * to be zero. + * + * On SMP configurations an architecture specific method is used to obtain the + * index of the current processor in the system. The set of processor indices + * is the range of integers starting with zero up to the processor count minus + * one. + * + * Outside of sections with disabled thread dispatching the current processor + * index may change after every instruction since the thread may migrate from + * one processor to another. Sections with disabled interrupts are sections + * with thread dispatching disabled. * - * @retval This method returns the id of the current CPU core. + * @return The index of the current processor. */ #define rtems_smp_get_current_processor() \ - bsp_smp_processor_id() + _SMP_Get_current_processor() /** @} */ diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h index 7020261619..ed1b605d09 100644 --- a/cpukit/score/cpu/arm/rtems/score/cpu.h +++ b/cpukit/score/cpu/arm/rtems/score/cpu.h @@ -443,6 +443,20 @@ void _CPU_Context_validate( uintptr_t pattern ); #define _CPU_Context_switch_to_first_task_smp( _context ) \ _CPU_Context_restore( _context ) + RTEMS_COMPILER_PURE_ATTRIBUTE static inline uint32_t + _CPU_SMP_Get_current_processor( void ) + { + uint32_t mpidr; + + /* Use ARMv7 Multiprocessor Affinity Register (MPIDR) */ + __asm__ volatile ( + "mrc p15, 0, %[mpidr], c0, c0, 5\n" + : [mpidr] "=&r" (mpidr) + ); + + return mpidr & 0xffU; + } + static inline void _ARM_Data_memory_barrier( void ) { __asm__ volatile ( "dmb" : : : "memory" ); diff --git a/cpukit/score/cpu/i386/rtems/score/cpu.h b/cpukit/score/cpu/i386/rtems/score/cpu.h index 3f7a331c3f..b00ae3bfd8 100644 --- a/cpukit/score/cpu/i386/rtems/score/cpu.h +++ b/cpukit/score/cpu/i386/rtems/score/cpu.h @@ -455,6 +455,8 @@ uint32_t _CPU_ISR_Get_level( void ); #define _CPU_Context_switch_to_first_task_smp( _the_context ) \ _CPU_Context_restore( (_the_context) ); + RTEMS_COMPILER_PURE_ATTRIBUTE uint32_t _CPU_SMP_Get_current_processor( void ); + static inline void _CPU_Processor_event_broadcast( void ) { __asm__ volatile ( "" : : : "memory" ); diff --git a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h index e2c6d94c10..d368e51c5f 100644 --- a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h +++ b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h @@ -1404,6 +1404,19 @@ static inline uint32_t CPU_swap_u32( #ifdef RTEMS_SMP /** + * @brief Returns the index of the current processor. + * + * An architecture specific method must be used to obtain the index of the + * current processor in the system. The set of processor indices is the + * range of integers starting with zero up to the processor count minus one. + */ + RTEMS_COMPILER_PURE_ATTRIBUTE static inline uint32_t + _CPU_SMP_Get_current_processor( void ) + { + return 123; + } + + /** * @brief Broadcasts a processor event. * * Some architectures provide a low-level synchronization primitive for diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h index e3c40981b5..8362c64b3f 100644 --- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h +++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h @@ -1000,6 +1000,21 @@ void _CPU_Context_validate( uintptr_t pattern ); #define _CPU_Context_switch_to_first_task_smp( _context ) \ _CPU_Context_restore( _context ) + RTEMS_COMPILER_PURE_ATTRIBUTE static inline uint32_t + _CPU_SMP_Get_current_processor( void ) + { + uint32_t pir; + + /* Use Book E Processor ID Register (PIR) */ + __asm__ volatile ( + "mfspr %[pir], 286" + : [pir] "=&r" (pir) + ); + + return pir; + } + + static inline void _CPU_Processor_event_broadcast( void ) { __asm__ volatile ( "" : : : "memory" ); diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h index defc01a779..e4eb65e88a 100644 --- a/cpukit/score/cpu/sparc/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h @@ -1186,6 +1186,8 @@ void _CPU_Context_restore( Context_Control *new_context ); + RTEMS_COMPILER_PURE_ATTRIBUTE uint32_t _CPU_SMP_Get_current_processor( void ); + static inline void _CPU_Processor_event_broadcast( void ) { __asm__ volatile ( "" : : : "memory" ); diff --git a/cpukit/score/include/rtems/bspsmp.h b/cpukit/score/include/rtems/bspsmp.h index b712c4fe95..57f5a7a458 100644 --- a/cpukit/score/include/rtems/bspsmp.h +++ b/cpukit/score/include/rtems/bspsmp.h @@ -70,16 +70,6 @@ extern "C" { uint32_t bsp_smp_initialize( uint32_t configured_cpu_count ); /** - * @brief Obtain current CPU index. - * - * This method is invoked by RTEMS when it needs to know the index - * of the CPU it is executing on. - * - * @retval This method returns the current CPU index. - */ -int bsp_smp_processor_id(void) RTEMS_COMPILER_PURE_ATTRIBUTE; - -/** * @brief Generate an interprocessor broadcast interrupt. * * This method is invoked when RTEMS wants to let all of the other @@ -106,19 +96,6 @@ void bsp_smp_interrupt_cpu( ); /** - * @brief Obtain CPU core number. - * - * This method is invoked by RTEMS when it needs to know which core - * number it is executing on. This is used when it needs to perform - * some action or bookkeeping and needs to distinguish itself from - * the other cores. For example, it may need to realize it needs to - * preempt a thread on another node. - * - * @retval This method returns the Id of the current CPU core. - */ -int bsp_smp_processor_id( void ); - -/** * @brief Performs high-level initialization of a secondary processor and runs * the application threads. * @@ -156,8 +133,6 @@ void rtems_smp_process_interrupt(void); } #endif -#else - #define bsp_smp_processor_id() 0 #endif /**@}*/ diff --git a/cpukit/score/include/rtems/score/percpu.h b/cpukit/score/include/rtems/score/percpu.h index bb565d92c0..383202c328 100644 --- a/cpukit/score/include/rtems/score/percpu.h +++ b/cpukit/score/include/rtems/score/percpu.h @@ -25,12 +25,7 @@ #include <rtems/score/isrlevel.h> #include <rtems/score/timestamp.h> #include <rtems/score/smplock.h> - - /* - * NOTE: This file MUST be included on non-smp systems as well - * in order to define bsp_smp_processor_id. - */ - #include <rtems/bspsmp.h> + #include <rtems/score/smp.h> #endif /** @@ -277,23 +272,23 @@ void _Per_CPU_Wait_for_state( #endif /* - * On a non SMP system, the bsp_smp_processor_id is defined to 0. + * On a non SMP system, the _SMP_Get_current_processor() is defined to 0. * Thus when built for non-SMP, there should be no performance penalty. */ #define _Thread_Heir \ - _Per_CPU_Information[bsp_smp_processor_id()].heir + _Per_CPU_Information[_SMP_Get_current_processor()].heir #define _Thread_Executing \ - _Per_CPU_Information[bsp_smp_processor_id()].executing + _Per_CPU_Information[_SMP_Get_current_processor()].executing #define _ISR_Nest_level \ - _Per_CPU_Information[bsp_smp_processor_id()].isr_nest_level + _Per_CPU_Information[_SMP_Get_current_processor()].isr_nest_level #define _CPU_Interrupt_stack_low \ - _Per_CPU_Information[bsp_smp_processor_id()].interrupt_stack_low + _Per_CPU_Information[_SMP_Get_current_processor()].interrupt_stack_low #define _CPU_Interrupt_stack_high \ - _Per_CPU_Information[bsp_smp_processor_id()].interrupt_stack_high + _Per_CPU_Information[_SMP_Get_current_processor()].interrupt_stack_high #define _Thread_Dispatch_necessary \ - _Per_CPU_Information[bsp_smp_processor_id()].dispatch_necessary + _Per_CPU_Information[_SMP_Get_current_processor()].dispatch_necessary #define _Thread_Time_of_last_context_switch \ - _Per_CPU_Information[bsp_smp_processor_id()].time_of_last_context_switch + _Per_CPU_Information[_SMP_Get_current_processor()].time_of_last_context_switch #endif /* ASM */ diff --git a/cpukit/score/include/rtems/score/smp.h b/cpukit/score/include/rtems/score/smp.h index a01515673f..fedf9ab6d7 100644 --- a/cpukit/score/include/rtems/score/smp.h +++ b/cpukit/score/include/rtems/score/smp.h @@ -71,7 +71,7 @@ extern "C" { * @param[in] cpu The target processor of the message. * @param[in] message The message. */ -void _SMP_Send_message( int cpu, uint32_t message ); +void _SMP_Send_message( uint32_t cpu, uint32_t message ); /** * @brief Request of others CPUs. @@ -116,6 +116,16 @@ void _SMP_Request_other_cores_to_shutdown(void); /** @} */ +#if defined( RTEMS_SMP ) + RTEMS_COMPILER_PURE_ATTRIBUTE static inline uint32_t + _SMP_Get_current_processor( void ) + { + return _CPU_SMP_Get_current_processor(); + } +#else + #define _SMP_Get_current_processor() ( ( uint32_t ) 0 ) +#endif + #ifdef __cplusplus } #endif diff --git a/cpukit/score/include/rtems/score/threaddispatch.h b/cpukit/score/include/rtems/score/threaddispatch.h index e3065da590..7e7afb9161 100644 --- a/cpukit/score/include/rtems/score/threaddispatch.h +++ b/cpukit/score/include/rtems/score/threaddispatch.h @@ -62,8 +62,8 @@ RTEMS_INLINE_ROUTINE bool _Thread_Dispatch_is_enabled(void) #if defined(RTEMS_SMP) typedef struct { SMP_lock_Control lock; - int owner_cpu; - int nest_level; + uint32_t owner_cpu; + uint32_t nest_level; } Thread_Dispatch_disable_level_lock_control; /** diff --git a/cpukit/score/src/smp.c b/cpukit/score/src/smp.c index fce927541b..8e06d04068 100644 --- a/cpukit/score/src/smp.c +++ b/cpukit/score/src/smp.c @@ -30,7 +30,7 @@ void rtems_smp_secondary_cpu_initialize( void ) { - int self = bsp_smp_processor_id(); + uint32_t self = _SMP_Get_current_processor(); Per_CPU_Control *per_cpu = &_Per_CPU_Information[ self ]; Thread_Control *heir; @@ -67,7 +67,7 @@ void rtems_smp_secondary_cpu_initialize( void ) void rtems_smp_process_interrupt( void ) { - int self = bsp_smp_processor_id(); + uint32_t self = _SMP_Get_current_processor(); Per_CPU_Control *per_cpu = &_Per_CPU_Information[ self ]; @@ -107,7 +107,7 @@ void rtems_smp_process_interrupt( void ) } } -void _SMP_Send_message( int cpu, uint32_t message ) +void _SMP_Send_message( uint32_t cpu, uint32_t message ) { Per_CPU_Control *per_cpu = &_Per_CPU_Information[ cpu ]; ISR_Level level; @@ -126,9 +126,9 @@ void _SMP_Send_message( int cpu, uint32_t message ) void _SMP_Broadcast_message( uint32_t message ) { - int self = bsp_smp_processor_id(); - int ncpus = _SMP_Get_processor_count(); - int cpu; + uint32_t self = _SMP_Get_current_processor(); + uint32_t ncpus = _SMP_Get_processor_count(); + uint32_t cpu; for ( cpu = 0 ; cpu < ncpus ; ++cpu ) { if ( cpu != self ) { @@ -146,9 +146,9 @@ void _SMP_Broadcast_message( uint32_t message ) void _SMP_Request_other_cores_to_perform_first_context_switch( void ) { - int self = bsp_smp_processor_id(); - int ncpus = _SMP_Get_processor_count(); - int cpu; + uint32_t self = _SMP_Get_current_processor(); + uint32_t ncpus = _SMP_Get_processor_count(); + uint32_t cpu; for ( cpu = 0 ; cpu < ncpus ; ++cpu ) { Per_CPU_Control *per_cpu = &_Per_CPU_Information[ cpu ]; @@ -165,9 +165,9 @@ void _SMP_Request_other_cores_to_perform_first_context_switch( void ) void _SMP_Request_other_cores_to_dispatch( void ) { if ( _System_state_Is_up( _System_state_Get() ) ) { - int self = bsp_smp_processor_id(); - int ncpus = _SMP_Get_processor_count(); - int cpu; + uint32_t self = _SMP_Get_current_processor(); + uint32_t ncpus = _SMP_Get_processor_count(); + uint32_t cpu; for ( cpu = 0 ; cpu < ncpus ; ++cpu ) { const Per_CPU_Control *per_cpu = &_Per_CPU_Information[ cpu ]; @@ -185,9 +185,9 @@ void _SMP_Request_other_cores_to_dispatch( void ) void _SMP_Request_other_cores_to_shutdown( void ) { - int self = bsp_smp_processor_id(); - int ncpus = _SMP_Get_processor_count(); - int cpu; + uint32_t self = _SMP_Get_current_processor(); + uint32_t ncpus = _SMP_Get_processor_count(); + uint32_t cpu; _SMP_Broadcast_message( RTEMS_BSP_SMP_SHUTDOWN ); diff --git a/cpukit/score/src/threaddispatchdisablelevel.c b/cpukit/score/src/threaddispatchdisablelevel.c index 1f84bfe65c..d5f3ff601b 100644 --- a/cpukit/score/src/threaddispatchdisablelevel.c +++ b/cpukit/score/src/threaddispatchdisablelevel.c @@ -26,7 +26,7 @@ #include <rtems/score/sysstate.h> #include <rtems/score/threaddispatch.h> -#define NO_OWNER_CPU (-1) +#define NO_OWNER_CPU 0xffffffffU void _Thread_Dispatch_initialization( void ) { @@ -48,8 +48,8 @@ uint32_t _Thread_Dispatch_increment_disable_level( void ) { Thread_Dispatch_disable_level_lock_control *level_lock = &_Thread_Dispatch_disable_level_lock; - int self_cpu; ISR_Level isr_level; + uint32_t self_cpu; uint32_t disable_level; _ISR_Disable_on_this_core( isr_level ); @@ -58,7 +58,7 @@ uint32_t _Thread_Dispatch_increment_disable_level( void ) * We must obtain the processor ID after interrupts are disabled since a * non-optimizing compiler may store the value on the stack and read it back. */ - self_cpu = bsp_smp_processor_id(); + self_cpu = _SMP_Get_current_processor(); if ( level_lock->owner_cpu != self_cpu ) { _SMP_lock_Acquire( &level_lock->lock ); |