1 files changed, 13 insertions, 13 deletions
diff --git a/c/src/libchip/network/open_eth.h b/c/src/libchip/network/open_eth.h
index 88627d178d..88d05255d8 100644
--- a/c/src/libchip/network/open_eth.h
+++ b/c/src/libchip/network/open_eth.h
@@ -52,14 +52,14 @@ typedef struct _oeth_regs {
 
 #define OETH_TOTAL_BD           128
 #define OETH_MAXBUF_LEN         0x610
-                                
-/* Tx BD */                     
+
+/* Tx BD */
 #define OETH_TX_BD_READY        0x8000 /* Tx BD Ready */
 #define OETH_TX_BD_IRQ          0x4000 /* Tx BD IRQ Enable */
 #define OETH_TX_BD_WRAP         0x2000 /* Tx BD Wrap (last BD) */
 #define OETH_TX_BD_PAD          0x1000 /* Tx BD Pad Enable */
 #define OETH_TX_BD_CRC          0x0800 /* Tx BD CRC Enable */
-                                
+
 #define OETH_TX_BD_UNDERRUN     0x0100 /* Tx BD Underrun Status */
 #define OETH_TX_BD_RETRY        0x00F0 /* Tx BD Retry Status */
 #define OETH_TX_BD_RETLIM       0x0008 /* Tx BD Retransmission Limit Status */
@@ -72,12 +72,12 @@ typedef struct _oeth_regs {
                                 OETH_TX_BD_LATECOL              | \
                                 OETH_TX_BD_DEFER                | \
                                 OETH_TX_BD_CARRIER)
-                                
-/* Rx BD */                     
+
+/* Rx BD */
 #define OETH_RX_BD_EMPTY        0x8000 /* Rx BD Empty */
 #define OETH_RX_BD_IRQ          0x4000 /* Rx BD IRQ Enable */
 #define OETH_RX_BD_WRAP         0x2000 /* Rx BD Wrap (last BD) */
-                                
+
 #define OETH_RX_BD_MISS         0x0080 /* Rx BD Miss Status */
 #define OETH_RX_BD_OVERRUN      0x0040 /* Rx BD Overrun Status */
 #define OETH_RX_BD_INVSIMB      0x0020 /* Rx BD Invalid Symbol Status */
@@ -113,7 +113,7 @@ typedef struct _oeth_regs {
 #define OETH_MODER_HUGEN        0x00004000 /* Huge Enable */
 #define OETH_MODER_PAD          0x00008000 /* Pad Enable */
 #define OETH_MODER_RECSMALL     0x00010000 /* Receive Small */
- 
+
 /* Interrupt Source Register */
 #define OETH_INT_TXB            0x00000001 /* Transmit Buffer IRQ */
 #define OETH_INT_TXE            0x00000002 /* Transmit Error IRQ */
@@ -131,26 +131,26 @@ typedef struct _oeth_regs {
 #define OETH_INT_MASK_BUSY      0x00000010 /* Busy IRQ Mask */
 #define OETH_INT_MASK_TXC       0x00000020 /* Transmit Control Frame IRQ Mask */
 #define OETH_INT_MASK_RXC       0x00000040 /* Received Control Frame IRQ Mask */
- 
+
 /* Control Module Mode Register */
 #define OETH_CTRLMODER_PASSALL  0x00000001 /* Pass Control Frames */
 #define OETH_CTRLMODER_RXFLOW   0x00000002 /* Receive Control Flow Enable */
 #define OETH_CTRLMODER_TXFLOW   0x00000004 /* Transmit Control Flow Enable */
-                               
-/* MII Mode Register */        
+
+/* MII Mode Register */
 #define OETH_MIIMODER_CLKDIV    0x000000FF /* Clock Divider */
 #define OETH_MIIMODER_NOPRE     0x00000100 /* No Preamble */
 #define OETH_MIIMODER_RST       0x00000200 /* MIIM Reset */
- 
+
 /* MII Command Register */
 #define OETH_MIICOMMAND_SCANSTAT  0x00000001 /* Scan Status */
 #define OETH_MIICOMMAND_RSTAT     0x00000002 /* Read Status */
 #define OETH_MIICOMMAND_WCTRLDATA 0x00000004 /* Write Control Data */
- 
+
 /* MII Address Register */
 #define OETH_MIIADDRESS_FIAD    0x0000001F /* PHY Address */
 #define OETH_MIIADDRESS_RGAD    0x00001F00 /* RGAD Address */
- 
+
 /* MII Status Register */
 #define OETH_MIISTATUS_LINKFAIL 0x00000001 /* Link Fail */
 #define OETH_MIISTATUS_BUSY     0x00000002 /* MII Busy */