diff options
Diffstat (limited to 'c/src/lib/libcpu/sh')
34 files changed, 2036 insertions, 285 deletions
diff --git a/c/src/lib/libcpu/sh/sh7032/Makefile.in b/c/src/lib/libcpu/sh/sh7032/Makefile.in index b91162bc3a..34e6494f8b 100644 --- a/c/src/lib/libcpu/sh/sh7032/Makefile.in +++ b/c/src/lib/libcpu/sh/sh7032/Makefile.in @@ -18,7 +18,7 @@ include $(RTEMS_ROOT)/make/directory.cfg INSTALL_CHANGE = @INSTALL_CHANGE@ -SUB_DIRS = include clock console timer null +SUB_DIRS = include clock timer null sci delay Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status cd $(top_builddir) \ diff --git a/c/src/lib/libcpu/sh/sh7032/clock/Makefile.in b/c/src/lib/libcpu/sh/sh7032/clock/Makefile.in index c9bd2ac92d..5617ae594e 100644 --- a/c/src/lib/libcpu/sh/sh7032/clock/Makefile.in +++ b/c/src/lib/libcpu/sh/sh7032/clock/Makefile.in @@ -40,7 +40,7 @@ INSTALL_CHANGE = @INSTALL_CHANGE@ # DEFINES += -CPPFLAGS += -DMHZ=$(MHZ) +CPPFLAGS += CFLAGS += $(CFLAGS_OS_V) LD_PATHS += diff --git a/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c b/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c index 7aef64ed99..a8acc1ca20 100644 --- a/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c +++ b/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c @@ -29,19 +29,30 @@ #include <rtems/libio.h> #include <rtems/score/sh_io.h> #include <rtems/score/sh.h> -#include <rtems/score/cpu_isps.h> -#include <rtems/score/iosh7030.h> - -#define _ITU_COUNTER0_MICROSECOND (MHZ/4) +#include <rtems/score/ispsh7032.h> +#include <rtems/score/iosh7032.h> #ifndef CLOCKPRIO #define CLOCKPRIO 10 #endif +#define I_CLK_PHI_1 0 +#define I_CLK_PHI_2 1 +#define I_CLK_PHI_4 2 +#define I_CLK_PHI_8 3 + +/* + * Set I_CLK_PHI to one of the I_CLK_PHI_X values from above to choose + * a PHI/X clock rate. + */ + +#define I_CLK_PHI I_CLK_PHI_4 +#define CLOCK_SCALE (1<<I_CLK_PHI) + #define ITU0_STARTMASK 0xfe #define ITU0_SYNCMASK 0xfe #define ITU0_MODEMASK 0xfe -#define ITU0_TCRMASK 0x22 +#define ITU0_TCRMASK (0x20 | I_CLK_PHI) #define ITU_STAT_MASK 0xf8 #define ITU0_IRQMASK 0xfe #define ITU0_TIERMASK 0x01 @@ -49,6 +60,55 @@ #define ITU0_TIORVAL 0x08 /* + * clicks_per_tick := clicks_per_sec * usec_per_tick + * + * This is a very expensive function ;-) + * + * Below are two variants: + * 1. A variant applying integer arithmetics, only. + * 2. A variant applying floating point arithmetics + * + * The floating point variant pulls in the fmath routines when linking, + * resulting in slightly larger executables for applications that do not + * apply fmath otherwise. However, the imath variant is significantly slower + * than the fmath variant and more complex. + * + * Assuming that most applications will not use fmath, but are critical + * in memory size constraints, we apply the integer variant. + * + * To the sake of simplicity, we might abandon one of both variants in + * future. + */ +static unsigned int sh_clicks_per_tick( + unsigned int clicks_per_sec, + unsigned int usec_per_tick ) +{ +#if 1 + unsigned int clicks_per_tick = 0 ; + + unsigned int b = clicks_per_sec ; + unsigned int c = 1000000 ; + unsigned int d = 1 ; + unsigned int a = ( ( b / c ) * usec_per_tick ) / d; + + clicks_per_tick += a ; + + while ( ( b %= c ) > 0 ) + { + c /= 10 ; + d *= 10 ; + a = ( ( b / c ) * usec_per_tick ) / d ; + clicks_per_tick += a ; + } + return clicks_per_tick ; +#else + double fclicks_per_tick = + ((double) clicks_per_sec * (double) usec_per_tick) / 1000000.0 ; + return (unsigned32) fclicks_per_tick ; +#endif +} + +/* * The interrupt vector number associated with the clock tick device * driver. */ @@ -100,7 +160,6 @@ rtems_isr Clock_isr( /* * bump the number of clock driver ticks since initialization * - * determine if it is time to announce the passing of tick as configured * to RTEMS through the rtems_clock_tick directive * @@ -137,13 +196,31 @@ void Install_clock( ) { unsigned8 temp8 = 0; + unsigned32 microseconds_per_tick ; + unsigned32 cclicks_per_tick ; + unsigned16 Clock_limit ; /* * Initialize the clock tick device driver variables */ Clock_driver_ticks = 0; - Clock_isrs_const = rtems_configuration_get_microseconds_per_tick() / 10000; + + if ( rtems_configuration_get_microseconds_per_tick() != 0 ) + microseconds_per_tick = rtems_configuration_get_microseconds_per_tick() ; + else + microseconds_per_tick = 10000 ; /* 10000 us */ + + /* clock clicks per tick */ + cclicks_per_tick = + sh_clicks_per_tick( + rtems_cpu_configuration_get_clicks_per_second() / CLOCK_SCALE, + microseconds_per_tick ); + + Clock_isrs_const = cclicks_per_tick >> 16 ; + if ( ( cclicks_per_tick | 0xffff ) > 0 ) + Clock_isrs_const++ ; + Clock_limit = cclicks_per_tick / Clock_isrs_const ; Clock_isrs = Clock_isrs_const; /* @@ -191,8 +268,7 @@ void Install_clock( rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED); /* set counter limits */ - write16( _ITU_COUNTER0_MICROSECOND * rtems_configuration_get_microseconds_per_tick(), - ITU_GRA0); + write16( Clock_limit, ITU_GRA0); /* start counter */ temp8 = read8( ITU_TSTR) |~ITU0_STARTMASK; diff --git a/c/src/lib/libcpu/sh/sh7032/console/console.c b/c/src/lib/libcpu/sh/sh7032/console/console.c deleted file mode 100644 index 6c16adfa5f..0000000000 --- a/c/src/lib/libcpu/sh/sh7032/console/console.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * /dev/console for Hitachi SH 703X - * - * The SH doesn't have a designated console device. Therefore we "alias" - * another device as /dev/console and revector all calls to /dev/console - * to this device. - * - * This approach is similar to installing a sym-link from one device to - * another device. If rtems once will support sym-links for devices files, - * this implementation could be dropped. - * - * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) - * - * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * - * - * COPYRIGHT (c) 1998. - * On-Line Applications Research Corporation (OAR). - * Copyright assigned to U.S. Government, 1994. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - */ - -#include <bsp.h> -#include <rtems.h> -#include <rtems/libio.h> -#include <iosupp.h> - -#ifndef CPU_CONSOLE_DEVNAME -#error Missing CPU_CONSOLE_DEVNAME -#endif - -static rtems_driver_name_t *low_level_device_info = NULL ; - -/* console_initialize - * - * This routine initializes the console IO driver. - * - * Input parameters: NONE - * - * Output parameters: NONE - * - * Return values: - */ - -rtems_device_driver console_initialize( - rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg -) -{ - rtems_device_driver status ; - - status = rtems_io_register_name( - "/dev/console", - major, - (rtems_device_minor_number) 0 - ); - - if (status != RTEMS_SUCCESSFUL) - rtems_fatal_error_occurred(status); - - status = rtems_io_lookup_name( CPU_CONSOLE_DEVNAME, - &low_level_device_info ); - if (status != RTEMS_SUCCESSFUL) - rtems_fatal_error_occurred(status); - - return RTEMS_SUCCESSFUL; -} - - -/* - * Open entry point - */ - -rtems_device_driver console_open( - rtems_device_major_number major, - rtems_device_minor_number minor, - void * arg -) -{ - return rtems_io_open( low_level_device_info->major, - low_level_device_info->minor, - arg ); -} - -/* - * Close entry point - */ - -rtems_device_driver console_close( - rtems_device_major_number major, - rtems_device_minor_number minor, - void * arg -) -{ - return rtems_io_close( low_level_device_info->major, - low_level_device_info->minor, - arg ); -} - -/* - * read bytes from the serial port. We only have stdin. - */ - -rtems_device_driver console_read( - rtems_device_major_number major, - rtems_device_minor_number minor, - void * arg -) -{ - return rtems_io_read( low_level_device_info->major, - low_level_device_info->minor, - arg ); -} - -/* - * write bytes to the serial port. Stdout and stderr are the same. - */ - -rtems_device_driver console_write( - rtems_device_major_number major, - rtems_device_minor_number minor, - void * arg -) -{ - return rtems_io_write( low_level_device_info->major, - low_level_device_info->minor, - arg ); -} - -/* - * IO Control entry point - */ - -rtems_device_driver console_control( - rtems_device_major_number major, - rtems_device_minor_number minor, - void * arg -) -{ - return rtems_io_control( low_level_device_info->major, - low_level_device_info->minor, - arg ); -} diff --git a/c/src/lib/libcpu/sh/sh7032/include/Makefile.in b/c/src/lib/libcpu/sh/sh7032/include/Makefile.in index 5f180b27f3..fb379f14eb 100644 --- a/c/src/lib/libcpu/sh/sh7032/include/Makefile.in +++ b/c/src/lib/libcpu/sh/sh7032/include/Makefile.in @@ -13,8 +13,8 @@ PROJECT_ROOT = @PROJECT_ROOT@ VPATH = @srcdir@ -H_FILES = $(srcdir)/ioqueue.h $(srcdir)/null.h $(srcdir)/sci.h \ - $(srcdir)/sh7_pfc.h $(srcdir)/sh7_sci.h +H_FILES = $(srcdir)/null.h $(srcdir)/sci.h $(srcdir)/sh7_pfc.h \ + $(srcdir)/sh7_sci.h SRCS = $(H_FILES) diff --git a/c/src/lib/libcpu/sh/sh7032/include/ioqueue.h b/c/src/lib/libcpu/sh/sh7032/include/ioqueue.h deleted file mode 100644 index 55020acfad..0000000000 --- a/c/src/lib/libcpu/sh/sh7032/include/ioqueue.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Defines for low level queue management - * - * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) - * - * COPYRIGHT (c) 1997-1998, Ralf Corsepius, Germany - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * - * - * COPYRIGHT (c) 1998. - * On-Line Applications Research Corporation (OAR). - * Copyright assigned to U.S. Government, 1994. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - * - */ - -#ifndef _io_queue_h -#define _io_queue_h - -#include <stdlib.h> /* size_t */ - -/* - * NOTE: size needs to be a power of 2 - */ -#define IO_QUEUE(type,size,name) \ -typedef struct { \ - volatile type queue[size] ; \ - volatile unsigned short tail ; \ - volatile unsigned short head ; \ -} name ; - -#define IO_QUEUE_FULL(queue, size) \ - ((queue)->tail == (((queue)->head+1) & ((size)-1))) - -#define IO_QUEUE_EMPTY(queue) \ - (((queue)->tail) == ((queue)->head)) - -#define IO_QUEUE_INIT(queue) \ - (queue)->tail = (queue)->head = 0 - -#define IO_QUEUE_ADD(queue,size) \ - (queue)->head = (((queue)->head + 1) & ((size)-1)) - -#define IO_QUEUE_SUB(queue,size) \ - (queue)->tail = (((queue)->tail + 1) & ((size)-1)) - -#define IO_QUEUE_PUT(_queue,item) \ -{ \ - size_t i; \ - unsigned char* dest = (unsigned char*) ((_queue)->queue[(_queue)->head]); \ - unsigned char* src = (unsigned char*) (item); \ - for( i = 0; i < sizeof(item); i++) \ - { \ - dest[i] = src[i]; \ - } \ -} - -#define IO_QUEUE_GET(_queue,item) \ -{\ - size_t i; \ - unsigned char *src = (unsigned char*) (_queue)->queue[(_queue)->tail]; \ - unsigned char *dest = (unsigned char*) (item); \ - for( i=0; i< sizeof(item); i++)\ - {\ - dest[i] = src[i]; \ - }\ -} - -#endif diff --git a/c/src/lib/libcpu/sh/sh7032/include/sci.h b/c/src/lib/libcpu/sh/sh7032/include/sci.h index d897003315..b2468400b8 100644 --- a/c/src/lib/libcpu/sh/sh7032/include/sci.h +++ b/c/src/lib/libcpu/sh/sh7032/include/sci.h @@ -78,12 +78,6 @@ extern rtems_device_driver sh_sci_control( void * ); -/* Internal error codes */ -#define SH_TTY_NO_ERROR 0x2000 -#define SH_TTY_FRAME_ERR 0x2001 -#define SH_TTY_PARITY_ERR 0x2002 -#define SH_TTY_OVERRUN_ERR 0x2003 - #ifdef __cplusplus } #endif diff --git a/c/src/lib/libcpu/sh/sh7032/include/sh7_pfc.h b/c/src/lib/libcpu/sh/sh7032/include/sh7_pfc.h index ba6580c5fd..6e12740340 100644 --- a/c/src/lib/libcpu/sh/sh7032/include/sh7_pfc.h +++ b/c/src/lib/libcpu/sh/sh7032/include/sh7_pfc.h @@ -27,7 +27,7 @@ #ifndef _sh7_pfc_h #define _sh7_pfc_h -#include <rtems/score/iosh7030.h> +#include <rtems/score/iosh7032.h> /* * Port B IO Register (PBIOR) diff --git a/c/src/lib/libcpu/sh/sh7032/include/sh7_sci.h b/c/src/lib/libcpu/sh/sh7032/include/sh7_sci.h index cb2cc03893..3bd01ecc8f 100644 --- a/c/src/lib/libcpu/sh/sh7032/include/sh7_sci.h +++ b/c/src/lib/libcpu/sh/sh7032/include/sh7_sci.h @@ -27,7 +27,7 @@ #ifndef _sh7_sci_h #define _sh7_sci_h -#include <rtems/score/iosh7030.h> +#include <rtems/score/iosh7032.h> /* * Serial mode register bits diff --git a/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c b/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c index 42764f6eb1..192c2f43d2 100644 --- a/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c +++ b/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c @@ -41,10 +41,17 @@ #include <rtems/score/cpu.h> #include <rtems/score/isr.h> #include <rtems/score/thread.h> -#include <rtems/score/cpu_isps.h> -#include <rtems/score/sh_io.h> #include <rtems/score/sh.h> -#include <rtems/score/iosh7030.h> + +#if defined(sh7032) +#include <rtems/score/ispsh7032.h> +#include <rtems/score/iosh7032.h> +#elif defined (sh7045) +#include <rtems/score/ispsh7045.h> +#include <rtems/score/iosh7045.h> +#endif + +#include <rtems/score/sh_io.h> /* from cpu_isps.c */ extern proc_ptr _Hardware_isr_Table[]; diff --git a/c/src/lib/libcpu/sh/sh7032/score/ispsh7032.c b/c/src/lib/libcpu/sh/sh7032/score/ispsh7032.c index 3ef3c32465..9fcc9badbf 100644 --- a/c/src/lib/libcpu/sh/sh7032/score/ispsh7032.c +++ b/c/src/lib/libcpu/sh/sh7032/score/ispsh7032.c @@ -30,10 +30,14 @@ #include <rtems/system.h> #include <rtems/score/shtypes.h> -#include <rtems/score/cpu_isps.h> +#include <rtems/score/ispsh7032.h> + +#if !defined(sh7032) +#error Wrong CPU MODEL +#endif /* - * This is a exception vector table + * This is an exception vector table * * It has the same structure like the actual vector table (vectab) */ diff --git a/c/src/lib/libcpu/sh/sh7032/timer/Makefile.in b/c/src/lib/libcpu/sh/sh7032/timer/Makefile.in index 735ef3961d..ce19bbb25c 100644 --- a/c/src/lib/libcpu/sh/sh7032/timer/Makefile.in +++ b/c/src/lib/libcpu/sh/sh7032/timer/Makefile.in @@ -40,7 +40,7 @@ INSTALL_CHANGE = @INSTALL_CHANGE@ # DEFINES += -CPPFLAGS += -DMHZ=$(MHZ) +CPPFLAGS += CFLAGS += LD_PATHS += diff --git a/c/src/lib/libcpu/sh/sh7032/timer/timer.c b/c/src/lib/libcpu/sh/sh7032/timer/timer.c index 03ffdd7e56..9dd57a4bb4 100644 --- a/c/src/lib/libcpu/sh/sh7032/timer/timer.c +++ b/c/src/lib/libcpu/sh/sh7032/timer/timer.c @@ -32,17 +32,26 @@ #include <rtems.h> #include <rtems/score/sh_io.h> -#include <rtems/score/iosh7030.h> +#include <rtems/score/ispsh7032.h> +#include <rtems/score/iosh7032.h> + +#define I_CLK_PHI_1 0 +#define I_CLK_PHI_2 1 +#define I_CLK_PHI_4 2 +#define I_CLK_PHI_8 3 /* - * We use a Phi/4 timer + * Set I_CLK_PHI to one of the I_CLK_PHI_X values from above to choose + * a PHI/X clock rate. */ -#define SCALE (MHZ/4) + +#define I_CLK_PHI I_CLK_PHI_4 +#define CLOCK_SCALE (1<<I_CLK_PHI) #define ITU1_STARTMASK 0xfd #define ITU1_SYNCMASK 0xfd #define ITU1_MODEMASK 0xfd -#define ITU1_TCRMASK 0x02 +#define ITU1_TCRMASK (0x00 | I_CLK_PHI) #define ITU1_TIORMASK 0x88 #define ITU1_STAT_MASK 0xf8 #define ITU1_TIERMASK 0xfc @@ -52,7 +61,7 @@ #define ITU1_PRIO 15 #endif -#define ITU1_VECTOR 86 +#define ITU1_VECTOR OVI1_ISP_V rtems_isr timerisr(); @@ -60,6 +69,8 @@ static rtems_unsigned32 Timer_interrupts; rtems_boolean Timer_driver_Find_average_overhead; +static rtems_unsigned32 Timer_HZ ; + void Timer_initialize( void ) { rtems_unsigned8 temp8; @@ -67,6 +78,8 @@ void Timer_initialize( void ) rtems_unsigned32 level; rtems_isr *ignored; + Timer_HZ = rtems_cpu_configuration_get_clicks_per_second() / CLOCK_SCALE ; + /* * Timer has never overflowed. This may not be necessary on some * implemenations of timer but .... @@ -93,12 +106,7 @@ void Timer_initialize( void ) temp8 = read8( ITU_TMDR) & ITU1_MODEMASK; write8( temp8, ITU_TMDR); - /* x0000000 - * |||||+++--- Internal Clock - * |||++------ Count on rising edge - * |++-------- disable TCNT clear - * +---------- don`t care - */ + /* Use a Phi/X counter */ write8( ITU1_TCRMASK, ITU_TCR1); /* gra and grb are not used */ @@ -142,14 +150,14 @@ void Timer_initialize( void ) int Read_timer( void ) { - rtems_unsigned32 clicks; + rtems_unsigned32 cclicks; rtems_unsigned32 total ; /* * Read the timer and see how many clicks it has been since we started. */ - clicks = read16( ITU_TCNT1); /* XXX: read some HW here */ + cclicks = read16( ITU_TCNT1); /* XXX: read some HW here */ /* * Total is calculated by taking into account the number of timer overflow @@ -157,10 +165,10 @@ int Read_timer( void ) * interrupts. */ - total = clicks + Timer_interrupts * 65536 ; + total = cclicks + Timer_interrupts * 65536 ; if ( Timer_driver_Find_average_overhead ) - return total / SCALE; /* in XXX microsecond units */ + return total / CLOCK_SCALE; /* in XXX microsecond units */ else { if ( total < LEAST_VALID ) @@ -168,7 +176,7 @@ int Read_timer( void ) /* * Somehow convert total into microseconds */ - return (total / SCALE - AVG_OVERHEAD) ; + return (total / CLOCK_SCALE - AVG_OVERHEAD) ; } } diff --git a/c/src/lib/libcpu/sh/sh7045/Makefile.in b/c/src/lib/libcpu/sh/sh7045/Makefile.in new file mode 100644 index 0000000000..411ccb9f7e --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/Makefile.in @@ -0,0 +1,25 @@ +## +## $Id$ +## + +@SET_MAKE@ +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +top_builddir = ../.. +subdir = sh/sh7045 + +RTEMS_ROOT = @RTEMS_ROOT@ +PROJECT_ROOT = @PROJECT_ROOT@ + +VPATH = @srcdir@ + +include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg +include $(RTEMS_ROOT)/make/directory.cfg + +INSTALL_CHANGE = @INSTALL_CHANGE@ + +SUB_DIRS = include clock sci timer null + +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + cd $(top_builddir) \ + && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status diff --git a/c/src/lib/libcpu/sh/sh7045/clock/Makefile.in b/c/src/lib/libcpu/sh/sh7045/clock/Makefile.in new file mode 100644 index 0000000000..9265994df8 --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/clock/Makefile.in @@ -0,0 +1,71 @@ +## +## $Id$ +## + +@SET_MAKE@ +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +top_builddir = ../../.. +subdir = sh/sh7045/clock + +RTEMS_ROOT = @RTEMS_ROOT@ +PROJECT_ROOT = @PROJECT_ROOT@ + +VPATH = @srcdir@ + +PGM = ${ARCH}/clock.rel + +# C source names, if any, go here -- minus the .c +C_PIECES = ckinit +C_FILES = $(C_PIECES:%=%.c) +C_O_FILES = $(C_PIECES:%=${ARCH}/%.o) + +H_FILES = + +# Assembly source names, if any, go here -- minus the .s +S_PIECES = +S_FILES = $(S_PIECES:%=%.s) +S_O_FILES = $(S_FILES:%.s=${ARCH}/%.o) + +SRCS = $(C_FILES) $(H_FILES) $(S_FILES) +OBJS = $(C_O_FILES) $(S_O_FILES) + +include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg +include $(RTEMS_ROOT)/make/leaf.cfg + +INSTALL_CHANGE = @INSTALL_CHANGE@ + +# +# (OPTIONAL) Add local stuff here using += +# + +DEFINES += +CPPFLAGS += +CFLAGS += $(CFLAGS_OS_V) + +LD_PATHS += +LD_LIBS += +LDFLAGS += + +# +# Add your list of files to delete here. The config files +# already know how to delete some stuff, so you may want +# to just run 'make clean' first to see what gets missed. +# 'make clobber' already includes 'make clean' +# + +CLEAN_ADDITIONS += +CLOBBER_ADDITIONS += + +${PGM}: ${SRCS} ${OBJS} + ${make-rel} + +all: ${ARCH} $(SRCS) $(PGM) + +# the .rel file built here will be put into libbsp.a by +# libbsp/sh/BSP/wrapup/Makefile +install: all + +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + cd $(top_builddir) \ + && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status diff --git a/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c b/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c new file mode 100644 index 0000000000..031ae3225e --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c @@ -0,0 +1,308 @@ +/* + * This file contains the clock driver the Hitachi SH 704X + * + * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and + * Bernd Becker (becker@faw.uni-ulm.de) + * + * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * + * COPYRIGHT (c) 1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * Modified to reflect registers of sh7045 processor: + * John M. Mills (jmills@tga.com) + * TGA Technologies, Inc. + * 100 Pinnacle Way, Suite 140 + * Norcross, GA 30071 U.S.A. + * August, 1999 + * + * This modified file may be copied and distributed in accordance + * the above-referenced license. It is provided for critique and + * developmental purposes without any warranty nor representation + * by the authors or by TGA Technologies. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include <rtems.h> + +#include <stdlib.h> + +#include <rtems/libio.h> +#include <rtems/score/sh_io.h> +#include <rtems/score/sh.h> +#include <rtems/score/ispsh7045.h> +#include <rtems/score/iosh7045.h> + +#define _MTU_COUNTER0_MICROSECOND (Clock_MHZ/4) + +#ifndef CLOCKPRIO +#define CLOCKPRIO 10 +#endif + +#define MTU0_STARTMASK 0xfe +#define MTU0_SYNCMASK 0xfe +#define MTU0_MODEMASK 0xc0 +#define MTU0_TCRMASK 0x01 /* bit 7 also used, vs 703x */ +#define MTU0_STAT_MASK 0xc0 +#define MTU0_IRQMASK 0xfe +#define MTU0_TIERMASK 0x01 +#define IPRC_MTU0_MASK 0xff0f +#define MTU0_TIORVAL 0x08 + +/* + * The interrupt vector number associated with the clock tick device + * driver. + */ + +#define CLOCK_VECTOR MTUA0_ISP_V + +/* + * Clock_driver_ticks is a monotonically increasing counter of the + * number of clock ticks since the driver was initialized. + */ + +volatile rtems_unsigned32 Clock_driver_ticks; + +static void Clock_exit( void ); +static rtems_isr Clock_isr( rtems_vector_number vector ); +static rtems_unsigned32 Clock_MHZ ; + +/* + * Clock_isrs is the number of clock ISRs until the next invocation of + * the RTEMS clock tick routine. The clock tick device driver + * gets an interrupt once a millisecond and counts down until the + * length of time between the user configured microseconds per tick + * has passed. + */ + +rtems_unsigned32 Clock_isrs; /* ISRs until next tick */ +static rtems_unsigned32 Clock_isrs_const; /* only calculated once */ + +/* + * These are set by clock driver during its init + */ + +rtems_device_major_number rtems_clock_major = ~0; +rtems_device_minor_number rtems_clock_minor; + +/* + * The previous ISR on this clock tick interrupt vector. + */ + +rtems_isr_entry Old_ticker; + +/* + * Isr Handler + */ + +rtems_isr Clock_isr( + rtems_vector_number vector +) +{ + /* + * bump the number of clock driver ticks since initialization + * + + * determine if it is time to announce the passing of tick as configured + * to RTEMS through the rtems_clock_tick directive + * + * perform any timer dependent tasks + */ + unsigned8 temp; + + /* reset the flags of the status register */ + temp = read8( MTU_TSR0) & MTU0_STAT_MASK; + write8( temp, MTU_TSR0); + + Clock_driver_ticks++ ; + + if( Clock_isrs == 1) + { + rtems_clock_tick(); + Clock_isrs = Clock_isrs_const; + } + else + { + Clock_isrs-- ; + } +} + +/* + * Install_clock + * + * Install a clock tick handler and reprograms the chip. This + * is used to initially establish the clock tick. + */ + +void Install_clock( + rtems_isr_entry clock_isr +) +{ + unsigned8 temp8 = 0; + + /* + * Initialize the clock tick device driver variables + */ + + Clock_driver_ticks = 0; + Clock_isrs_const = rtems_configuration_get_microseconds_per_tick() / 10000; + Clock_isrs = Clock_isrs_const; + + Clock_MHZ = rtems_cpu_configuration_get_clicks_per_second() / 1000000 ; + + /* + * If ticks_per_timeslice is configured as non-zero, then the user + * wants a clock tick. + */ + + if ( rtems_configuration_get_ticks_per_timeslice() ) { + rtems_interrupt_catch( Clock_isr, CLOCK_VECTOR, &Old_ticker ); + /* + * Hardware specific initialize goes here + */ + + /* stop Timer 0 */ + temp8 = read8( MTU_TSTR) & MTU0_STARTMASK; + write8( temp8, MTU_TSTR); + + /* set initial counter value to 0 */ + write16( 0, MTU_TCNT0); + + /* Timer 0 runs independent */ + temp8 = read8( MTU_TSYR) & MTU0_SYNCMASK; + write8( temp8, MTU_TSYR); + + /* Timer 0 normal mode */ + temp8 = read8( MTU_TMDR0) & MTU0_MODEMASK; + write8( temp8, MTU_TMDR0); + + /* TCNT is cleared by GRA ; internal clock /4 */ + write8( MTU0_TCRMASK , MTU_TCR0); + + /* use GRA without I/O - pins */ + write8( MTU0_TIORVAL, MTU_TIORL0); + + /* reset flags of the status register */ + temp8 = read8( MTU_TSR0) & MTU0_STAT_MASK; + write8( temp8, MTU_TSR0); + + /* Irq if is equal GRA */ + temp8 = read8( MTU_TIER0) | MTU0_TIERMASK; + write8( temp8, MTU_TIER0); + + /* set interrupt priority */ + if( sh_set_irq_priority( CLOCK_VECTOR, CLOCKPRIO ) != RTEMS_SUCCESSFUL) + rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED); + + /* set counter limits */ + write16( _MTU_COUNTER0_MICROSECOND * + rtems_configuration_get_microseconds_per_tick(), + + MTU_GR0A); + + /* start counter */ + temp8 = read8( MTU_TSTR) |~MTU0_STARTMASK; + write8( temp8, MTU_TSTR); + + } + + /* + * Schedule the clock cleanup routine to execute if the application exits. + */ + + atexit( Clock_exit ); +} + +/* + * Clean up before the application exits + */ + +void Clock_exit( void ) +{ + unsigned8 temp8 = 0; + if ( rtems_configuration_get_ticks_per_timeslice() ) { + + /* turn off the timer interrupts */ + /* set interrupt priority to 0 */ + if( sh_set_irq_priority( CLOCK_VECTOR, 0 ) != RTEMS_SUCCESSFUL) + rtems_fatal_error_occurred( RTEMS_UNSATISFIED); + +/* + * temp16 = read16( MTU_TIER0) & IPRC_MTU0_IRQMASK; + * write16( temp16, MTU_TIER0); + */ + + /* stop counter */ + temp8 = read8( MTU_TSTR) & MTU0_STARTMASK; + write8( temp8, MTU_TSTR); + + /* old vector shall not be installed */ + } +} + +/* + * Clock_initialize + * + * Device driver entry point for clock tick driver initialization. + */ + +rtems_device_driver Clock_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + Install_clock( Clock_isr ); + + /* + * make major/minor avail to others such as shared memory driver + */ + + rtems_clock_major = major; + rtems_clock_minor = minor; + + return RTEMS_SUCCESSFUL; +} + +rtems_device_driver Clock_control( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + rtems_unsigned32 isrlevel; + rtems_libio_ioctl_args_t *args = pargp; + + if (args != 0) + { + /* + * This is hokey, but until we get a defined interface + * to do this, it will just be this simple... + */ + + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) + { + Clock_isr(CLOCK_VECTOR); + } + else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) + { + rtems_isr_entry ignored ; + rtems_interrupt_disable( isrlevel ); + rtems_interrupt_catch( args->buffer, CLOCK_VECTOR, &ignored ); + + rtems_interrupt_enable( isrlevel ); + } + } + return RTEMS_SUCCESSFUL; +} diff --git a/c/src/lib/libcpu/sh/sh7045/include/Makefile.in b/c/src/lib/libcpu/sh/sh7045/include/Makefile.in new file mode 100644 index 0000000000..bf69d92121 --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/include/Makefile.in @@ -0,0 +1,46 @@ +# +# $Id$ +# + +@SET_MAKE@ +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +top_builddir = ../../.. +subdir = sh/sh7045/include + +RTEMS_ROOT = @RTEMS_ROOT@ +PROJECT_ROOT = @PROJECT_ROOT@ + +VPATH = @srcdir@ + +H_FILES = $(srcdir)/io_types.h $(srcdir)/null.h $(srcdir)/sci.h \ + $(srcdir)/sh7_pfc.h $(srcdir)/sh7_sci.h + +SRCS = $(H_FILES) + +include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg +include $(RTEMS_ROOT)/make/leaf.cfg + +INSTALL_CHANGE = @INSTALL_CHANGE@ +mkinstalldirs = $(SHELL) $(top_srcdir)/@RTEMS_TOPdir@/mkinstalldirs + +INSTALLDIRS = $(PROJECT_INCLUDE)/sh + +$(INSTALLDIRS): + @$(mkinstalldirs) $(INSTALLDIRS) + +CLEAN_ADDITIONS += +CLOBBER_ADDITIONS += + +all: install + +# NOTE: Unlike other CPUS, we install into a subdirectory to avoid +# file name conflicts + +install: + $(mkinstalldirs) $(PROJECT_INCLUDE)/sh + @$(INSTALL_CHANGE) -m 644 $(H_FILES) $(PROJECT_INCLUDE)/sh + +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + cd $(top_builddir) \ + && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status diff --git a/c/src/lib/libcpu/sh/sh7045/include/io_types.h b/c/src/lib/libcpu/sh/sh7045/include/io_types.h new file mode 100644 index 0000000000..18ba181143 --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/include/io_types.h @@ -0,0 +1,87 @@ +/************************************************************************ + * + * Data types and constants for Hitachi SH704X on-chip peripherals + * + * Author: John M.Mills (jmills@tga.com) + * + * COPYRIGHT (c) 1999, TGA Technologies, Norcross, GA, USA + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * This file may be distributed as part of the RTEMS software item. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * John M. Mills (jmills@tga.com) + * TGA Technologies, Inc. + * 100 Pinnacle Way, Suite 140 + * Norcross, GA 30071 U.S.A. + * + * This modified file may be copied and distributed in accordance + * the above-referenced license. It is provided for critique and + * developmental purposes without any warranty nor representation + * by the authors or by TGA Technologies. + * + * $Id$ + * + * + ************************************************************************/ + +#ifndef _sh_io_types_h +#define _sh_io_types_h + +#include <rtems/score/iosh7045.h> +#include <termios.h> + +typedef enum {SCI0, SCI1} portNo; +typedef enum {eight, seven} dataBits; +typedef enum {one, two} stopBits; +typedef enum {even, odd} parity; + +typedef struct { + portNo line; + int speed_ix; + dataBits dBits; + int parEn; + parity par; + int mulPro; + stopBits sBits; +} sci_setup_t; + +typedef union{ + unsigned char Reg; /* By Register */ + struct { /* By Field */ + unsigned char Sync :1; /* Async/Sync */ + unsigned char DBts :1; /* Char.Length */ + unsigned char ParEn :1; /* Parity En.*/ + unsigned char Odd :1; /* Even/Odd */ + unsigned char SBts :1; /* No.Stop Bits */ + unsigned char MulP :1; /* Multi-Proc. */ + unsigned char Dvsr :2; /* Clock Sel. */ + } Fld; +} sci_smr_t; + +typedef union { + unsigned char Reg; /* By Register */ + struct { /* By Field */ + unsigned char TIE :1; /* Tx.Int.En. */ + unsigned char RIE :1; /* Rx.Int.En. */ + unsigned char TE :1; /* Tx.En. */ + unsigned char RE :1; /* Rx.En. */ + unsigned char MPIE:1; /* Mult.Pro.Int.En. */ + unsigned char TEIE:1; /* Tx.End Int.En. */ + unsigned char CkSrc :2; /* Clock Src. */ + } Fld; +} sci_scr_t; + +typedef struct { + unsigned char n ; + unsigned char N ; +} sci_bitrate_t; + +#endif /* _sh_io_types_h */ + diff --git a/c/src/lib/libcpu/sh/sh7045/include/null.h b/c/src/lib/libcpu/sh/sh7045/include/null.h new file mode 100644 index 0000000000..9ce4886c14 --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/include/null.h @@ -0,0 +1,72 @@ +/* null.h + * + * Null device driver, derived from rtems' stub driver. + * + * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#ifndef __NULL_DRIVER_h +#define __NULL_DRIVER_h + +#ifdef __cplusplus +extern "C" { +#endif + +#define DEVNULL_DRIVER_TABLE_ENTRY \ + { null_initialize, null_open, null_close, null_read, \ + null_write, null_control } + +#define NULL_SUCCESSFUL RTEMS_SUCCESSFUL + +rtems_device_driver null_initialize( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver null_open( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver null_close( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver null_read( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver null_write( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver null_control( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +#ifdef __cplusplus +} +#endif + +#endif +/* end of include file */ diff --git a/c/src/lib/libcpu/sh/sh7045/include/sci.h b/c/src/lib/libcpu/sh/sh7045/include/sci.h new file mode 100644 index 0000000000..c18321899c --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/include/sci.h @@ -0,0 +1,85 @@ +/* + * Driver for the sh2 704x on-chip serial devices (sci) + * + * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and + * Bernd Becker (becker@faw.uni-ulm.de) + * + * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * + * COPYRIGHT (c) 1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#ifndef _sh_sci_h +#define _sh_sci_h + +#ifdef __cplusplus +extern"C" { +#endif + +/* + * Devices are set to 9600 bps, 8 databits, 1 stopbit, no + * parity and asynchronous mode by default. + * + * NOTE: + * The onboard serial devices of the SH do not support hardware + * handshake. + */ + +#define DEVSCI_DRIVER_TABLE_ENTRY \ + { sh_sci_initialize, sh_sci_open, sh_sci_close, sh_sci_read, \ + sh_sci_write, sh_sci_control } + +extern rtems_device_driver sh_sci_initialize( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +extern rtems_device_driver sh_sci_open( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +extern rtems_device_driver sh_sci_close( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +extern rtems_device_driver sh_sci_read( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +extern rtems_device_driver sh_sci_write( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +extern rtems_device_driver sh_sci_control( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/c/src/lib/libcpu/sh/sh7045/include/sh7_pfc.h b/c/src/lib/libcpu/sh/sh7045/include/sh7_pfc.h new file mode 100644 index 0000000000..5be9ca8a5d --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/include/sh7_pfc.h @@ -0,0 +1,118 @@ +/* + * Bit values for the pin function controller of the Hitachi SH704x + * + * From Hitachi tutorials + * + * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and + * Bernd Becker (becker@faw.uni-ulm.de) + * + * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * + * COPYRIGHT (c) 1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#ifndef _sh7_pfc_h +#define _sh7_pfc_h + +#include <rtems/score/iosh7045.h> + +/* + * Port B IO Register (PBIOR) + */ +#define PBIOR PFC_PBIOR +#define PB15IOR 0x8000 +#define PB14IOR 0x4000 +#define PB13IOR 0x2000 +#define PB12IOR 0x1000 +#define PB11IOR 0x0800 +#define PB10IOR 0x0400 +#define PB9IOR 0x0200 +#define PB8IOR 0x0100 +#define PB7IOR 0x0080 +#define PB6IOR 0x0040 +#define PB5IOR 0x0020 +#define PB4IOR 0x0010 +#define PB3IOR 0x0008 +#define PB2IOR 0x0004 +#define PB1IOR 0x0002 +#define PB0IOR 0x0001 + +/* + * Port B Control Register (PBCR1) + */ +#define PBCR1 PFC_PBCR1 +#define PB15MD1 0x8000 +#define PB15MD0 0x4000 +#define PB14MD1 0x2000 +#define PB14MD0 0x1000 +#define PB13MD1 0x0800 +#define PB13MD0 0x0400 +#define PB12MD1 0x0200 +#define PB12MD0 0x0100 +#define PB11MD1 0x0080 +#define PB11MD0 0x0040 +#define PB10MD1 0x0020 +#define PB10MD0 0x0010 +#define PB9MD1 0x0008 +#define PB9MD0 0x0004 +#define PB8MD1 0x0002 +#define PB8MD0 0x0001 + +#define PB15MD PB15MD1|PB14MD0 +#define PB14MD PB14MD1|PB14MD0 +#define PB13MD PB13MD1|PB13MD0 +#define PB12MD PB12MD1|PB12MD0 +#define PB11MD PB11MD1|PB11MD0 +#define PB10MD PB10MD1|PB10MD0 +#define PB9MD PB9MD1|PB9MD0 +#define PB8MD PB8MD1|PB8MD0 + +#define PB_TXD1 PB11MD1 +#define PB_RXD1 PB10MD1 +#define PB_TXD0 PB9MD1 +#define PB_RXD0 PB8MD1 + +/* + * Port B Control Register (PBCR2) + */ +#define PBCR2 PFC_PBCR2 +#define PB7MD1 0x8000 +#define PB7MD0 0x4000 +#define PB6MD1 0x2000 +#define PB6MD0 0x1000 +#define PB5MD1 0x0800 +#define PB5MD0 0x0400 +#define PB4MD1 0x0200 +#define PB4MD0 0x0100 +#define PB3MD1 0x0080 +#define PB3MD0 0x0040 +#define PB2MD1 0x0020 +#define PB2MD0 0x0010 +#define PB1MD1 0x0008 +#define PB1MD0 0x0004 +#define PB0MD1 0x0002 +#define PB0MD0 0x0001 + +#define PB7MD PB7MD1|PB7MD0 +#define PB6MD PB6MD1|PB6MD0 +#define PB5MD PB5MD1|PB5MD0 +#define PB4MD PB4MD1|PB4MD0 +#define PB3MD PB3MD1|PB3MD0 +#define PB2MD PB2MD1|PB2MD0 +#define PB1MD PB1MD1|PB1MD0 +#define PB0MD PB0MD1|PB0MD0 + +#endif /* _sh7_pfc_h */ diff --git a/c/src/lib/libcpu/sh/sh7045/include/sh7_sci.h b/c/src/lib/libcpu/sh/sh7045/include/sh7_sci.h new file mode 100644 index 0000000000..cf33c0ebdd --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/include/sh7_sci.h @@ -0,0 +1,91 @@ +/* + * Bit values for the serial control registers of the Hitachi SH704X + * + * From Hitachi tutorials + * + * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and + * Bernd Becker (becker@faw.uni-ulm.de) + * + * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * + * COPYRIGHT (c) 1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#ifndef _sh7_sci_h +#define _sh7_sci_h + +#include <rtems/score/iosh7045.h> + +/* + * Serial mode register bits + */ + +#define SCI_SYNC_MODE 0x80 +#define SCI_SEVEN_BIT_DATA 0x40 +#define SCI_PARITY_ON 0x20 +#define SCI_ODD_PARITY 0x10 +#define SCI_STOP_BITS_2 0x08 +#define SCI_ENABLE_MULTIP 0x04 +#define SCI_PHI_64 0x03 +#define SCI_PHI_16 0x02 +#define SCI_PHI_4 0x01 +#define SCI_PHI_0 0x00 + +/* + * Serial register offsets, relative to SCI0_SMR or SCI1_SMR + */ + +#define SCI_SMR 0x00 +#define SCI_BRR 0x01 +#define SCI_SCR 0x02 +#define SCI_TDR 0x03 +#define SCI_SSR 0x04 +#define SCI_RDR 0x05 + +/* + * Serial control register bits + */ +#define SCI_TIE 0x80 /* Transmit interrupt enable */ +#define SCI_RIE 0x40 /* Receive interrupt enable */ +#define SCI_TE 0x20 /* Transmit enable */ +#define SCI_RE 0x10 /* Receive enable */ +#define SCI_MPIE 0x08 /* Multiprocessor interrupt enable */ +#define SCI_TEIE 0x04 /* Transmit end interrupt enable */ +#define SCI_CKE1 0x02 /* Clock enable 1 */ +#define SCI_CKE0 0x01 /* Clock enable 0 */ + +/* + * Serial status register bits + */ +#define SCI_TDRE 0x80 /* Transmit data register empty */ +#define SCI_RDRF 0x40 /* Receive data register full */ +#define SCI_ORER 0x20 /* Overrun error */ +#define SCI_FER 0x10 /* Framing error */ +#define SCI_PER 0x08 /* Parity error */ +#define SCI_TEND 0x04 /* Transmit end */ +#define SCI_MPB 0x02 /* Multiprocessor bit */ +#define SCI_MPBT 0x01 /* Multiprocessor bit transfer */ + +/* + * INTC Priority Settings + */ + +#define SCI0_IPMSK 0x00F0 +#define SCI0_LOWIP 0x0010 +#define SCI1_IPMSK 0x000F +#define SCI1_LOWIP 0x0001 + +#endif /* _sh7_sci_h */ diff --git a/c/src/lib/libcpu/sh/sh7045/null/Makefile.in b/c/src/lib/libcpu/sh/sh7045/null/Makefile.in new file mode 100644 index 0000000000..94b08d5a73 --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/null/Makefile.in @@ -0,0 +1,70 @@ +# +# $Id$ +# + +@SET_MAKE@ +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +top_builddir = ../../.. +subdir = sh/sh7045/null + +RTEMS_ROOT = @RTEMS_ROOT@ +PROJECT_ROOT = @PROJECT_ROOT@ + +VPATH = @srcdir@ + +PGM = ${ARCH}/null.rel + +# C source names, if any, go here -- minus the .c +C_PIECES = open close read write init cntrl +C_FILES = $(C_PIECES:%=%.c) +C_O_FILES = $(C_PIECES:%=${ARCH}/%.o) + +H_FILES = + +# Assembly source names, if any, go here -- minus the .s +S_PIECES = +S_FILES = $(S_PIECES:%=%.s) +S_O_FILES = $(S_FILES:%.s=${ARCH}/%.o) + +SRCS = $(DOCS) $(C_FILES) $(H_FILES) +OBJS = $(C_O_FILES) + +include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg +include $(RTEMS_ROOT)/make/leaf.cfg + +INSTALL_CHANGE = @INSTALL_CHANGE@ + +# +# (OPTIONAL) Add local stuff here using += +# + +DEFINES += +CPPFLAGS += +CFLAGS += + +LD_PATHS += +LD_LIBS += +LDFLAGS += + +# +# Add your list of files to delete here. The config files +# already know how to delete some stuff, so you may want +# to just run 'make clean' first to see what gets missed. +# 'make clobber' already includes 'make clean' +# + +CLEAN_ADDITIONS += +CLOBBER_ADDITIONS += + +${PGM}: ${SRCS} ${OBJS} + $(make-rel) + +all: ${ARCH} $(SRCS) $(PGM) + +# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile +install: all + +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + cd $(top_builddir) \ + && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status diff --git a/c/src/lib/libcpu/sh/sh7045/null/close.c b/c/src/lib/libcpu/sh/sh7045/null/close.c new file mode 100644 index 0000000000..cb5ac8cd65 --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/null/close.c @@ -0,0 +1,38 @@ +/* null_close + * + * This routine is the null device driver close routine. + * + * Derived from rtems' stub driver. + * + * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) + * + * Input parameters: + * major - device major number + * minor - device minor number + * pargb - pointer to close parameter block + * + * Output parameters: + * rval - NULL_SUCCESSFUL + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include <rtems.h> +#include <sh/null.h> + +rtems_device_driver null_close( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + return NULL_SUCCESSFUL; +} diff --git a/c/src/lib/libcpu/sh/sh7045/null/cntrl.c b/c/src/lib/libcpu/sh/sh7045/null/cntrl.c new file mode 100644 index 0000000000..cafc714279 --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/null/cntrl.c @@ -0,0 +1,38 @@ +/* null_control + * + * This routine is the null device driver control routine. + * + * Derived from rtems' stub driver. + * + * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) + * + * Input parameters: + * major - device major number + * minor - device minor number + * pargp - pointer to cntrl parameter block + * + * Output parameters: + * rval - NULL_SUCCESSFUL + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include <rtems.h> +#include <sh/null.h> + +rtems_device_driver null_control( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + return NULL_SUCCESSFUL; +} diff --git a/c/src/lib/libcpu/sh/sh7045/null/init.c b/c/src/lib/libcpu/sh/sh7045/null/init.c new file mode 100644 index 0000000000..dcc1800f6b --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/null/init.c @@ -0,0 +1,53 @@ +/* null_initialize + * + * This routine is the null device driver init routine. + * + * Derived from rtems' stub driver. + * + * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) + * + * Input parameters: + * major - device major number + * minor - device minor number + * pargp - pointer to parameter block + * + * Output parameters: + * rval - NULL_SUCCESSFUL + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include <rtems.h> +#include <sh/null.h> + +rtems_unsigned32 NULL_major; + +rtems_device_driver null_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + rtems_device_driver status ; + + status = rtems_io_register_name( + "/dev/null", + major, + (rtems_device_minor_number) 0 + ); + + if (status != RTEMS_SUCCESSFUL) + rtems_fatal_error_occurred(status); + + NULL_major = major; + + return RTEMS_SUCCESSFUL; +} diff --git a/c/src/lib/libcpu/sh/sh7045/null/open.c b/c/src/lib/libcpu/sh/sh7045/null/open.c new file mode 100644 index 0000000000..352f4b981e --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/null/open.c @@ -0,0 +1,38 @@ +/* null_open + * + * This routine is the null device driver open routine. + * + * Derived from rtems' stub driver. + * + * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) + * + * Input parameters: + * major - device major number + * minor - device minor number + * pargb - pointer to open parameter block + * + * Output parameters: + * rval - NULL_SUCCESSFUL + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include <rtems.h> +#include <sh/null.h> + +rtems_device_driver null_open( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + return NULL_SUCCESSFUL; +} diff --git a/c/src/lib/libcpu/sh/sh7045/null/read.c b/c/src/lib/libcpu/sh/sh7045/null/read.c new file mode 100644 index 0000000000..895ba0c7f4 --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/null/read.c @@ -0,0 +1,38 @@ +/* null_read + * + * This routine is the null device driver read routine. + * + * Derived from rtems' stub driver. + * + * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) + * + * Input parameters: + * major - device major number + * minor - device minor number + * pargp - pointer to read parameter block + * + * Output parameters: + * rval - NULL_SUCCESSFUL + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include <rtems.h> +#include <sh/null.h> + +rtems_device_driver null_read( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + return NULL_SUCCESSFUL; +} diff --git a/c/src/lib/libcpu/sh/sh7045/null/write.c b/c/src/lib/libcpu/sh/sh7045/null/write.c new file mode 100644 index 0000000000..d9c4da434b --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/null/write.c @@ -0,0 +1,44 @@ +/* null_write + * + * This routine is the null device driver write routine. + * + * Derived from rtems' stub driver. + * + * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) + * + * Input parameters: + * major - device major number + * minor - device minor number + * pargp - pointer to write parameter block + * + * Output parameters: + * rval - NULL_SUCCESSFUL + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include <rtems.h> +#include <rtems/libio.h> + +#include <sh/null.h> + +rtems_device_driver null_write( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + rtems_libio_rw_args_t *rw_args = (rtems_libio_rw_args_t *) pargp ; + + rw_args->bytes_moved = rw_args->count ; + + return NULL_SUCCESSFUL; +} diff --git a/c/src/lib/libcpu/sh/sh7032/console/Makefile.in b/c/src/lib/libcpu/sh/sh7045/sci/Makefile.in index 33710ef51f..2548c0b478 100644 --- a/c/src/lib/libcpu/sh/sh7032/console/Makefile.in +++ b/c/src/lib/libcpu/sh/sh7045/sci/Makefile.in @@ -1,31 +1,31 @@ -# -# $Id$ -# +## +## $Id$ +## @SET_MAKE@ srcdir = @srcdir@ top_srcdir = @top_srcdir@ top_builddir = ../../.. -subdir = sh/sh7032/console +subdir = sh/sh7045/sci RTEMS_ROOT = @RTEMS_ROOT@ PROJECT_ROOT = @PROJECT_ROOT@ VPATH = @srcdir@ -PGM = ${ARCH}/console.rel +PGM = ${ARCH}/sci.rel # C source names, if any, go here -- minus the .c -C_PIECES = console +C_PIECES = sci C_FILES = $(C_PIECES:%=%.c) C_O_FILES = $(C_PIECES:%=${ARCH}/%.o) H_FILES = -# Assembly source names, if any, go here -- minus the .S +# Assembly source names, if any, go here -- minus the .s S_PIECES = -S_FILES = $(S_PIECES:%=%.S) -S_O_FILES = $(S_FILES:%.S=${ARCH}/%.o) +S_FILES = $(S_PIECES:%=%.s) +S_O_FILES = $(S_FILES:%.s=${ARCH}/%.o) SRCS = $(C_FILES) $(H_FILES) $(S_FILES) OBJS = $(C_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libcpu/sh/sh7045/sci/sci.c b/c/src/lib/libcpu/sh/sh7045/sci/sci.c new file mode 100644 index 0000000000..4a50abc803 --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/sci/sci.c @@ -0,0 +1,384 @@ +/* + * /dev/sci[0|1] for Hitachi SH 704X + * + * The SH doesn't have a designated console device. Therefore we "alias" + * another device as /dev/console and revector all calls to /dev/console + * to this device. + * + * This approach is similar to installing a sym-link from one device to + * another device. If rtems once will support sym-links for devices files, + * this implementation could be dropped. + * + * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) + * + * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * + * COPYRIGHT (c) 1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * Modified to reflect sh7045 processor: + * John M. Mills (jmills@tga.com) + * TGA Technologies, Inc. + * 100 Pinnacle Way, Suite 140 + * Norcross, GA 30071 U.S.A. + * + * This modified file may be copied and distributed in accordance + * the above-referenced license. It is provided for critique and + * developmental purposes without any warranty nor representation + * by the authors or by TGA Technologies. + * + * $Id$ + */ + +#include <rtems.h> + +#include <stdlib.h> + +#include <rtems/libio.h> +#include <iosupp.h> +#include <rtems/score/sh_io.h> +#include <rtems/score/ispsh7045.h> +#include <rtems/score/iosh7045.h> +#include <sh/sh7_sci.h> +#include <sh/io_types.h> +#include <sh/sci.h> + +struct scidev_t { + char * name ; + rtems_device_minor_number minor ; + unsigned short opened ; + tcflag_t cflags ; +} sci_device[2] = +{ + { "/dev/sci0", 0, 0, B9600 | CS8 }, + { "/dev/sci1", 0, 0, B9600 | CS8 } +} ; + +/* local data structures maintain hardware configuration */ +extern int _sci_get_brparms( + tcflag_t cflag, + unsigned char *smr, + unsigned char *brr ); + +#if UNUSED +static sci_setup_t sio_param[2]; +#endif + +/* local functions operate SCI ports 0 and 1 */ +/* called from polling routines or ISRs */ +rtems_boolean wrtSCI0(unsigned char ch) +{ + unsigned8 temp; + rtems_boolean result=FALSE; + + if ((read8(SCI_SSR0) & SCI_TDRE) != 0x00) { + /* Write the character to the TDR */ + write8(ch, SCI_TDR0); + /* Clear the TDRE bit */ + temp = read8(SCI_SSR0) & ~SCI_TDRE; + write8(temp, SCI_SSR0); + result = TRUE; + } + return result; +} /* wrtSCI0 */ + +rtems_boolean wrtSCI1(unsigned char ch) +{ + unsigned8 temp; + rtems_boolean result=FALSE; + + if ((read8(SCI_SSR1) & SCI_TDRE) != 0x00) { + /* Write the character to the TDR */ + write8(ch, SCI_TDR1); + /* Clear the TDRE bit */ + temp = read8(SCI_SSR1) & ~SCI_TDRE; + write8(temp, SCI_SSR1); + result = TRUE; + } + return result; +} /* wrtSCI1 */ + +/* polled output steers byte to selected port */ +void sh_sci_outbyte_polled( + rtems_device_minor_number minor, + char ch ) +{ + if (minor == 0) /* blocks until port ready */ + while (wrtSCI0(ch) != TRUE); /* SCI0*/ + else + while (wrtSCI1(ch) != TRUE); /* SCI1*/ +} /* sh_sci_outbyte_polled */ + +/* Initial version calls polled output driver and blocks */ +void outbyte( + rtems_device_minor_number minor, + char ch) +{ + sh_sci_outbyte_polled(minor, (unsigned char)ch); +} /* outbyte */ + +rtems_boolean rdSCI0(unsigned char *ch) +{ + unsigned8 temp; + rtems_boolean result=FALSE; + + if ((read8(SCI_SSR0) & SCI_RDRF) != 0x00) { + /* Write the character to the TDR */ + write8(*ch, SCI_RDR0); + /* Clear the TDRE bit */ + temp = read8(SCI_SSR0) & ~SCI_RDRF; + write8(temp, SCI_SSR0); + result = TRUE; + } + return result; +} /* rdSCI0 */ + +rtems_boolean rdSCI1(unsigned char *ch) +{ + unsigned8 temp; + rtems_boolean result=FALSE; + + if ((read8(SCI_SSR1) & SCI_RDRF) != 0x00) { + /* Write the character to the TDR */ + write8(*ch, SCI_RDR1); + /* Clear the TDRE bit */ + temp= read8(SCI_SSR1) & ~SCI_RDRF; + write8(temp, SCI_SSR1); + result = TRUE; + } + return result; +} /* rdSCI1 */ + + +/* initial version pulls byte from selected port */ +char sh_sci_inbyte_polled( + rtems_device_minor_number minor ) +{ + char ch; + + if (minor == 0) /* blocks until char.ready */ + while (rdSCI0(&ch) != TRUE); /* SCI0 */ + else + while (rdSCI1(&ch) != TRUE); /* SCI1 */ + return ch; +} /* sh_sci_inbyte_polled */ + +/* Initial version calls polled input driver */ +char inbyte( + rtems_device_minor_number minor ) +{ + char ch; + + ch = sh_sci_inbyte_polled(minor); + return ch; +} /* inbyte */ + + +/* sh_sci_initialize + * + * This routine initializes the sh_sci IO driver. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * Return values: + */ + +rtems_device_driver sh_sci_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg ) +{ + int a; + unsigned16 temp16; + rtems_device_driver status ; + + /* register devices */ + for ( a = 0 ; a < 2 ; a++ ) + { + status = rtems_io_register_name( + sci_device[a].name, + major, + sci_device[a].minor ); + if (status != RTEMS_SUCCESSFUL) + rtems_fatal_error_occurred(status); + } + + /* default hardware setup */ + + /* general setup */ + temp16 = read16(PFC_PECR1) | 0x0800; /* General I/O except pin 13 (reset) */ + write16(temp16, PFC_PECR1); + write16(0x00, PFC_PECR2); /* All I/O lines bits 7-0 */ + temp16 = read16(PFC_PEIOR) | 0x0020; /* P5 to out, all other pins in */ + write16(temp16, PFC_PEIOR); + + temp16 = read16(PFC_PACRL2) | 0x0145; /* PFC - pins for Tx0-1, Rx0-1 */ + write16(temp16, PFC_PACRL2); + + return RTEMS_SUCCESSFUL; +} + + +/* + * Open entry point + */ + +rtems_device_driver sh_sci_open( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg ) +{ + unsigned8 temp8; + unsigned char smr ; + unsigned char brr ; + + unsigned a ; + + /* device already opened */ + if ( sci_device[minor].opened > 0 ) + { + sci_device[minor].opened++ ; + + return RTEMS_SUCCESSFUL ; + } + + /* retrieve brr and smr values */ + _sci_get_brparms( sci_device[minor].cflags, &smr, &brr ); + + if (minor == 0) { + write8(0x00, SCI_SCR0); /* Clear SCR */ + write8(smr, SCI_SMR0); /* Clear SMR */ + write8(brr, SCI_BRR0); /* Default 9600 baud rate */ +#if 0 + write8(0x1F, SCI_BRR0); /* 28800 baud */ +#endif +/* FIXME: Will get optimized away */ + for(a=0;a<10000L;a++); /* One bit delay */ + write8(0x30, SCI_SCR0); /* Enable clock output */ + temp8 = read8(SCI_RDR0); /* Clear out old input */ + + } else { + write8(0x00, SCI_SCR1); /* Clear SCR */ + write8(smr, SCI_SMR1); /* Clear SMR */ + write8(brr, SCI_BRR1); /* Default 9600 baud rate */ +#if 0 + write8(0x1F, SCI_BRR1); /* 28800 baud */ +#endif +/* FIXME: Will get optimized away */ + for(a=0;a<10000L;a++); /* One bit delay */ + write8(0x30, SCI_SCR1); /* Enable clock output */ + temp8 = read8(SCI_RDR1); /* Clear out old input */ + } + + sci_device[minor].opened++ ; + + return RTEMS_SUCCESSFUL ; +} + +/* + * Close entry point + */ + +rtems_device_driver sh_sci_close( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + /* FIXME: Incomplete */ + if ( sci_device[minor].opened > 0 ) + sci_device[minor].opened-- ; + else + return RTEMS_INVALID_NUMBER ; + + return RTEMS_SUCCESSFUL ; +} + +/* + * read bytes from the serial port. We only have stdin. + */ + +rtems_device_driver sh_sci_read( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + rtems_libio_rw_args_t *rw_args; + char *buffer; + int maximum; + int count = 0; + + rw_args = (rtems_libio_rw_args_t *) arg; + + buffer = rw_args->buffer; + maximum = rw_args->count; + + for (count = 0; count < maximum; count++) { + buffer[ count ] = inbyte(minor); + if (buffer[ count ] == '\n' || buffer[ count ] == '\r') { + buffer[ count++ ] = '\n'; + break; + } + } + + rw_args->bytes_moved = count; + return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED; +} + +/* + * write bytes to the serial port. Stdout and stderr are the same. + */ + +rtems_device_driver sh_sci_write( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + int count; + int maximum; + rtems_libio_rw_args_t *rw_args; + char *buffer; + + rw_args = (rtems_libio_rw_args_t *) arg; + + buffer = rw_args->buffer; + maximum = rw_args->count; + + for (count = 0; count < maximum; count++) { + if ( buffer[ count ] == '\n') { + outbyte(minor, '\r'); + } + outbyte( minor, buffer[ count ] ); + } + + rw_args->bytes_moved = maximum; + return 0; +} + +/* + * IO Control entry point + */ + +rtems_device_driver sh_sci_control( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + /* Not yet supported */ + return RTEMS_SUCCESSFUL ; +} diff --git a/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c b/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c index 42764f6eb1..192c2f43d2 100644 --- a/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c +++ b/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c @@ -41,10 +41,17 @@ #include <rtems/score/cpu.h> #include <rtems/score/isr.h> #include <rtems/score/thread.h> -#include <rtems/score/cpu_isps.h> -#include <rtems/score/sh_io.h> #include <rtems/score/sh.h> -#include <rtems/score/iosh7030.h> + +#if defined(sh7032) +#include <rtems/score/ispsh7032.h> +#include <rtems/score/iosh7032.h> +#elif defined (sh7045) +#include <rtems/score/ispsh7045.h> +#include <rtems/score/iosh7045.h> +#endif + +#include <rtems/score/sh_io.h> /* from cpu_isps.c */ extern proc_ptr _Hardware_isr_Table[]; diff --git a/c/src/lib/libcpu/sh/sh7045/timer/Makefile.in b/c/src/lib/libcpu/sh/sh7045/timer/Makefile.in new file mode 100644 index 0000000000..8bf33bee32 --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/timer/Makefile.in @@ -0,0 +1,71 @@ +## +## $Id$ +## + +@SET_MAKE@ +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +top_builddir = ../../.. +subdir = sh/sh7045/timer + +RTEMS_ROOT = @RTEMS_ROOT@ +PROJECT_ROOT = @PROJECT_ROOT@ + +VPATH = @srcdir@ + +PGM = ${ARCH}/timer.rel + +# C source names, if any, go here -- minus the .c +C_PIECES = timer +C_FILES = $(C_PIECES:%=%.c) +C_O_FILES = $(C_PIECES:%=${ARCH}/%.o) + +H_FILES = + +# Assembly source names, if any, go here -- minus the .s +S_PIECES = +S_FILES = $(S_PIECES:%=%.s) +S_O_FILES = $(S_FILES:%.s=${ARCH}/%.o) + +SRCS = $(C_FILES) $(H_FILES) $(S_FILES) +OBJS = $(C_O_FILES) $(S_O_FILES) + +include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg +include $(RTEMS_ROOT)/make/leaf.cfg + +INSTALL_CHANGE = @INSTALL_CHANGE@ + +# +# (OPTIONAL) Add local stuff here using += +# + +DEFINES += +CPPFLAGS += +CFLAGS += + +LD_PATHS += +LD_LIBS += +LDFLAGS += + +# +# Add your list of files to delete here. The config files +# already know how to delete some stuff, so you may want +# to just run 'make clean' first to see what gets missed. +# 'make clobber' already includes 'make clean' +# + +CLEAN_ADDITIONS += +CLOBBER_ADDITIONS += + +${PGM}: ${SRCS} ${OBJS} + $(make-rel) + +all: ${ARCH} $(SRCS) $(PGM) + +# the .rel file built here will be put into libbsp.a by +# libbsp/sh/BSP/Makefile +install: all + +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + cd $(top_builddir) \ + && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status diff --git a/c/src/lib/libcpu/sh/sh7045/timer/timer.c b/c/src/lib/libcpu/sh/sh7045/timer/timer.c new file mode 100644 index 0000000000..029c0bec94 --- /dev/null +++ b/c/src/lib/libcpu/sh/sh7045/timer/timer.c @@ -0,0 +1,208 @@ +/* + * timer for the Hitachi SH 704X + * + * This file manages the benchmark timer used by the RTEMS Timing Test + * Suite. Each measured time period is demarcated by calls to + * Timer_initialize() and Read_timer(). Read_timer() usually returns + * the number of microseconds since Timer_initialize() exitted. + * + * NOTE: It is important that the timer start/stop overhead be + * determined when porting or modifying this code. + * + * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and + * Bernd Becker (becker@faw.uni-ulm.de) + * + * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * COPYRIGHT (c) 1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include <rtems.h> + +#include <rtems/score/sh_io.h> +#include <rtems/score/iosh7045.h> + +/* + * We use a Phi/4 timer + */ +#define SCALE (Timer_MHZ/4) + +#define MTU1_STARTMASK 0xfd +#define MTU1_SYNCMASK 0xfd +#define MTU1_MODEMASK 0xc0 +#define MTU1_TCRMASK 0x01 +#define MTU1_TIORMASK 0x88 +#define MTU1_STAT_MASK 0xf8 +#define MTU1_TIERMASK 0xfc +#define IPRC_MTU1_MASK 0xfff0 + +#ifndef MTU1_PRIO +#define MTU1_PRIO 15 +#endif + +#define MTU1_VECTOR 86 + +rtems_isr timerisr(); + +static rtems_unsigned32 Timer_interrupts; + +rtems_boolean Timer_driver_Find_average_overhead; + +static rtems_unsigned32 Timer_MHZ ; + +void Timer_initialize( void ) +{ + rtems_unsigned8 temp8; + rtems_unsigned16 temp16; + rtems_unsigned32 level; + rtems_isr *ignored; + + Timer_MHZ = rtems_cpu_configuration_get_clicks_per_second() / 1000000 ; + + /* + * Timer has never overflowed. This may not be necessary on some + * implemenations of timer but .... + */ + + Timer_interrupts /* .i */ = 0; + _CPU_ISR_Disable( level); + + /* + * Somehow start the timer + */ + /* stop Timer 1 */ + temp8 = read8( MTU_TSTR) & MTU1_STARTMASK; + write8( temp8, MTU_TSTR); + + /* initialize counter 1 */ + write16( 0, MTU_TCNT1); + + /* Timer 1 is independent of other timers */ + temp8 = read8( MTU_TSYR) & MTU1_SYNCMASK; + write8( temp8, MTU_TSYR); + + /* Timer 1, normal mode */ + temp8 = read8( MTU_TMDR1) & MTU1_MODEMASK; + write8( temp8, MTU_TMDR1); + + /* x0000000 + * |||||+++--- Internal Clock + * |||++------ Count on rising edge + * |++-------- disable TCNT clear + * +---------- don`t care + */ + write8( MTU1_TCRMASK, MTU_TCR1); + + /* gra and grb are not used */ + write8( MTU1_TIORMASK, MTU_TIOR1); + + /* reset all status flags */ + temp8 = read8( MTU_TSR1) & MTU1_STAT_MASK; + write8( temp8, MTU_TSR1); + + /* enable overflow interrupt */ + write8( MTU1_TIERMASK, MTU_TIER1); + + /* set interrupt priority */ + temp16 = read16( INTC_IPRC) & IPRC_MTU1_MASK; + temp16 |= MTU1_PRIO; + write16( temp16, INTC_IPRC); + + /* initialize ISR */ + _CPU_ISR_install_raw_handler( MTU1_VECTOR, timerisr, &ignored ); + _CPU_ISR_Enable( level); + + /* start timer 1 */ + temp8 = read8( MTU_TSTR) | ~MTU1_STARTMASK; + write8( temp8, MTU_TSTR); +} + +/* + * The following controls the behavior of Read_timer(). + * + * AVG_OVERHEAD is the overhead for starting and stopping the timer. It + * is usually deducted from the number returned. + * + * LEAST_VALID is the lowest number this routine should trust. Numbers + * below this are "noise" and zero is returned. + */ + +#define AVG_OVERHEAD 1 /* It typically takes X.X microseconds */ + /* (Y countdowns) to start/stop the timer. */ + /* This value is in microseconds. */ +#define LEAST_VALID 0 /* 20 */ /* Don't trust a clicks value lower than this */ + +int Read_timer( void ) +{ + rtems_unsigned32 clicks; + rtems_unsigned32 total ; + /* + * Read the timer and see how many clicks it has been since we started. + */ + + + clicks = read16( MTU_TCNT1); /* XXX: read some HW here */ + + /* + * Total is calculated by taking into account the number of timer overflow + * interrupts since the timer was initialized and clicks since the last + * interrupts. + */ + + total = clicks + Timer_interrupts * 65536 ; + + if ( Timer_driver_Find_average_overhead ) + return total / SCALE; /* in XXX microsecond units */ + else + { + if ( total < LEAST_VALID ) + return 0; /* below timer resolution */ + /* + * Somehow convert total into microseconds + */ + return (total / SCALE - AVG_OVERHEAD) ; + } +} + +/* + * Empty function call used in loops to measure basic cost of looping + * in Timing Test Suite. + */ + +rtems_status_code Empty_function( void ) +{ + return RTEMS_SUCCESSFUL; +} + +void Set_find_average_overhead( + rtems_boolean find_flag +) +{ + Timer_driver_Find_average_overhead = find_flag; +} + +/* Timer 1 is used */ + +#pragma interrupt +void timerisr( void ) +{ + unsigned8 temp8; + + /* reset the flags of the status register */ + temp8 = read8( MTU_TSR1) & MTU1_STAT_MASK; + write8( temp8, MTU_TSR1); + + Timer_interrupts += 1; +} |