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-rw-r--r--c/src/lib/libcpu/sh/sh7750/clock/ckinit.c16
-rw-r--r--c/src/lib/libcpu/sh/sh7750/include/rtems/score/ispsh7750.h2
-rw-r--r--c/src/lib/libcpu/sh/sh7750/include/sh/sh4uart.h40
-rw-r--r--c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c20
-rw-r--r--c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c4
-rw-r--r--c/src/lib/libcpu/sh/sh7750/score/ispsh7750.c2
-rw-r--r--c/src/lib/libcpu/sh/sh7750/timer/timer.c20
7 files changed, 52 insertions, 52 deletions
diff --git a/c/src/lib/libcpu/sh/sh7750/clock/ckinit.c b/c/src/lib/libcpu/sh/sh7750/clock/ckinit.c
index 11837453ba..05bd7214aa 100644
--- a/c/src/lib/libcpu/sh/sh7750/clock/ckinit.c
+++ b/c/src/lib/libcpu/sh/sh7750/clock/ckinit.c
@@ -44,7 +44,7 @@
* number of clock ticks since the driver was initialized.
*/
-volatile rtems_unsigned32 Clock_driver_ticks;
+volatile uint32_t Clock_driver_ticks;
static void Clock_exit( void );
static rtems_isr Clock_isr( rtems_vector_number vector );
@@ -77,7 +77,7 @@ rtems_isr_entry Old_ticker;
rtems_isr
Clock_isr(rtems_vector_number vector)
{
- unsigned16 tcr;
+ uint16_t tcr;
/* reset the timer underflow flag */
tcr = read16(SH7750_TCR0);
@@ -108,9 +108,9 @@ Install_clock(rtems_isr_entry clock_isr)
{
int cpudiv = 1; /* CPU frequency divider */
int tidiv = 1; /* Timer input frequency divider */
- unsigned32 timer_divider; /* Calculated Timer Divider value */
- unsigned8 temp8;
- unsigned16 temp16;
+ uint32_t timer_divider; /* Calculated Timer Divider value */
+ uint8_t temp8;
+ uint16_t temp16;
/*
* Initialize the clock tick device driver variables
@@ -236,8 +236,8 @@ Install_clock(rtems_isr_entry clock_isr)
void
Clock_exit(void)
{
- unsigned8 temp8 = 0;
- unsigned16 temp16 = 0;
+ uint8_t temp8 = 0;
+ uint16_t temp16 = 0;
/* turn off the timer interrupts */
/* Stop the Timer 0 */
@@ -296,7 +296,7 @@ Clock_control(rtems_device_major_number major,
rtems_device_minor_number minor,
void *pargp)
{
- rtems_unsigned32 isrlevel;
+ uint32_t isrlevel;
rtems_libio_ioctl_args_t *args = pargp;
if (args != 0)
diff --git a/c/src/lib/libcpu/sh/sh7750/include/rtems/score/ispsh7750.h b/c/src/lib/libcpu/sh/sh7750/include/rtems/score/ispsh7750.h
index 27c3b5fa08..2361b32137 100644
--- a/c/src/lib/libcpu/sh/sh7750/include/rtems/score/ispsh7750.h
+++ b/c/src/lib/libcpu/sh/sh7750/include/rtems/score/ispsh7750.h
@@ -50,7 +50,7 @@ extern "C" {
/* dummy ISP */
extern void _dummy_isp( void );
-extern void __ISR_Handler( unsigned32 vector );
+extern void __ISR_Handler( uint32_t vector );
/* This variable contains VBR value used to pass control when debug, error
* or virtual memory exceptions occured.
diff --git a/c/src/lib/libcpu/sh/sh7750/include/sh/sh4uart.h b/c/src/lib/libcpu/sh/sh7750/include/sh/sh4uart.h
index 295e75d409..04ab955569 100644
--- a/c/src/lib/libcpu/sh/sh7750/include/sh/sh4uart.h
+++ b/c/src/lib/libcpu/sh/sh7750/include/sh/sh4uart.h
@@ -35,35 +35,35 @@
/*
* Macros to call UART registers
*/
-#define SCRDR(n) (*(volatile rtems_unsigned8 *)SH7750_SCRDR(n))
+#define SCRDR(n) (*(volatile uint8_t *)SH7750_SCRDR(n))
#define SCRDR1 SCRDR(1)
#define SCRDR2 SCRDR(2)
-#define SCTDR(n) (*(volatile rtems_unsigned8 *)SH7750_SCTDR(n))
+#define SCTDR(n) (*(volatile uint8_t *)SH7750_SCTDR(n))
#define SCTDR1 SCTDR(1)
#define SCTDR2 SCTDR(2)
-#define SCSMR(n) ((n) == 1 ? *(volatile rtems_unsigned8 *)SH7750_SCSMR1 : \
- *(volatile rtems_unsigned16 *)SH7750_SCSMR2)
+#define SCSMR(n) ((n) == 1 ? *(volatile uint8_t *)SH7750_SCSMR1 : \
+ *(volatile uint16_t *)SH7750_SCSMR2)
#define SCSMR1 SCSMR(1)
#define SCSMR2 SCSMR(2)
-#define SCSCR(n) ((n) == 1 ? *(volatile rtems_unsigned8 *)SH7750_SCSCR1 : \
- *(volatile rtems_unsigned16 *)SH7750_SCSCR2)
+#define SCSCR(n) ((n) == 1 ? *(volatile uint8_t *)SH7750_SCSCR1 : \
+ *(volatile uint16_t *)SH7750_SCSCR2)
#define SCSCR1 SCSCR(1)
#define SCSCR2 SCSCR(2)
-#define SCSSR(n) ((n) == 1 ? *(volatile rtems_unsigned8 *)SH7750_SCSSR1 : \
- *(volatile rtems_unsigned16 *)SH7750_SCSSR2)
+#define SCSSR(n) ((n) == 1 ? *(volatile uint8_t *)SH7750_SCSSR1 : \
+ *(volatile uint16_t *)SH7750_SCSSR2)
#define SCSSR1 SCSSR(1)
#define SCSSR2 SCSSR(2)
-#define SCSPTR1 (*(volatile rtems_unsigned8 *)SH7750_SCSPTR1)
-#define SCSPTR2 (*(volatile rtems_unsigned16 *)SH7750_SCSPTR2)
-#define SCBRR(n) (*(volatile rtems_unsigned8 *)SH7750_SCBRR(n))
+#define SCSPTR1 (*(volatile uint8_t *)SH7750_SCSPTR1)
+#define SCSPTR2 (*(volatile uint16_t *)SH7750_SCSPTR2)
+#define SCBRR(n) (*(volatile uint8_t *)SH7750_SCBRR(n))
#define SCBRR1 SCBRR(1)
#define SCBRR2 SCBRR(2)
-#define SCFCR2 (*(volatile rtems_unsigned16 *)SH7750_SCFCR2)
-#define SCFDR2 (*(volatile rtems_unsigned16 *)SH7750_SCFDR2)
-#define SCLSR2 (*(volatile rtems_unsigned16 *)SH7750_SCLSR2)
+#define SCFCR2 (*(volatile uint16_t *)SH7750_SCFCR2)
+#define SCFDR2 (*(volatile uint16_t *)SH7750_SCFDR2)
+#define SCLSR2 (*(volatile uint16_t *)SH7750_SCLSR2)
-#define IPRB (*(volatile rtems_unsigned16 *)SH7750_IPRB)
-#define IPRC (*(volatile rtems_unsigned16 *)SH7750_IPRC)
+#define IPRB (*(volatile uint16_t *)SH7750_IPRB)
+#define IPRC (*(volatile uint16_t *)SH7750_IPRC)
/*
* The following structure is a descriptor of single UART channel.
@@ -71,14 +71,14 @@
* current operating values
*/
typedef struct sh4uart {
- rtems_unsigned8 chn; /* UART channel number */
- rtems_unsigned8 int_driven; /* UART interrupt vector number, or
+ uint8_t chn; /* UART channel number */
+ uint8_t int_driven; /* UART interrupt vector number, or
0 if polled I/O */
void *tty; /* termios channel descriptor */
volatile const char *tx_buf; /* Transmit buffer from termios */
- volatile rtems_unsigned32 tx_buf_len; /* Transmit buffer length */
- volatile rtems_unsigned32 tx_ptr; /* Index of next char to transmit*/
+ volatile uint32_t tx_buf_len; /* Transmit buffer length */
+ volatile uint32_t tx_ptr; /* Index of next char to transmit*/
rtems_isr_entry old_handler_transmit; /* Saved interrupt handlers */
rtems_isr_entry old_handler_receive;
diff --git a/c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c b/c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c
index 84c3f23153..41ecc044de 100644
--- a/c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c
+++ b/c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c
@@ -80,11 +80,11 @@ sh4uart_init(sh4uart *uart, void *tty, int chn, int int_driven)
* RETURNS:
* peripheral module clock in Hz.
*/
-rtems_unsigned32
+uint32_t
sh4uart_get_Pph(void)
{
- rtems_unsigned16 frqcr = *(volatile rtems_unsigned16 *)SH7750_FRQCR;
- rtems_unsigned32 Pph = CPU_CLOCK_RATE_HZ;
+ uint16_t frqcr = *(volatile uint16_t *)SH7750_FRQCR;
+ uint32_t Pph = CPU_CLOCK_RATE_HZ;
switch (frqcr & SH7750_FRQCR_IFC)
{
@@ -161,10 +161,10 @@ sh4uart_get_Pph(void)
static void
sh4uart_set_baudrate(sh4uart *uart, speed_t baud)
{
- rtems_unsigned32 rate;
- rtems_signed16 div;
+ uint32_t rate;
+ int16_t div;
int n;
- rtems_unsigned32 Pph = sh4uart_get_Pph();
+ uint32_t Pph = sh4uart_get_Pph();
switch (baud)
{
@@ -250,7 +250,7 @@ sh4uart_reset(sh4uart *uart)
if (int_driven)
{
- rtems_unsigned16 ipr;
+ uint16_t ipr;
if (chn == SH4_SCI)
{
@@ -358,9 +358,9 @@ sh4uart_set_attributes(sh4uart *uart, const struct termios *t)
{
int level;
speed_t baud;
- rtems_unsigned16 smr;
+ uint16_t smr;
- smr = (rtems_unsigned16)(*(rtems_unsigned8 *)SH7750_SCSMR(uart->chn));
+ smr = (uint16_t )(*(uint8_t *)SH7750_SCSMR(uart->chn));
baud = cfgetospeed(t);
@@ -403,7 +403,7 @@ sh4uart_set_attributes(sh4uart *uart, const struct termios *t)
SCSCR(uart->chn) &= ~(SH7750_SCSCR_TE | SH7750_SCSCR_RE);
sh4uart_set_baudrate(uart, baud);
- SCSMR(uart->chn) = (rtems_unsigned8)smr;
+ SCSMR(uart->chn) = (uint8_t )smr;
/* enable operations */
SCSCR(uart->chn) |= SH7750_SCSCR_TE | SH7750_SCSCR_RE;
diff --git a/c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c b/c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c
index 57eed3f626..a541ab471c 100644
--- a/c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c
+++ b/c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c
@@ -254,9 +254,9 @@ __CPU_Context_restore:\n\
* This routine provides the RTEMS interrupt management.
*/
-void __ISR_Handler( unsigned32 vector)
+void __ISR_Handler( uint32_t vector)
{
- register unsigned32 level;
+ register uint32_t level;
_CPU_ISR_Disable( level );
diff --git a/c/src/lib/libcpu/sh/sh7750/score/ispsh7750.c b/c/src/lib/libcpu/sh/sh7750/score/ispsh7750.c
index 628b42135e..9da94bf8ea 100644
--- a/c/src/lib/libcpu/sh/sh7750/score/ispsh7750.c
+++ b/c/src/lib/libcpu/sh/sh7750/score/ispsh7750.c
@@ -72,7 +72,7 @@ void *_VBR_Saved;
*
*/
void _CPU_ISR_install_vector(
- unsigned32 vector,
+ uint32_t vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
diff --git a/c/src/lib/libcpu/sh/sh7750/timer/timer.c b/c/src/lib/libcpu/sh/sh7750/timer/timer.c
index 0f732ac03f..88c0c839fc 100644
--- a/c/src/lib/libcpu/sh/sh7750/timer/timer.c
+++ b/c/src/lib/libcpu/sh/sh7750/timer/timer.c
@@ -39,13 +39,13 @@
rtems_isr timerisr();
-static rtems_unsigned32 Timer_interrupts;
+static uint32_t Timer_interrupts;
/* Counter should be divided to this value to obtain time in microseconds */
-static rtems_unsigned32 microseconds_divider;
+static uint32_t microseconds_divider;
/* Interrupt period in microseconds */
-static rtems_unsigned32 microseconds_per_int;
+static uint32_t microseconds_per_int;
rtems_boolean Timer_driver_Find_average_overhead;
@@ -65,8 +65,8 @@ rtems_boolean Timer_driver_Find_average_overhead;
void
Timer_initialize(void)
{
- rtems_unsigned8 temp8;
- rtems_unsigned16 temp16;
+ uint8_t temp8;
+ uint16_t temp16;
rtems_interrupt_level level;
rtems_isr *ignored;
int cpudiv = 1;
@@ -203,11 +203,11 @@ Timer_initialize(void)
int
Read_timer(void)
{
- rtems_unsigned32 clicks;
- rtems_unsigned32 ints;
- rtems_unsigned32 total ;
+ uint32_t clicks;
+ uint32_t ints;
+ uint32_t total ;
rtems_interrupt_level level;
- rtems_unsigned32 tcr;
+ uint32_t tcr;
_CPU_ISR_Disable(level);
@@ -281,7 +281,7 @@ Set_find_average_overhead(rtems_boolean find_flag)
void
timerisr(void)
{
- unsigned8 temp8;
+ uint8_t temp8;
/* reset the flags of the status register */
temp8 = read8(SH7750_TCR1) & ~SH7750_TCR_UNF;