diff options
Diffstat (limited to 'c/src/lib/libcpu/sh/sh7045/sci/sci_termios.c')
| -rw-r--r-- | c/src/lib/libcpu/sh/sh7045/sci/sci_termios.c | 154 |
1 files changed, 77 insertions, 77 deletions
diff --git a/c/src/lib/libcpu/sh/sh7045/sci/sci_termios.c b/c/src/lib/libcpu/sh/sh7045/sci/sci_termios.c index 8f00ad9c38..ef9e510f66 100644 --- a/c/src/lib/libcpu/sh/sh7045/sci/sci_termios.c +++ b/c/src/lib/libcpu/sh/sh7045/sci/sci_termios.c @@ -34,7 +34,7 @@ #include <sh/sci_termios.h> -/* +/* * Some handy macros */ #define SH_SCI_REG_DATA(_data, _minor, _register) \ @@ -51,22 +51,22 @@ /* * NOTE: Some SH variants have 3 sci devices */ - + #define SCI_MINOR_DEVICES 2 -/* - * Automatically generated function imported from scitab.rel +/* + * Automatically generated function imported from scitab.rel */ extern int _sci_get_brparms( tcflag_t cflag, unsigned char *smr, unsigned char *brr ); -/* +/* * Translate termios flags into SCI settings */ -int sh_sci_set_attributes( +int sh_sci_set_attributes( int minor, const struct termios *t ) @@ -74,7 +74,7 @@ int sh_sci_set_attributes( uint8_t smr ; uint8_t brr ; int a; - + tcflag_t c_cflag = t->c_cflag; if ( c_cflag & CBAUD ) @@ -82,7 +82,7 @@ int sh_sci_set_attributes( if ( _sci_get_brparms( c_cflag, &smr, &brr ) != 0 ) return -1 ; } - + if ( c_cflag & CSIZE ) { if ( c_cflag & CS8 ) @@ -109,34 +109,34 @@ int sh_sci_set_attributes( smr &= ~SCI_ODD_PARITY; SH_SCI_REG_MASK((SCI_RE | SCI_TE), minor, SCI_SCR); - + SH_SCI_REG_DATA(smr, minor, SCI_SMR); SH_SCI_REG_DATA(brr, minor, SCI_BRR); - + for(a=0; a < 10000L; a++) { /* Delay one bit */ asm volatile ("nop"); } SH_SCI_REG_FLAG((SCI_RE | SCI_TE), minor, SCI_SCR); - + return 0; } -/* +/* * Receive-data-full ISR * - * The same routine for all interrupt sources of the same type. + * The same routine for all interrupt sources of the same type. */ rtems_isr sh_sci_rx_isr(rtems_vector_number vector) { int minor; - + for(minor = 0; minor < Console_Port_Count; minor++) { if(Console_Port_Tbl[minor].ulIntVector == vector) - { + { uint8_t temp8; - + /* * FIXME: error handling should be added */ @@ -152,7 +152,7 @@ rtems_isr sh_sci_rx_isr(rtems_vector_number vector) } } -/* +/* * Transmit-data-empty ISR * * The same routine for all interrupt sources of the same type. @@ -165,11 +165,11 @@ rtems_isr sh_sci_tx_isr(rtems_vector_number vector) { if(Console_Port_Tbl[minor].ulDataPort == vector) { - /* + /* * FIXME: Error handling should be added */ - - /* + + /* * Mask end-of-transmission interrupt */ SH_SCI_REG_MASK(SCI_TIE, minor, SCI_SCR); @@ -177,7 +177,7 @@ rtems_isr sh_sci_tx_isr(rtems_vector_number vector) if(rtems_termios_dequeue_characters( Console_Port_Data[minor].termios_data, 1)) { - /* + /* * More characters to be received - interrupt must be enabled */ SH_SCI_REG_FLAG(SCI_TIE, minor, SCI_SCR); @@ -188,38 +188,38 @@ rtems_isr sh_sci_tx_isr(rtems_vector_number vector) } -/* +/* * Initialization of serial port */ void sh_sci_init(int minor) { uint16_t temp16; - - /* - * set PFC registers to enable I/O pins + + /* + * set PFC registers to enable I/O pins */ - if ((minor == 0)) + if ((minor == 0)) { temp16 = read16(PFC_PACRL2); /* disable SCK0, DMA, IRQ */ temp16 &= ~(PA2MD1 | PA2MD0); temp16 |= (PA_TXD0 | PA_RXD0); /* enable pins for Tx0, Rx0 */ write16(temp16, PFC_PACRL2); - - } - else if (minor == 1) - { + + } + else if (minor == 1) + { temp16 = read16(PFC_PACRL2); /* disable SCK1, DMA, IRQ */ temp16 &= ~(PA5MD1 | PA5MD0); temp16 |= (PA_TXD1 | PA_RXD1); /* enable pins for Tx1, Rx1 */ write16(temp16, PFC_PACRL2); - } + } - /* + /* * Non-default hardware setup occurs in sh_sci_first_open */ } -/* +/* * Initialization of interrupts * * Interrupts can be started only after opening a device, so interrupt @@ -231,22 +231,22 @@ void sh_sci_initialize_interrupts(int minor) rtems_status_code status; sh_sci_init(minor); - /* + /* * Disable IRQ of SCIx */ status = sh_set_irq_priority( - Console_Port_Tbl[minor].ulIntVector, 0); + Console_Port_Tbl[minor].ulIntVector, 0); if(status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); SH_SCI_REG_MASK(SCI_RIE, minor, SCI_SCR); - /* + /* * Catch apropriate vectors */ status = rtems_interrupt_catch( - sh_sci_rx_isr, + sh_sci_rx_isr, Console_Port_Tbl[minor].ulIntVector, &old_isr); @@ -260,14 +260,14 @@ void sh_sci_initialize_interrupts(int minor) if(status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - - /* - * Enable IRQ of SCIx + + /* + * Enable IRQ of SCIx */ SH_SCI_REG_FLAG(SCI_RIE, minor, SCI_SCR); status = sh_set_irq_priority( - Console_Port_Tbl[minor].ulIntVector, + Console_Port_Tbl[minor].ulIntVector, Console_Port_Tbl[minor].ulCtrlPort2); if(status != RTEMS_SUCCESSFUL) @@ -287,21 +287,21 @@ int sh_sci_first_open( { uint8_t temp8; unsigned int a ; - - /* - * check for valid minor number + + /* + * check for valid minor number */ if(( minor > ( SCI_MINOR_DEVICES -1 )) || ( minor < 0 )) { return RTEMS_INVALID_NUMBER; } - /* - * set up SCI registers + /* + * set up SCI registers */ /* Clear SCR - disable Tx and Rx */ SH_SCI_REG_DATA(0x00, minor, SCI_SCR); - + /* set SMR and BRR - baudrate and format */ sh_sci_set_attributes(minor, Console_Port_Tbl[minor].pDeviceParams); @@ -312,8 +312,8 @@ int sh_sci_first_open( write8((SCI_RE | SCI_TE), /* enable async. Tx and Rx */ Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SCR); - /* - * clear error flags + /* + * clear error flags */ temp8 = read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR); while(temp8 & (SCI_RDRF | SCI_ORER | SCI_FER | SCI_PER)) @@ -323,25 +323,25 @@ int sh_sci_first_open( /* clear some flags */ SH_SCI_REG_FLAG((SCI_RDRF | SCI_ORER | SCI_FER | SCI_PER), minor, SCI_SSR); - + /* check if everything is OK */ temp8 = read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR); - } - + } + /* Clear RDRF flag */ SH_SCI_REG_DATA(0x00, minor, SCI_TDR); /* force output */ - + /* Clear the TDRE bit */ SH_SCI_REG_FLAG(SCI_TDRE, minor, SCI_SSR); - - /* - * Interrupt setup + + /* + * Interrupt setup */ if(Console_Port_Tbl[minor].pDeviceFns->deviceOutputUsesInterrupts) { SH_SCI_REG_FLAG(SCI_RIE, minor, SCI_SCR); } - + return RTEMS_SUCCESSFUL ; } @@ -365,12 +365,12 @@ int sh_sci_last_close( return RTEMS_SUCCESSFUL ; } -/* +/* * Interrupt aware write routine */ int sh_sci_write_support_int( - int minor, - const char *buf, + int minor, + const char *buf, int len ) { @@ -381,15 +381,15 @@ int sh_sci_write_support_int( */ SH_SCI_REG_DATA(*buf, minor, SCI_TDR); SH_SCI_REG_MASK(SCI_TDRE, minor, SCI_SSR); - /* + /* * Enable interrupt */ SH_SCI_REG_FLAG(SCI_TIE, minor, SCI_SCR); - + return 1; } -/* +/* * Polled write method */ int sh_sci_write_support_polled( @@ -399,19 +399,19 @@ int sh_sci_write_support_polled( ) { int count = 0; - + while(count < len) { sh_sci_write_polled(minor, buf[count]); count++; } - /* + /* * Return number of bytes written */ return count; } -/* +/* * Polled write of one character at a time */ void sh_sci_write_polled( @@ -419,45 +419,45 @@ void sh_sci_write_polled( char c ) { - /* + /* * Wait for end of previous character */ while(!(read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR) & SCI_TDRE)); - /* + /* * Send the character */ SH_SCI_REG_DATA(c, minor, SCI_TDR); - - /* + + /* * Clear TDRE flag */ SH_SCI_REG_MASK(SCI_TDRE, minor, SCI_SSR); } -/* - * Non-blocking read +/* + * Non-blocking read */ int sh_sci_inbyte_nonblocking_polled(int minor) { uint8_t inbyte; - /* + /* * Check if input buffer is full */ if(read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR) & SCI_RDRF) { inbyte = read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_RDR); SH_SCI_REG_MASK(SCI_RDRF, minor, SCI_SSR); - - /* + + /* * Check for errors */ - if(read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR) & + if(read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR) & (SCI_ORER | SCI_FER | SCI_PER)) { SH_SCI_REG_MASK((SCI_ORER | SCI_FER | SCI_PER), minor, SCI_SSR); return -1; - } + } return (int)inbyte; } return -1; |