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-rw-r--r--c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c14
-rw-r--r--c/src/lib/libcpu/powerpc/mpc821/clock/clock.c46
-rw-r--r--c/src/lib/libcpu/powerpc/mpc860/clock/clock.c42
-rw-r--r--c/src/lib/libcpu/powerpc/ppc403/clock/clock.c50
4 files changed, 68 insertions, 84 deletions
diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c b/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c
index 035af4d61d..988215fa26 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c
@@ -48,12 +48,10 @@ rtems_device_minor_number rtems_clock_minor;
void clockOff(void* unused)
{
- if (BSP_Configuration.ticks_per_timeslice) {
- /*
- * Nothing to do as we cannot disable all interrupts and
- * the decrementer interrupt enable is MSR_EE
- */
- }
+ /*
+ * Nothing to do as we cannot disable all interrupts and
+ * the decrementer interrupt enable is MSR_EE
+ */
}
void clockOn(void* unused)
{
@@ -116,9 +114,7 @@ int clockIsOn(void* unused)
void Clock_exit( void )
{
- if ( BSP_Configuration.ticks_per_timeslice ) {
- (void) BSP_disconnect_clock_handler ();
- }
+ (void) BSP_disconnect_clock_handler ();
}
/*
diff --git a/c/src/lib/libcpu/powerpc/mpc821/clock/clock.c b/c/src/lib/libcpu/powerpc/mpc821/clock/clock.c
index a0fe3a02d2..b380758970 100644
--- a/c/src/lib/libcpu/powerpc/mpc821/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/mpc821/clock/clock.c
@@ -81,28 +81,26 @@ void Install_clock(rtems_isr_entry clock_isr)
if (pit_value > 0xffff) { /* pit is only 16 bits long */
rtems_fatal_error_occurred(-1);
}
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
-
- /*
- * initialize the interval here
- * First tick is set to right amount of time in the future
- * Future ticks will be incremented over last value set
- * in order to provide consistent clicks in the face of
- * interrupt overhead
- */
-
- rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
+
+ /*
+ * initialize the interval here
+ * First tick is set to right amount of time in the future
+ * Future ticks will be incremented over last value set
+ * in order to provide consistent clicks in the face of
+ * interrupt overhead
+ */
+
+ rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
- m821.sccr &= ~(1<<24);
- m821.pitc = pit_value;
+ m821.sccr &= ~(1<<24);
+ m821.pitc = pit_value;
- /* set PIT irq level, enable PIT, PIT interrupts */
- /* and clear int. status */
- m821.piscr = M821_PISCR_PIRQ(0) |
- M821_PISCR_PTE | M821_PISCR_PS | M821_PISCR_PIE;
+ /* set PIT irq level, enable PIT, PIT interrupts */
+ /* and clear int. status */
+ m821.piscr = M821_PISCR_PIRQ(0) |
+ M821_PISCR_PTE | M821_PISCR_PS | M821_PISCR_PIE;
- m821.simask |= M821_SIMASK_LVM0;
- }
+ m821.simask |= M821_SIMASK_LVM0;
atexit(Clock_exit);
}
@@ -127,12 +125,10 @@ ReInstall_clock(rtems_isr_entry new_clock_isr)
void
Clock_exit(void)
{
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- /* disable PIT and PIT interrupts */
- m821.piscr &= ~(M821_PISCR_PTE | M821_PISCR_PIE);
-
- (void) set_vector(0, PPC_IRQ_LVL0, 1);
- }
+ /* disable PIT and PIT interrupts */
+ m821.piscr &= ~(M821_PISCR_PTE | M821_PISCR_PIE);
+
+ (void) set_vector(0, PPC_IRQ_LVL0, 1);
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libcpu/powerpc/mpc860/clock/clock.c b/c/src/lib/libcpu/powerpc/mpc860/clock/clock.c
index 25af11ce9a..73a586aa6a 100644
--- a/c/src/lib/libcpu/powerpc/mpc860/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/mpc860/clock/clock.c
@@ -82,28 +82,26 @@ void Install_clock(rtems_isr_entry clock_isr)
if (pit_value > 0xffff) { /* pit is only 16 bits long */
rtems_fatal_error_occurred(-1);
}
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- /*
- * initialize the interval here
- * First tick is set to right amount of time in the future
- * Future ticks will be incremented over last value set
- * in order to provide consistent clicks in the face of
- * interrupt overhead
- */
-
- rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
+ /*
+ * initialize the interval here
+ * First tick is set to right amount of time in the future
+ * Future ticks will be incremented over last value set
+ * in order to provide consistent clicks in the face of
+ * interrupt overhead
+ */
+
+ rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
- m860.sccr &= ~(1<<24);
- m860.pitc = pit_value;
+ m860.sccr &= ~(1<<24);
+ m860.pitc = pit_value;
- /* set PIT irq level, enable PIT, PIT interrupts */
- /* and clear int. status */
- m860.piscr = M860_PISCR_PIRQ(0) |
- M860_PISCR_PTE | M860_PISCR_PS | M860_PISCR_PIE;
+ /* set PIT irq level, enable PIT, PIT interrupts */
+ /* and clear int. status */
+ m860.piscr = M860_PISCR_PIRQ(0) |
+ M860_PISCR_PTE | M860_PISCR_PS | M860_PISCR_PIE;
- m860.simask |= M860_SIMASK_LVM0;
- }
+ m860.simask |= M860_SIMASK_LVM0;
atexit(Clock_exit);
}
@@ -128,12 +126,10 @@ ReInstall_clock(rtems_isr_entry new_clock_isr)
void
Clock_exit(void)
{
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- /* disable PIT and PIT interrupts */
- m860.piscr &= ~(M860_PISCR_PTE | M860_PISCR_PIE);
+ /* disable PIT and PIT interrupts */
+ m860.piscr &= ~(M860_PISCR_PTE | M860_PISCR_PIE);
- (void) set_vector(0, PPC_IRQ_LVL0, 1);
- }
+ (void) set_vector(0, PPC_IRQ_LVL0, 1);
}
rtems_device_driver Clock_initialize(
diff --git a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
index 44f07eff1f..d7e9514b5f 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
@@ -132,6 +132,7 @@ void Install_clock(rtems_isr_entry clock_isr)
{
rtems_isr_entry previous_isr;
rtems_unsigned32 pvr, iocr;
+ register rtems_unsigned32 tcr;
Clock_driver_ticks = 0;
@@ -164,31 +165,29 @@ void Install_clock(rtems_isr_entry clock_isr)
pit_value = rtems_configuration_get_microseconds_per_tick() *
rtems_cpu_configuration_get_clicks_per_usec();
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- register rtems_unsigned32 tcr;
- /*
- * initialize the interval here
- * First tick is set to right amount of time in the future
- * Future ticks will be incremented over last value set
- * in order to provide consistent clicks in the face of
- * interrupt overhead
- */
-
- rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
-
- asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
+ /*
+ * initialize the interval here
+ * First tick is set to right amount of time in the future
+ * Future ticks will be incremented over last value set
+ * in order to provide consistent clicks in the face of
+ * interrupt overhead
+ */
+
+ rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr);
+
+ asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
- asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
+ asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
- tcr &= ~ 0x04400000;
+ tcr &= ~ 0x04400000;
- tcr |= (auto_restart ? 0x04400000 : 0x04000000);
+ tcr |= (auto_restart ? 0x04400000 : 0x04000000);
- tick_time = get_itimer() + pit_value;
+ tick_time = get_itimer() + pit_value;
- asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
- }
+ asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
+
atexit(Clock_exit);
}
@@ -214,18 +213,15 @@ ReInstall_clock(rtems_isr_entry new_clock_isr)
void
Clock_exit(void)
{
- if ( rtems_configuration_get_ticks_per_timeslice() ) {
- register rtems_unsigned32 tcr;
+ register rtems_unsigned32 tcr;
- asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
+ asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
- tcr &= ~ 0x04400000;
+ tcr &= ~ 0x04400000;
- asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
+ asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
- (void) set_vector(0, PPC_IRQ_PIT, 1);
- }
-
+ (void) set_vector(0, PPC_IRQ_PIT, 1);
}
rtems_device_driver Clock_initialize(
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-10 01:25:46 +0000