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-rw-r--r--c/src/lib/libcpu/arm/s3c24xx/clock/clockdrv.c6
-rw-r--r--c/src/lib/libcpu/arm/s3c24xx/include/s3c2400.h (renamed from c/src/lib/libcpu/arm/s3c2400/include/s3c2400.h)6
-rw-r--r--c/src/lib/libcpu/arm/s3c24xx/include/s3c2410.h (renamed from c/src/lib/libcpu/arm/s3c2410/include/s3c2410.h)7
-rw-r--r--c/src/lib/libcpu/arm/s3c24xx/irq/bsp_irq_asm.S (renamed from c/src/lib/libcpu/arm/s3c2400/irq/bsp_irq_asm.S)6
-rw-r--r--c/src/lib/libcpu/arm/s3c24xx/irq/bsp_irq_init.c2
-rw-r--r--c/src/lib/libcpu/arm/s3c24xx/irq/irq.h113
6 files changed, 123 insertions, 17 deletions
diff --git a/c/src/lib/libcpu/arm/s3c24xx/clock/clockdrv.c b/c/src/lib/libcpu/arm/s3c24xx/clock/clockdrv.c
index 04edef54cf..76ff9376e1 100644
--- a/c/src/lib/libcpu/arm/s3c24xx/clock/clockdrv.c
+++ b/c/src/lib/libcpu/arm/s3c24xx/clock/clockdrv.c
@@ -26,11 +26,11 @@ static int clock_isr_is_on(const rtems_irq_connect_data *irq);
/* Replace the first value with the clock's interrupt name. */
rtems_irq_connect_data clock_isr_data = {BSP_INT_TIMER4,
(rtems_irq_hdl)Clock_isr,
+ NULL,
clock_isr_on,
clock_isr_off,
- clock_isr_is_on,
- 3, /* unused for ARM cpus */
- 0 }; /* unused for ARM cpus */
+ clock_isr_is_on
+};
/* If you follow the code, this is never used, so any value
* should work
diff --git a/c/src/lib/libcpu/arm/s3c2400/include/s3c2400.h b/c/src/lib/libcpu/arm/s3c24xx/include/s3c2400.h
index b8243a7790..092dcffe5c 100644
--- a/c/src/lib/libcpu/arm/s3c2400/include/s3c2400.h
+++ b/c/src/lib/libcpu/arm/s3c24xx/include/s3c2400.h
@@ -8,6 +8,8 @@
#ifndef S3C2400_H_
#define S3C2400_H_
+/* to be used in assembly code */
+#define rINTOFFSET_ADDR 0x14400014
/* Memory control */
#define rBWSCON (*(volatile unsigned *)0x14000000)
#define rBANKCON0 (*(volatile unsigned *)0x14000004)
@@ -427,7 +429,7 @@
}
/* Wait until rINTPND is changed for the case that the ISR is very short. */
-#ifndef __asm__
+#ifndef ASM
/* Typedefs */
typedef union {
struct _reg {
@@ -654,7 +656,7 @@ typedef union {
} reg;
unsigned long all;
} IISSFIF;
-#endif //__asm__
+#endif //ASM
#define LCD_WIDTH 240
#define LCD_HEIGHT 320
diff --git a/c/src/lib/libcpu/arm/s3c2410/include/s3c2410.h b/c/src/lib/libcpu/arm/s3c24xx/include/s3c2410.h
index 4e064a1805..d11bcf9d21 100644
--- a/c/src/lib/libcpu/arm/s3c2410/include/s3c2410.h
+++ b/c/src/lib/libcpu/arm/s3c24xx/include/s3c2410.h
@@ -7,6 +7,9 @@
#ifndef S3C2410_H_
#define S3C2410_H_
+
+/* to be used in assembly code */
+#define rINTOFFSET_ADDR 0x4A000014
/* Memory control */
#define rBWSCON (*(volatile unsigned *)0x48000000)
#define rBANKCON0 (*(volatile unsigned *)0x48000004)
@@ -576,7 +579,7 @@
rINTPND;\
}
/* Wait until rINTPND is changed for the case that the ISR is very short. */
-#ifndef __asm__
+#ifndef ASM
/* Typedefs */
typedef union {
struct _reg {
@@ -802,7 +805,7 @@ typedef union {
} reg;
unsigned long all;
} IISSFIF;
-#endif //__asm__
+#endif //ASM
#define LCD_WIDTH 240
#define LCD_HEIGHT 320
diff --git a/c/src/lib/libcpu/arm/s3c2400/irq/bsp_irq_asm.S b/c/src/lib/libcpu/arm/s3c24xx/irq/bsp_irq_asm.S
index d3df84dd11..78d0c5ce44 100644
--- a/c/src/lib/libcpu/arm/s3c2400/irq/bsp_irq_asm.S
+++ b/c/src/lib/libcpu/arm/s3c24xx/irq/bsp_irq_asm.S
@@ -6,6 +6,8 @@
* CopyRight (C) 2000 Canon Research France SA.
* Emmanuel Raguet, mailto:raguet@crf.canon.fr
*
+ * merged to common file for s32400 and s32410 by Thomas Doerfler, embedded brains
+ *
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
@@ -13,7 +15,7 @@
* $Id$
*/
-#define __asm__
+#include <s3c24xx.h>
/*
* Function to obtain, execute an IT handler and acknowledge the IT
@@ -23,7 +25,7 @@
bsp_interrupt_dispatch :
- ldr r0, =0x14400014 /* Read rINTOFFSET */
+ ldr r0, =rINTOFFSET_ADDR /* Read rINTOFFSET */
ldr r1, [r0]
ldr r0, =bsp_vector_table
diff --git a/c/src/lib/libcpu/arm/s3c24xx/irq/bsp_irq_init.c b/c/src/lib/libcpu/arm/s3c24xx/irq/bsp_irq_init.c
index d4a9f4ebdb..97c24c4fb4 100644
--- a/c/src/lib/libcpu/arm/s3c24xx/irq/bsp_irq_init.c
+++ b/c/src/lib/libcpu/arm/s3c24xx/irq/bsp_irq_init.c
@@ -16,8 +16,6 @@
#include <bsp.h>
#include <s3c24xx.h>
-extern void default_int_handler(void);
-
void BSP_rtems_irq_mngt_init(void)
{
long *vectorTable;
diff --git a/c/src/lib/libcpu/arm/s3c24xx/irq/irq.h b/c/src/lib/libcpu/arm/s3c24xx/irq/irq.h
index b8f2868f28..5870f06377 100644
--- a/c/src/lib/libcpu/arm/s3c24xx/irq/irq.h
+++ b/c/src/lib/libcpu/arm/s3c24xx/irq/irq.h
@@ -1,16 +1,117 @@
/* irq.h
*
- * Note: This file will not be compiled, it just a place holder by now
+ * Common file, merged from s3c2400/irq/irq.h and s3c2410/irq/irq.h
*/
#ifndef _IRQ_H_
#define _IRQ_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
-// This file is a place holder
-// The real irq.h preinstalled is s3c2410/irq/irq.h and s3c2410/irq/irq.h
-// change/refer to this files
-// TODO: clean irq.h in ARM BSP. there is lots of duplicated codes in cpu_name/irq/irq.h with cpukit/include/rtems/irq.h
-//
+/*
+ * Include some preprocessor value also used by assember code
+ */
+
+#include <rtems/irq.h>
+#include <rtems.h>
+#include <s3c24xx.h>
+
+extern void default_int_handler(rtems_irq_hdl_param unused);
+/*-------------------------------------------------------------------------+
+| Constants
++--------------------------------------------------------------------------*/
+
+#ifdef CPU_S3C2400
+ /* possible interrupt sources */
+#define BSP_EINT0 0
+#define BSP_EINT1 1
+#define BSP_EINT2 2
+#define BSP_EINT3 3
+#define BSP_EINT4 4
+#define BSP_EINT5 5
+#define BSP_EINT6 6
+#define BSP_EINT7 7
+#define BSP_INT_TICK 8
+#define BSP_INT_WDT 9
+#define BSP_INT_TIMER0 10
+#define BSP_INT_TIMER1 11
+#define BSP_INT_TIMER2 12
+#define BSP_INT_TIMER3 13
+#define BSP_INT_TIMER4 14
+#define BSP_INT_UERR01 15
+#define _res0 16
+#define BSP_INT_DMA0 17
+#define BSP_INT_DMA1 18
+#define BSP_INT_DMA2 19
+#define BSP_INT_DMA3 20
+#define BSP_INT_MMC 21
+#define BSP_INT_SPI 22
+#define BSP_INT_URXD0 23
+#define BSP_INT_URXD1 24
+#define BSP_INT_USBD 25
+#define BSP_INT_USBH 26
+#define BSP_INT_IIC 27
+#define BSP_INT_UTXD0 28
+#define BSP_INT_UTXD1 29
+#define BSP_INT_RTC 30
+#define BSP_INT_ADC 31
+#define BSP_MAX_INT 32
+
+#elif defined CPU_S3C2410
+ /* possible interrupt sources */
+#define BSP_EINT0 0
+#define BSP_EINT1 1
+#define BSP_EINT2 2
+#define BSP_EINT3 3
+#define BSP_EINT4_7 4
+#define BSP_EINT8_23 5
+#define BSP_nBATT_FLT 7
+#define BSP_INT_TICK 8
+#define BSP_INT_WDT 9
+#define BSP_INT_TIMER0 10
+#define BSP_INT_TIMER1 11
+#define BSP_INT_TIMER2 12
+#define BSP_INT_TIMER3 13
+#define BSP_INT_TIMER4 14
+#define BSP_INT_UART2 15
+#define BSP_INT_LCD 16
+#define BSP_INT_DMA0 17
+#define BSP_INT_DMA1 18
+#define BSP_INT_DMA2 19
+#define BSP_INT_DMA3 20
+#define BSP_INT_SDI 21
+#define BSP_INT_SPI0 22
+#define BSP_INT_UART1 23
+#define BSP_INT_USBD 25
+#define BSP_INT_USBH 26
+#define BSP_INT_IIC 27
+#define BSP_INT_UART0 28
+#define BSP_INT_SPI1 29
+#define BSP_INT_RTC 30
+#define BSP_INT_ADC 31
+#define BSP_MAX_INT 32
+#endif
+
+extern void *bsp_vector_table;
+#define VECTOR_TABLE &bsp_vector_table
+
+/*-------------------------------------------------------------------------+
+| Function Prototypes.
++--------------------------------------------------------------------------*/
+/*
+ * ------------------ RTEMS Single Irq Handler Mngt Routines ----------------
+ */
+
+/*
+ * function to initialize the interrupt for a specific BSP
+ */
+void BSP_rtems_irq_mngt_init();
+
+
+#ifdef __cplusplus
+}
+#endif
#endif /* _IRQ_H_ */
/* end of include file */
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-01 16:30:27 +0000