diff options
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/sh/gensh4/include/.cvsignore | 2 | ||||
-rw-r--r-- | c/src/lib/libbsp/sh/gensh4/include/Makefile.am | 17 | ||||
-rw-r--r-- | c/src/lib/libbsp/sh/gensh4/include/bsp.h | 174 | ||||
-rw-r--r-- | c/src/lib/libbsp/sh/gensh4/include/coverhd.h | 130 | ||||
-rw-r--r-- | c/src/lib/libbsp/sh/gensh4/include/sdram.h | 42 |
5 files changed, 365 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/sh/gensh4/include/.cvsignore b/c/src/lib/libbsp/sh/gensh4/include/.cvsignore new file mode 100644 index 0000000000..282522db03 --- /dev/null +++ b/c/src/lib/libbsp/sh/gensh4/include/.cvsignore @@ -0,0 +1,2 @@ +Makefile +Makefile.in diff --git a/c/src/lib/libbsp/sh/gensh4/include/Makefile.am b/c/src/lib/libbsp/sh/gensh4/include/Makefile.am new file mode 100644 index 0000000000..d54ee94993 --- /dev/null +++ b/c/src/lib/libbsp/sh/gensh4/include/Makefile.am @@ -0,0 +1,17 @@ +## +## $Id$ +## + +AUTOMAKE_OPTIONS = foreign 1.4 + +include_HEADERS = bsp.h coverhd.h sdram.h + +$(PROJECT_INCLUDE)/%.h: %.h + $(INSTALL_DATA) $< $@ + +PREINSTALL_FILES = $(PROJECT_INCLUDE) \ + $(include_HEADERS:%.h=$(PROJECT_INCLUDE)/%.h) + +all-local: $(PREINSTALL_FILES) + +include $(top_srcdir)/../../../../../../automake/local.am diff --git a/c/src/lib/libbsp/sh/gensh4/include/bsp.h b/c/src/lib/libbsp/sh/gensh4/include/bsp.h new file mode 100644 index 0000000000..25da9274c4 --- /dev/null +++ b/c/src/lib/libbsp/sh/gensh4/include/bsp.h @@ -0,0 +1,174 @@ +/* + * This include file contains all board IO definitions. + * + * generic sh4 BSP + * + * Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * Based on work: + * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) + * + * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * + * COPYRIGHT (c) 1998-2001. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * Minor adaptations for sh2 by: + * John M. Mills (jmills@tga.com) + * TGA Technologies, Inc. + * 100 Pinnacle Way, Suite 140 + * Norcross, GA 30071 U.S.A. + * + * This modified file may be copied and distributed in accordance + * the above-referenced license. It is provided for critique and + * developmental purposes without any warranty nor representation + * by the authors or by TGA Technologies. + * + * $Id$ + */ + +#ifndef __gensh4_h +#define __gensh4_h + +#ifdef __cplusplus +extern "C" { +#endif + +#include <rtems.h> +#include <clockdrv.h> +#include <console.h> +#include "rtems/score/sh7750_regs.h" + +/* + * confdefs.h overrides for this BSP: + * - number of termios serial ports (defaults to 1) + * - Interrupt stack space is not minimum if defined. + */ + +/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ +#define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024) + +/* + * Define the time limits for RTEMS Test Suite test durations. + * Long test and short test duration limits are provided. These + * values are in seconds and need to be converted to ticks for the + * application. + * + */ + +#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ +#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ + +/* + * Stuff for Time Test 27 + */ + +#define MUST_WAIT_FOR_INTERRUPT 1 + +#ifndef SH7750_EVT_WDT_ITI +# error "..." +#endif + +#define Install_tm27_vector( handler ) \ +{ \ + rtems_isr_entry old_handler; \ + rtems_status_code status; \ + status = rtems_interrupt_catch( (handler), \ + SH7750_EVT_TO_NUM(SH7750_EVT_WDT_ITI), &old_handler); \ + if (status != RTEMS_SUCCESSFUL) \ + printf("Status of rtems_interrupt_catch = %d", status); \ +} + +#define Cause_tm27_intr() \ +{ \ + *(volatile rtems_unsigned16 *)SH7750_IPRB |= 0xf000; \ + *(volatile rtems_unsigned16 *)SH7750_WTCSR = SH7750_WTCSR_KEY; \ + *(volatile rtems_unsigned16 *)SH7750_WTCNT = SH7750_WTCNT_KEY | 0xfe; \ + *(volatile rtems_unsigned16 *)SH7750_WTCSR = \ + SH7750_WTCSR_KEY | SH7750_WTCSR_TME; \ +} + +#define Clear_tm27_intr() \ +{ \ + *(volatile rtems_unsigned16 *)SH7750_WTCSR = SH7750_WTCSR_KEY; \ +} + +#define Lower_tm27_intr() \ +{ \ + sh_set_interrupt_level((SH7750_IPRB & 0xf000) << SH4_SR_IMASK_S); \ +} + +/* Constants */ + +/* + * Simple spin delay in microsecond units for device drivers. + * This is very dependent on the clock speed of the target. + */ + +#define delay( microseconds ) CPU_delay(microseconds) +#define sh_delay( microseconds ) CPU_delay( microseconds ) + + +/* + * Defined in the linker script 'linkcmds' + */ + +extern unsigned32 HeapStart ; +extern unsigned32 HeapEnd ; +extern unsigned32 WorkSpaceStart ; +extern unsigned32 WorkSpaceEnd ; + +extern void *CPU_Interrupt_stack_low ; +extern void *CPU_Interrupt_stack_high ; + +/* + * This variable is nesessary for console driver. + */ +extern rtems_unsigned32 SH4_CPU_HZ_Frequency; + +/* + * Defined in start.S + */ +extern unsigned32 boot_mode; +#define SH4_BOOT_MODE_FLASH 0 +#define SH4_BOOT_MODE_IPL 1 + +/* miscellaneous stuff assumed to exist */ + +extern rtems_configuration_table BSP_Configuration; + +extern void bsp_cleanup( void ); + + +/* + * Device Driver Table Entries + */ + +/* + * We redefine CONSOLE_DRIVER_TABLE_ENTRY to redirect /dev/console + */ +#undef CONSOLE_DRIVER_TABLE_ENTRY +#define CONSOLE_DRIVER_TABLE_ENTRY \ + { console_initialize, console_open, console_close, \ + console_read, console_write, console_control } + +/* + * NOTE: Use the standard Clock driver entry + */ + +#ifdef __cplusplus +} +#endif + +#endif +/* end of include file */ diff --git a/c/src/lib/libbsp/sh/gensh4/include/coverhd.h b/c/src/lib/libbsp/sh/gensh4/include/coverhd.h new file mode 100644 index 0000000000..37f319960d --- /dev/null +++ b/c/src/lib/libbsp/sh/gensh4/include/coverhd.h @@ -0,0 +1,130 @@ +/* coverhd.h + * + * This include file has defines to represent the overhead associated + * with calling a particular directive from C. These are used in the + * Timing Test Suite to ignore the overhead required to pass arguments + * to directives. On some CPUs and/or target boards, this overhead + * is significant and makes it difficult to distinguish internal + * RTEMS execution time from that used to call the directive. + * This file should be updated after running the C overhead timing + * test. Once this update has been performed, the RTEMS Time Test + * Suite should be rebuilt to account for these overhead times in the + * timing results. + * + * NOTE: If these are all zero, then the times reported include all + * all calling overhead including passing of arguments. + * + * + * These are the figures tmoverhd.exe reported with gcc-2.95.1 -O4 + * on a Hitachi SH7045F Evaluation Board with SH7045F at 29 MHz + * + * These results are assumed to be applicable to most SH7045/29MHz boards + * + * Author: John M.Mills (jmills@tga.com) + * + * COPYRIGHT (c) 1999. TGA Technologies, Inc., Norcross, GA, USA + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * This file may be copied and distributed in accordance + * the above-referenced license. It is provided for critique and + * developmental purposes without any warranty nor representation + * by the authors or by TGA Technologies. + * + * $Id$ + */ + +#ifndef __COVERHD_h +#define __COVERHD_h + +#ifdef __cplusplus +extern "C" { +#endif + +#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0 +#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0 +#define CALLING_OVERHEAD_TASK_CREATE 0 +#define CALLING_OVERHEAD_TASK_IDENT 0 +#define CALLING_OVERHEAD_TASK_START 0 +#define CALLING_OVERHEAD_TASK_RESTART 0 +#define CALLING_OVERHEAD_TASK_DELETE 0 +#define CALLING_OVERHEAD_TASK_SUSPEND 0 +#define CALLING_OVERHEAD_TASK_RESUME 0 +#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0 +#define CALLING_OVERHEAD_TASK_MODE 0 +#define CALLING_OVERHEAD_TASK_GET_NOTE 0 +#define CALLING_OVERHEAD_TASK_SET_NOTE 0 +#define CALLING_OVERHEAD_TASK_WAKE_WHEN 0 +#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0 +#define CALLING_OVERHEAD_INTERRUPT_CATCH 0 +#define CALLING_OVERHEAD_CLOCK_GET 0 +#define CALLING_OVERHEAD_CLOCK_SET 0 +#define CALLING_OVERHEAD_CLOCK_TICK 0 + +#define CALLING_OVERHEAD_TIMER_CREATE 0 +#define CALLING_OVERHEAD_TIMER_IDENT 0 +#define CALLING_OVERHEAD_TIMER_DELETE 0 +#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 0 +#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 0 +#define CALLING_OVERHEAD_TIMER_RESET 0 +#define CALLING_OVERHEAD_TIMER_CANCEL 0 +#define CALLING_OVERHEAD_SEMAPHORE_CREATE 0 +#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0 +#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0 +#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0 +#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0 + +#define CALLING_OVERHEAD_EVENT_SEND 0 +#define CALLING_OVERHEAD_EVENT_RECEIVE 0 +#define CALLING_OVERHEAD_SIGNAL_CATCH 0 +#define CALLING_OVERHEAD_SIGNAL_SEND 0 +#define CALLING_OVERHEAD_PARTITION_CREATE 0 +#define CALLING_OVERHEAD_PARTITION_IDENT 0 +#define CALLING_OVERHEAD_PARTITION_DELETE 0 +#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0 +#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0 +#define CALLING_OVERHEAD_REGION_CREATE 0 +#define CALLING_OVERHEAD_REGION_IDENT 0 +#define CALLING_OVERHEAD_REGION_DELETE 0 +#define CALLING_OVERHEAD_REGION_GET_SEGMENT 0 +#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0 +#define CALLING_OVERHEAD_PORT_CREATE 0 +#define CALLING_OVERHEAD_PORT_IDENT 0 +#define CALLING_OVERHEAD_PORT_DELETE 0 +#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0 +#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0 + +#define CALLING_OVERHEAD_IO_INITIALIZE 0 +#define CALLING_OVERHEAD_IO_OPEN 0 +#define CALLING_OVERHEAD_IO_CLOSE 0 +#define CALLING_OVERHEAD_IO_READ 0 +#define CALLING_OVERHEAD_IO_WRITE 0 +#define CALLING_OVERHEAD_IO_CONTROL 0 +#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0 +#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0 + +#ifdef __cplusplus +} +#endif + +#endif +/* end of include file */ diff --git a/c/src/lib/libbsp/sh/gensh4/include/sdram.h b/c/src/lib/libbsp/sh/gensh4/include/sdram.h new file mode 100644 index 0000000000..ae9d7f2f99 --- /dev/null +++ b/c/src/lib/libbsp/sh/gensh4/include/sdram.h @@ -0,0 +1,42 @@ +/* + * SDRAM Mode Register + * Based on Fujitsu MB81F643242B data sheet. + * + * Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * @(#) $Id$ + */ + +#ifndef __SDRAM_H__ +#define __SDRAM_H__ + +/* SDRAM Mode Register */ +#define SDRAM_MODE_BL 0x0007 /* Burst Length: */ +#define SDRAM_MODE_BL_1 0x0000 /* 0 */ +#define SDRAM_MODE_BL_2 0x0001 /* 2 */ +#define SDRAM_MODE_BL_4 0x0002 /* 4 */ +#define SDRAM_MODE_BL_8 0x0003 /* 8 */ +#define SDRAM_MODE_BL_16 0x0004 /* 16 */ +#define SDRAM_MODE_BL_32 0x0005 /* 32 */ +#define SDRAM_MODE_BL_64 0x0006 /* 64 */ +#define SDRAM_MODE_BL_FULL 0x0007 /* Full column */ + +#define SDRAM_MODE_BT 0x0008 /* Burst Type: */ +#define SDRAM_MODE_BT_SEQ 0x0000 /* Sequential */ +#define SDRAM_MODE_BT_ILV 0x0008 /* Interleave */ + +#define SDRAM_MODE_CL 0x0070 /* CAS Latency: */ +#define SDRAM_MODE_CL_1 0x0010 /* 1 */ +#define SDRAM_MODE_CL_2 0x0020 /* 2 */ +#define SDRAM_MODE_CL_3 0x0030 /* 3 */ + +#define SDRAM_MODE_OPC 0x0200 /* Opcode: */ +#define SDRAM_MODE_OPC_BRBW 0x0000 /* Burst read & Burst write */ +#define SDRAM_MODE_OPC_BRSW 0x0200 /* Burst read & Single write */ + +#endif |