diff options
Diffstat (limited to 'c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S')
-rw-r--r-- | c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S | 176 |
1 files changed, 98 insertions, 78 deletions
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S index 07aa8d57d0..449fd648a1 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S @@ -9,15 +9,18 @@ * Modified to support the MCP750. * Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr * + * Modifications to store nesting level in global _ISR_Nest_level + * variable instead of SPRG0. Andy Dachs <a.dachs@sstl.co.uk> * * $Id$ */ -#include <asm.h> -#include <rtems/score/cpu.h> #include <bsp/vectors.h> +#include <rtems/score/cpuopts.h> /* for PPC_HAS_FPU */ +#include <rtems/score/cpu.h> +#include <libcpu/cpu.h> #include <libcpu/raw_exception.h> - +#include "asm.h" #define SYNC \ sync; \ @@ -26,6 +29,7 @@ .text .p2align 5 + PUBLIC_VAR(decrementer_exception_vector_prolog_code) SYM (decrementer_exception_vector_prolog_code): @@ -83,7 +87,6 @@ SYM (shared_raw_irq_code_entry): stw r0, SRR0_FRAME_OFFSET(r1) stw r2, SRR1_FRAME_OFFSET(r1) - /* * Enable data and instruction address translation, exception recovery @@ -106,32 +109,32 @@ SYM (shared_raw_irq_code_entry): * functions. Depending on the nesting interrupt level, we will * switch to the right stack later. */ - stw r5, GPR5_OFFSET(r1) - stw r6, GPR6_OFFSET(r1) - stw r7, GPR7_OFFSET(r1) - stw r8, GPR8_OFFSET(r1) - stw r9, GPR9_OFFSET(r1) - stw r10, GPR10_OFFSET(r1) - stw r11, GPR11_OFFSET(r1) - stw r12, GPR12_OFFSET(r1) - stw r13, GPR13_OFFSET(r1) + stw r5, GPR5_OFFSET(r1) + stw r6, GPR6_OFFSET(r1) + stw r7, GPR7_OFFSET(r1) + stw r8, GPR8_OFFSET(r1) + stw r9, GPR9_OFFSET(r1) + stw r10, GPR10_OFFSET(r1) + stw r11, GPR11_OFFSET(r1) + stw r12, GPR12_OFFSET(r1) + stw r13, GPR13_OFFSET(r1) mfcr r5 mfctr r6 mfxer r7 mflr r8 - stw r5, EXC_CR_OFFSET(r1) - stw r6, EXC_CTR_OFFSET(r1) - stw r7, EXC_XER_OFFSET(r1) - stw r8, EXC_LR_OFFSET(r1) + stw r5, EXC_CR_OFFSET(r1) + stw r6, EXC_CTR_OFFSET(r1) + stw r7, EXC_XER_OFFSET(r1) + stw r8, EXC_LR_OFFSET(r1) /* * Add some non volatile registers to store information * that will be used when returning from C handler */ - stw r14, GPR14_OFFSET(r1) - stw r15, GPR15_OFFSET(r1) + stw r14, GPR14_OFFSET(r1) + stw r15, GPR15_OFFSET(r1) /* * save current stack pointer location in R14 */ @@ -139,16 +142,19 @@ SYM (shared_raw_irq_code_entry): /* * store part of _Thread_Dispatch_disable_level address in R15 */ - addis r15,0, _Thread_Dispatch_disable_level@ha + addis r15,0, _Thread_Dispatch_disable_level@ha /* * Get current nesting level in R2 */ - mfspr r2, SPRG0 +/* mfspr r2, SPRG0 */ + addis r6, 0, _ISR_Nest_level@ha + lwz r2, _ISR_Nest_level@l( r6 ) + /* * Check if stack switch is necessary */ cmpwi r2,0 - bne nested + bne nested mfspr r1, SPRG1 nested: @@ -156,21 +162,25 @@ nested: * Start Incrementing nesting level in R2 */ addi r2,r2,1 + + addis r6, 0, _ISR_Nest_level@ha + stw r2, _ISR_Nest_level@l( r6 ) + /* * Start Incrementing _Thread_Dispatch_disable_level R4 = _Thread_Dispatch_disable_level */ - lwz r6,_Thread_Dispatch_disable_level@l(r15) + lwz r6,_Thread_Dispatch_disable_level@l(r15) /* * store new nesting level in SPRG0 */ - mtspr SPRG0, r2 +/* mtspr SPRG0, r2 */ addi r6, r6, 1 mfmsr r5 /* * store new _Thread_Dispatch_disable_level value */ - stw r6, _Thread_Dispatch_disable_level@l(r15) + stw r6, _Thread_Dispatch_disable_level@l(r15) /* * We are now running on the interrupt stack. External and decrementer * exceptions are still disabled. I see no purpose trying to optimize @@ -180,29 +190,38 @@ nested: * Call C exception handler for decrementer Interrupt frame is passed just * in case... */ + addi r3, r14, 0x8 - bl C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */ + bl C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */ + /* * start decrementing nesting level. Note : do not test result against 0 * value as an easy exit condition because if interrupt nesting level > 1 * then _Thread_Dispatch_disable_level > 1 */ - mfspr r2, SPRG0 +/* mfspr r2, SPRG0 */ + + addis r6, 0, _ISR_Nest_level@ha + lwz r2, _ISR_Nest_level@l( r6 ) + /* * start decrementing _Thread_Dispatch_disable_level */ - lwz r3,_Thread_Dispatch_disable_level@l(r15) + lwz r3,_Thread_Dispatch_disable_level@l(r15) addi r2, r2, -1 /* Continue decrementing nesting level */ addi r3, r3, -1 /* Continue decrementing _Thread_Dispatch_disable_level */ - mtspr SPRG0, r2 /* End decrementing nesting level */ - stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */ + + stw r2, _ISR_Nest_level@l( r6 ) +/* mtspr SPRG0, r2 */ /* End decrementing nesting level */ + + stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */ cmpwi r3, 0 /* * switch back to original stack (done here just optimize registers * contention. Could have been done before...) */ addi r1, r14, 0 - bne easy_exit /* if (_Thread_Dispatch_disable_level != 0) goto easy_exit */ + bne easy_exit /* if (_Thread_Dispatch_disable_level != 0) goto easy_exit */ /* * Here we are running again on the thread system stack. * We have interrupt nesting level = _Thread_Dispatch_disable_level = 0. @@ -210,43 +229,44 @@ nested: * do something with the current thread... */ addis r4, 0, _Context_Switch_necessary@ha - lwz r5, _Context_Switch_necessary@l(r4) + lwz r5, _Context_Switch_necessary@l(r4) cmpwi r5, 0 - bne switch + bne switch addis r6, 0, _ISR_Signals_to_thread_executing@ha - lwz r7, _ISR_Signals_to_thread_executing@l(r6) + lwz r7, _ISR_Signals_to_thread_executing@l(r6) cmpwi r7, 0 - li r8, 0 - beq easy_exit - stw r8, _ISR_Signals_to_thread_executing@l(r6) + li r8, 0 + beq easy_exit + stw r8, _ISR_Signals_to_thread_executing@l(r6) /* * going to call _ThreadProcessSignalsFromIrq * Push a complete exception like frame... */ stmw r16, GPR16_OFFSET(r1) addi r3, r1, 0x8 - /* - * compute SP at exception entry - */ - addi r2, r1, EXCEPTION_FRAME_END - /* - * store it at the right place - */ - stw r2, GPR1_OFFSET(r1) + + /* + * compute SP at exception entry + */ + addi r2, r1, EXCEPTION_FRAME_END + /* + * store it at the right place + */ + stw r2, GPR1_OFFSET(r1) /* * Call High Level signal handling code */ - bl _ThreadProcessSignalsFromIrq + bl _ThreadProcessSignalsFromIrq /* * start restoring exception like frame */ - lwz r31, EXC_CTR_OFFSET(r1) - lwz r30, EXC_XER_OFFSET(r1) - lwz r29, EXC_CR_OFFSET(r1) - lwz r28, EXC_LR_OFFSET(r1) + lwz r31, EXC_CTR_OFFSET(r1) + lwz r30, EXC_XER_OFFSET(r1) + lwz r29, EXC_CR_OFFSET(r1) + lwz r28, EXC_LR_OFFSET(r1) mtctr r31 mtxer r30 @@ -254,11 +274,11 @@ nested: mtlr r28 - lmw r4, GPR4_OFFSET(r1) + lmw r4, GPR4_OFFSET(r1) - lwz r2, GPR2_OFFSET(r1) - lwz r0, GPR0_OFFSET(r1) + lwz r2, GPR2_OFFSET(r1) + lwz r0, GPR0_OFFSET(r1) /* * Disable data and instruction translation. Make path non recoverable... @@ -271,44 +291,44 @@ nested: * Restore rfi related settings */ - lwz r3, SRR1_FRAME_OFFSET(r1) + lwz r3, SRR1_FRAME_OFFSET(r1) mtsrr1 r3 - lwz r3, SRR0_FRAME_OFFSET(r1) + lwz r3, SRR0_FRAME_OFFSET(r1) mtsrr0 r3 - lwz r3, GPR3_OFFSET(r1) + lwz r3, GPR3_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC rfi switch: - bl SYM (_Thread_Dispatch) + bl SYM (_Thread_Dispatch) easy_exit: /* * start restoring interrupt frame */ - lwz r3, EXC_CTR_OFFSET(r1) - lwz r4, EXC_XER_OFFSET(r1) - lwz r5, EXC_CR_OFFSET(r1) - lwz r6, EXC_LR_OFFSET(r1) + lwz r3, EXC_CTR_OFFSET(r1) + lwz r4, EXC_XER_OFFSET(r1) + lwz r5, EXC_CR_OFFSET(r1) + lwz r6, EXC_LR_OFFSET(r1) mtctr r3 mtxer r4 mtcr r5 mtlr r6 - lwz r15, GPR15_OFFSET(r1) - lwz r14, GPR14_OFFSET(r1) - lwz r13, GPR13_OFFSET(r1) - lwz r12, GPR12_OFFSET(r1) - lwz r11, GPR11_OFFSET(r1) - lwz r10, GPR10_OFFSET(r1) - lwz r9, GPR9_OFFSET(r1) - lwz r8, GPR8_OFFSET(r1) - lwz r7, GPR7_OFFSET(r1) - lwz r6, GPR6_OFFSET(r1) - lwz r5, GPR5_OFFSET(r1) + lwz r15, GPR15_OFFSET(r1) + lwz r14, GPR14_OFFSET(r1) + lwz r13, GPR13_OFFSET(r1) + lwz r12, GPR12_OFFSET(r1) + lwz r11, GPR11_OFFSET(r1) + lwz r10, GPR10_OFFSET(r1) + lwz r9, GPR9_OFFSET(r1) + lwz r8, GPR8_OFFSET(r1) + lwz r7, GPR7_OFFSET(r1) + lwz r6, GPR6_OFFSET(r1) + lwz r5, GPR5_OFFSET(r1) /* * Disable nested exception processing, data and instruction @@ -323,15 +343,15 @@ easy_exit: * Restore rfi related settings */ - lwz r4, SRR1_FRAME_OFFSET(r1) - lwz r2, SRR0_FRAME_OFFSET(r1) - lwz r3, GPR3_OFFSET(r1) - lwz r0, GPR0_OFFSET(r1) + lwz r4, SRR1_FRAME_OFFSET(r1) + lwz r2, SRR0_FRAME_OFFSET(r1) + lwz r3, GPR3_OFFSET(r1) + lwz r0, GPR0_OFFSET(r1) mtsrr1 r4 mtsrr0 r2 - lwz r4, GPR4_OFFSET(r1) - lwz r2, GPR2_OFFSET(r1) + lwz r4, GPR4_OFFSET(r1) + lwz r2, GPR2_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC rfi |