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Diffstat (limited to 'c/src/lib/libbsp/powerpc/helas403/startup/linkcmds')
-rw-r--r--c/src/lib/libbsp/powerpc/helas403/startup/linkcmds200
1 files changed, 200 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/helas403/startup/linkcmds b/c/src/lib/libbsp/powerpc/helas403/startup/linkcmds
new file mode 100644
index 0000000000..b2feeaacb0
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/helas403/startup/linkcmds
@@ -0,0 +1,200 @@
+/*
+ * This file contains directives for the GNU linker which are specific
+ * to the helas-403
+ * This file is intended to be used together with flashentry.s
+ * it will generate a ROM that can be started directly after powerup reset
+ * $Id$
+ */
+
+OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
+ "elf32-powerpc")
+OUTPUT_ARCH(powerpc)
+ SEARCH_DIR(/usr/local/powerpc-rtems/lib);
+
+ENTRY(flash_entry)
+
+MEMORY
+ {
+ RAM : ORIGIN = 0, LENGTH = 8M
+ FLASH : ORIGIN = 0xFFF00000, LENGTH = 512K
+ }
+
+ /* DIRTY TRICK: repeat addresses here, so we can work with them... */
+ flash.start = 0xFFF00000;
+ flash.size = 512K;
+
+SECTIONS
+{
+ .entry :
+ {
+ *(.entry)
+ } > FLASH /* this is ROM for flash_entry */
+ .text :
+ {
+ text.start = . ;
+ *(.entry2)
+ *(.text)
+ *(.rodata)
+ *(.rodata1)
+ *(.descriptors)
+ *(rom_ver)
+ etext = ALIGN(0x10);
+ _etext = .;
+
+
+ __CTOR_LIST__ = .;
+ LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
+ *(.ctors)
+ LONG(0)
+ __CTOR_END__ = .;
+
+ __DTOR_LIST__ = .;
+ LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
+ *(.dtors)
+ LONG(0)
+ __DTOR_END__ = .;
+
+ *(.lit)
+ *(.shdata)
+ *(.init)
+ *(.fini)
+ . = ALIGN(0x10);
+ _endtext = .;
+ text.end = .;
+ copy.src = .;
+ copy.tmptop.txt = .;
+ } > FLASH /* this is ROM for flash_entry */
+
+ text.size = text.end - text.start;
+
+ /* R/W Data */
+ /* place vectors to start at offset 0x100... */
+ /* IMPORTANT: sections ".fill" and ".vectors" must be the first in RAM!!*/
+ .fill 0x00010000 :
+ {
+ . = . + 0x0100;
+ } > RAM
+
+ .vectors : AT (copy.src)
+ {
+ copy.dest = .;
+ *(.vectors)
+ . = ALIGN(0x10);
+ copy.tmptop.vec = .;
+ } > RAM
+
+ .data : AT (copy.tmptop.vec - copy.dest + copy.src)
+ {
+ *(.data)
+ *(.data1)
+ PROVIDE (__SDATA_START__ = .);
+ *(.sdata)
+ . = ALIGN(0x10);
+ copy.tmptop.dat = .;
+ } > RAM
+
+ PROVIDE (__EXCEPT_START__ = .);
+ .gcc_except_table : AT (copy.tmptop.dat - copy.dest + copy.src)
+ {
+ *(.gcc_except_table)
+ . = ALIGN(0x10);
+ copy.tmptop.exc = .;
+ } >RAM
+ PROVIDE (__EXCEPT_END__ = .);
+
+ __GOT_START__ = .;
+ .got : AT (copy.tmptop.exc - copy.dest + copy.src)
+ {
+ s.got = .;
+ *(.got.plt) *(.got)
+ . = ALIGN(0x10);
+ copy.tmptop.got = .;
+ } > RAM
+ __GOT_END__ = .;
+
+ .got1 : AT (copy.tmptop.got - copy.dest + copy.src)
+ {
+ *(.got1)
+ . = ALIGN(0x10);
+ copy.tmptop.gt1 = .;
+ } >RAM
+
+ PROVIDE (__GOT2_START__ = .);
+ PROVIDE (_GOT2_START_ = .);
+ .got2 : AT (copy.tmptop.gt1 - copy.dest + copy.src)
+ {
+ *(.got2)
+ . = ALIGN(0x10);
+ copy.tmptop.gt2 = .;
+ } >RAM
+ PROVIDE (__GOT2_END__ = .);
+ PROVIDE (_GOT2_END_ = .);
+
+ PROVIDE (__FIXUP_START__ = .);
+ PROVIDE (_FIXUP_START_ = .);
+ .fixup : AT (copy.tmptop.gt2 - copy.dest + copy.src)
+ {
+ *(.fixup)
+ . = ALIGN(0x10);
+ copy.tmptop.fix = .;
+ } >RAM
+ PROVIDE (_FIXUP_END_ = .);
+ PROVIDE (__FIXUP_END__ = .);
+
+ PROVIDE (__SDATA2_START__ = .);
+ .sdata2 : AT (copy.tmptop.fix - copy.dest + copy.src)
+ {
+ *(.sdata2)
+ . = ALIGN(0x10);
+ copy.tmptop.sda = .;
+ } >RAM
+
+ copy.size = copy.tmptop.sda - copy.dest;
+
+ .sbss2 :
+ {
+ *(.sbss2)
+ } >RAM
+ PROVIDE (__SBSS2_END__ = .);
+
+ __SBSS_START__ = .;
+ .bss :
+ {
+ bss.start = .;
+ *(.bss) *(.sbss) *(COMMON)
+ bss.end = ALIGN(4);
+ } > RAM
+ __SBSS_END__ = .;
+
+ bss.size = bss.end - bss.start;
+
+ /* reserve 16KByte for stack... */
+ stack.end = bss.end + 16K;
+ PROVIDE(_end = stack.end);
+
+ .line 0 : { *(.line) }
+ .debug 0 : { *(.debug) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_aregion 0 : { *(.debug_aregion) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+
+ /*
+ * place reset instruction into last word of FLASH
+ * NOTE: after reset, PPC403 starts executing from address
+ * 0xFFFFFFFC
+ * The reset section is placed in ROM at 0xF7FFFFFC instead,
+ * but a mirror of this address exists at 0xFFFFFFFC due to
+ * the initial memory controller setup
+ */
+ .reset flash.start - 4 + flash.size :
+ {
+ *(.reset)
+ } > FLASH
+}
+
+