diff options
Diffstat (limited to 'c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c | 258 |
1 files changed, 178 insertions, 80 deletions
diff --git a/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c b/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c index b9ed2ccc47..d45e6ded12 100644 --- a/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c +++ b/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c @@ -5,13 +5,13 @@ * * CopyRight (C) 1999 valette@crf.canon.fr * - * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com> - * to make it valid for MVME2300 Motorola boards. + * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com> + * to make it valid for MVME2300 Motorola boards. * - * Till Straumann <strauman@slac.stanford.edu>, 12/20/2001: - * Use the new interface to openpic_init + * Till Straumann <strauman@slac.stanford.edu>, 12/20/2001: + * Use the new interface to openpic_init * - * COPYRIGHT (c) 1989-1999. + * COPYRIGHT (c) 1989-2009. * On-Line Applications Research Corporation (OAR). * * The license and distribution terms for this file may be @@ -32,74 +32,91 @@ #include <bsp/motorola.h> #include <rtems/bspIo.h> -/* -#define SHOW_ISA_PCI_BRIDGE_SETTINGS -*/ -#define TRACE_IRQ_INIT +#if 0 +#define TRACE_IRQ_INIT 1 /* XXX */ +#endif -/* - * default on/off function - */ -static void nop_func(void){} -/* - * default isOn function - */ -static int not_connected(void) {return 0;} -/* - * default possible isOn function - */ -static int connected(void) {return 1;} +typedef struct { + unsigned char bus; /* few chance the PCI/ISA bridge is not on first bus but ... */ + unsigned char device; + unsigned char function; +} pci_isa_bridge_device; +pci_isa_bridge_device* via_82c586 = 0; +#if 0 +static pci_isa_bridge_device bridge; +#endif + + + +extern unsigned int external_exception_vector_prolog_code_size[]; +extern void external_exception_vector_prolog_code(); +extern unsigned int decrementer_exception_vector_prolog_code_size[]; +extern void decrementer_exception_vector_prolog_code(); + + +static void IRQ_Default_rtems_irq_hdl( rtems_irq_hdl_param ptr ) { printk("IRQ_Default_rtems_irq_hdl\n"); } +static void IRQ_Default_rtems_irq_enable (const struct __rtems_irq_connect_data__ *ptr) {} +static void IRQ_Default_rtems_irq_disable(const struct __rtems_irq_connect_data__ *ptr) {} +static int IRQ_Default_rtems_irq_is_enabled(const struct __rtems_irq_connect_data__ *ptr){ return 1; } static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER]; static rtems_irq_global_settings initial_config; static rtems_irq_connect_data defaultIrq = { - /* vectorIdex, hdl , handle , on , off , isOn */ - 0, nop_func , NULL , nop_func , nop_func , not_connected +/*name, hdl handle on off isOn */ + 0, IRQ_Default_rtems_irq_hdl, NULL, IRQ_Default_rtems_irq_enable, IRQ_Default_rtems_irq_disable, IRQ_Default_rtems_irq_is_enabled }; + + +/* + * If the BSP_IRQ_NUMBER changes the following if will force the tables to be corrected. + */ +#if ( (BSP_ISA_IRQ_NUMBER == 16) && \ + (BSP_PCI_IRQ_NUMBER == 26) && \ + (BSP_PROCESSOR_IRQ_NUMBER == 1) && \ + (BSP_MISC_IRQ_NUMBER == 8) ) + + static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={ /* - * actual rpiorities for interrupt : - * 0 means that only current interrupt is masked - * 255 means all other interrupts are masked - */ - /* * ISA interrupts. - * The second entry has a priority of 255 because - * it is the slave pic entry and is should always remain - * unmasked. */ - 0,0, - 255, + 0, 0, + (OPENPIC_NUM_PRI-1), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + /* * PCI Interrupts */ - 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, /* for raven prio 0 means unactive... */ + 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, + 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, + /* * Processor exceptions handled as interrupts */ - 0 + 8, + + 8, 8, 8, 8, 8, 8, 8, 8 }; -static unsigned char mcp750_openpic_initpolarities[] = { +static unsigned char mpc8245_openpic_initpolarities[] = { 1, /* 0 8259 cascade */ - 0, /* 1 all the rest of them */ - 0, /* 2 all the rest of them */ - 0, /* 3 all the rest of them */ - 0, /* 4 all the rest of them */ - 0, /* 5 all the rest of them */ - 0, /* 6 all the rest of them */ - 0, /* 7 all the rest of them */ - 0, /* 8 all the rest of them */ - 0, /* 9 all the rest of them */ - 0, /* 10 all the rest of them */ - 0, /* 11 all the rest of them */ - 0, /* 12 all the rest of them */ - 0, /* 13 all the rest of them */ - 0, /* 14 all the rest of them */ - 0, /* 15 all the rest of them */ - 0, /* 16 all the rest of them */ - 0, /* 17 all the rest of them */ + 0, /* 1 */ + 0, /* 2 */ + 0, /* 3 */ + 0, /* 4 */ + 0, /* 5 */ + 0, /* 6 */ + 0, /* 7 */ + 0, /* 8 */ + 0, /* 9 */ + 0, /* 10 */ + 0, /* 11 */ + 0, /* 12 */ + 0, /* 13 */ + 0, /* 14 */ + 0, /* 15 */ + 0, /* 16 */ + 0, /* 17 */ 1, /* 18 all the rest of them */ 1, /* 19 all the rest of them */ 1, /* 20 all the rest of them */ @@ -108,25 +125,78 @@ static unsigned char mcp750_openpic_initpolarities[] = { 1, /* 23 all the rest of them */ 1, /* 24 all the rest of them */ 1, /* 25 all the rest of them */ + 1, /* 26 all the rest of them */ + 1, /* 27 all the rest of them */ + 1, /* 28 all the rest of them */ + 1, /* 29 all the rest of them */ + 1, /* 30 all the rest of them */ + 1, /* 31 all the rest of them */ + 1, /* 32 all the rest of them */ + 1, /* 33 all the rest of them */ + 1, /* 34 all the rest of them */ + 1, /* 35 all the rest of them */ + 1, /* 36 all the rest of them */ + 1, /* 37 all the rest of them */ + 1, /* 38 all the rest of them */ + 1, /* 39 all the rest of them */ + 1, /* 40 all the rest of them */ + 1, /* 41 all the rest of them */ + 1, /* 42 all the rest of them */ + 1, /* 43 all the rest of them */ + 1, /* 44 all the rest of them */ + 1, /* 45 all the rest of them */ + 1, /* 46 all the rest of them */ + 1, /* 47 all the rest of them */ + 1, /* 48 all the rest of them */ + 1, /* 49 all the rest of them */ + 1, /* 50 all the rest of them */ + 1, /* 51 all the rest of them */ + }; -static unsigned char mcp750_openpic_initsenses[] = { - 1, /* 0 MCP750_INT_PCB(8259) */ - 0, /* 1 MCP750_INT_FALCON_ECC_ERR */ - 1, /* 2 MCP750_INT_PCI_ETHERNET */ - 1, /* 3 MCP750_INT_PCI_PMC */ - 1, /* 4 MCP750_INT_PCI_WATCHDOG_TIMER1 */ - 1, /* 5 MCP750_INT_PCI_PRST_SIGNAL */ - 1, /* 6 MCP750_INT_PCI_FALL_SIGNAL */ - 1, /* 7 MCP750_INT_PCI_DEG_SIGNAL */ - 1, /* 8 MCP750_INT_PCI_BUS1_INTA */ - 1, /* 9 MCP750_INT_PCI_BUS1_INTB */ - 1, /*10 MCP750_INT_PCI_BUS1_INTC */ - 1, /*11 MCP750_INT_PCI_BUS1_INTD */ - 1, /*12 MCP750_INT_PCI_BUS2_INTA */ - 1, /*13 MCP750_INT_PCI_BUS2_INTB */ - 1, /*14 MCP750_INT_PCI_BUS2_INTC */ - 1, /*15 MCP750_INT_PCI_BUS2_INTD */ +static unsigned char mpc8245_openpic_initsenses[] = { + 1, /* 0 */ + 0, /* 1 */ + 1, /* 2 */ + 1, /* 3 */ + 1, /* 4 */ + 1, /* 5 */ + 1, /* 6 */ + 1, /* 7 */ + 1, /* 8 */ + 1, /* 9 */ + 1, /*10 */ + 1, /*11 */ + 1, /*12 */ + 1, /*13 */ + 1, /*14 */ + 1, /*15 */ + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, 1, 1, 1, @@ -138,6 +208,7 @@ static unsigned char mcp750_openpic_initsenses[] = { 1, 1 }; +#endif /* * This code assumes the exceptions management setup has already @@ -147,24 +218,41 @@ static unsigned char mcp750_openpic_initsenses[] = { */ void BSP_rtems_irq_mng_init(unsigned cpuId) { - int i; + int i; /* * First initialize the Interrupt management hardware */ #ifdef TRACE_IRQ_INIT - printk("Going to initialize openpic compliant device\n"); -#endif + uint32_t msr; + + _CPU_MSR_GET( msr ); + printk("BSP_rtems_irq_mng_init: Initialize openpic compliant device with MSR %x \n", msr); + printk(" BSP_ISA_IRQ_NUMBER %d\n",BSP_ISA_IRQ_NUMBER ); + printk(" BSP_ISA_IRQ_LOWEST_OFFSET %d\n",BSP_ISA_IRQ_LOWEST_OFFSET ); + printk(" BSP_ISA_IRQ_MAX_OFFSET %d\n", BSP_ISA_IRQ_MAX_OFFSET); + printk(" BSP_PCI_IRQ_NUMBER %d\n",BSP_PCI_IRQ_NUMBER ); + printk(" BSP_PCI_IRQ_LOWEST_OFFSET %d\n",BSP_PCI_IRQ_LOWEST_OFFSET ); + printk(" BSP_PCI_IRQ_MAX_OFFSET %d\n",BSP_PCI_IRQ_MAX_OFFSET ); + printk(" BSP_PROCESSOR_IRQ_NUMBER %d\n",BSP_PROCESSOR_IRQ_NUMBER ); + printk(" BSP_PROCESSOR_IRQ_LOWEST_OFFSET %d\n",BSP_PROCESSOR_IRQ_LOWEST_OFFSET ); + printk(" BSP_PROCESSOR_IRQ_MAX_OFFSET %d\n", BSP_PROCESSOR_IRQ_MAX_OFFSET); + printk(" BSP_MISC_IRQ_NUMBER %d\n", BSP_MISC_IRQ_NUMBER); + printk(" BSP_MISC_IRQ_LOWEST_OFFSET %d\n", BSP_MISC_IRQ_LOWEST_OFFSET); + printk(" BSP_MISC_IRQ_MAX_OFFSET %d\n",BSP_MISC_IRQ_MAX_OFFSET ); + printk(" BSP_IRQ_NUMBER %d\n",BSP_IRQ_NUMBER ); + printk(" BSP_LOWEST_OFFSET %d\n",BSP_LOWEST_OFFSET ); + printk(" BSP_MAX_OFFSET %d\n",BSP_MAX_OFFSET ); +#endif + /* FIXME (t.s.): we should probably setup the EOI delay by * passing a non-zero 'epic_freq' argument (frequency of the * EPIC serial interface) but I don't know the value on this * board (8245 SDRAM freq, IIRC)... + * + * When tested this appears to work correctly. */ - openpic_init(1, mcp750_openpic_initpolarities, mcp750_openpic_initsenses, 0, 16, 0 /* epic_freq */); - -#ifdef TRACE_IRQ_INIT - printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n"); -#endif + openpic_init(1, mpc8245_openpic_initpolarities, mpc8245_openpic_initsenses, 0, 0, 0); /* * Initialize Rtems management interrupt table @@ -175,7 +263,11 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) for (i = 0; i < BSP_IRQ_NUMBER; i++) { rtemsIrq[i] = defaultIrq; rtemsIrq[i].name = i; +#ifdef BSP_SHARED_HANDLER_SUPPORT + rtemsIrq[i].next_handler = NULL; +#endif } + /* * Init initial Interrupt management config */ @@ -185,14 +277,20 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) initial_config.irqBase = BSP_LOWEST_OFFSET; initial_config.irqPrioTbl = irqPrioTable; -printk("Call BSP_rtems_irq_mngt_set\n"); + +#ifdef TRACE_IRQ_INIT + _CPU_MSR_GET( msr ); + printk("BSP_rtems_irq_mng_init: Set initial configuration with MSR %x\n", msr); +#endif if (!BSP_rtems_irq_mngt_set(&initial_config)) { /* * put something here that will show the failure... */ BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); + } else { + printk(" Initialized RTEMS Interrupt Manager\n"); } - + #ifdef TRACE_IRQ_INIT printk("RTEMS IRQ management is now operationnal\n"); #endif |