diff options
Diffstat (limited to 'c/src/lib/libbsp/mips/genmongoosev/start')
| -rw-r--r-- | c/src/lib/libbsp/mips/genmongoosev/start/mg5.h | 24 | ||||
| -rw-r--r-- | c/src/lib/libbsp/mips/genmongoosev/start/start.S | 49 |
2 files changed, 0 insertions, 73 deletions
diff --git a/c/src/lib/libbsp/mips/genmongoosev/start/mg5.h b/c/src/lib/libbsp/mips/genmongoosev/start/mg5.h index 12776c8fc3..8d54133d64 100644 --- a/c/src/lib/libbsp/mips/genmongoosev/start/mg5.h +++ b/c/src/lib/libbsp/mips/genmongoosev/start/mg5.h @@ -9,8 +9,6 @@ */ #define PMON_ADDRESS 0xbfc00000 - - /* ** Mongoose V Peripheral Function Registers */ @@ -65,7 +63,6 @@ #define MG5_MAVN_RANGE_4_REG 0xfffe01d0 /* Range 4 */ #define MG5_MAVN_RANGE_5_REG 0xfffe01d4 /* Range 5 */ - /* ** Uart Specific Peripheral Function Registers */ @@ -76,7 +73,6 @@ #define MG5_UART_1_TX_REG 0xfffe01f8 #define MG5_UART_1_BAUD_REG 0xfffe01fc - /* ** Section 2: Bit definitions ** @@ -106,7 +102,6 @@ #define UART_CTSN_TEST_BIT 0x00000004 #define UART_RESET_BIT 0x00000002 - /* ** Interrupt Status/Cause/Mask register bits - from 31 to 0 */ @@ -138,7 +133,6 @@ #define EXTERN_INT_1_BIT 0x00000002 #define EXTERN_INT_0_BIT 0x00000001 - /* ** MAVN Range Bits */ @@ -152,7 +146,6 @@ #define MAVN_GLOBAL_WRITE_BIT 0x00000200 - #define MAVN_RANGE_0_READ_BIT 0x00000400 #define MAVN_RANGE_1_READ_BIT 0x00000800 #define MAVN_RANGE_2_READ_BIT 0x00001000 @@ -239,11 +232,6 @@ #define MAVN_START_ADDR_MASK 0xFFFFFE00 #define MAVN_PS_CODE_MASK 0x0000001F - - - - - /* lr33000.h - defines for LSI Logic LR33000 */ /* Define counter/timer register addresses */ @@ -268,11 +256,6 @@ /* lr33000.h */ - - - - - #define _LR33300_ #define M_SRAM 0xfffe0100 /* SRAM config reg */ @@ -340,12 +323,6 @@ /* _LR33300_ */ - - - - - - #define _ERNIE_CORE_ #define M_BIU 0xfffe0130 @@ -396,7 +373,6 @@ /* _ERNIE_CORE_ */ - /* Definitions for cache sizes */ #define LR33300_IC_SIZE 0x1000 /* 33300 Inst cache = 4Kbytes */ diff --git a/c/src/lib/libbsp/mips/genmongoosev/start/start.S b/c/src/lib/libbsp/mips/genmongoosev/start/start.S index 5c997d7449..3861510259 100644 --- a/c/src/lib/libbsp/mips/genmongoosev/start/start.S +++ b/c/src/lib/libbsp/mips/genmongoosev/start/start.S @@ -37,19 +37,15 @@ #define LANGUAGE_ASSEMBLY #endif - #include <rtems/asm.h> #include "regs.S" #include "mg5.h" - - #ifdef __mips16 /* This file contains 32 bit assembly code. */ .set nomips16 #endif - /* ** defined by linkcmds, pointing to the start of the relocation target ** memory, referenced in this way so we can avoid defining it @@ -60,7 +56,6 @@ .text .align 2 - /********************************************************************** ** ** Function: _start @@ -100,7 +95,6 @@ _branch: mtc0 t0, C0_CAUSE nop - /* ** Call cpuinit. Masking used to call EEPROM address of _cpuinit. Label is RAM label. */ @@ -123,8 +117,6 @@ _branch: jal t0 nop - - /* ** Print 'b'. Show that we started. */ @@ -137,10 +129,6 @@ _branch: jal t0 nop - - - - li k0,0 li k1,0 @@ -157,8 +145,6 @@ _branch: srl t0,31 /* shift high bit down to bit 0 */ bnez t0,1f /* booting from above kseg1 */ - - /* ** Call IcacheFlush. Masking used to call EEPROM address of IcacheFlush. Label is RAM label. */ @@ -171,7 +157,6 @@ _branch: jal t0 nop - /* ** Print 'I'. Show that we flushed I cache. */ @@ -184,7 +169,6 @@ _branch: jal t0 nop - /* ** Call DcacheFlush. Masking used to call EEPROM address of DcacheFlush. Label is RAM label. */ @@ -196,7 +180,6 @@ _branch: jal t0 nop - /* ** Print 'D'. Show that we flushed D cache. */ @@ -210,7 +193,6 @@ _branch: jal t0 nop - 1: /* ** Print ' RTEMS b'. Show that we are booting. @@ -287,7 +269,6 @@ _branch: jal t0 nop - /* ** get the address of the _branch label above as it would appear in ** the relocated code @@ -335,7 +316,6 @@ relocate: nop .end _start - /********************************************************************** ** ** Function: _start_in_ram @@ -355,7 +335,6 @@ _start_in_ram: la gp, _gp /* set the global data pointer */ .end _start_in_ram - /********************************************************************** ** ** Function: zerobss @@ -405,7 +384,6 @@ zerobss: .end zerobss - /********************************************************************** ** ** Function: _init @@ -422,7 +400,6 @@ _initialize_rtems: jal putch_rom nop - /* ** Save the boot-time addresses of the I & D cache flush routines. ** Note, if we're running from RAM, we cannot manipulate the cache @@ -447,7 +424,6 @@ _initialize_rtems: nop .end _initialize_rtems - /********************************************************************** ** ** Function: _sys_exit @@ -461,8 +437,6 @@ _sys_exit: jal t0 .end _sys_exit - - /********************************************************************** ** ** function: putch @@ -506,7 +480,6 @@ putch_rom: j ra .end putch_rom - /********************************************************************** ** ** function: config_uart @@ -543,7 +516,6 @@ config_uart: j ra .end config_uart - /************************************************************* * CpuInit: * Perform CPU-specific initialization @@ -670,7 +642,6 @@ _cpuinit: li t0, 0x0 sw t0,M_SPEC2 - /* ** SPEC3 Setup ** SPEC3 will be used for the SONIC ethernet controller. @@ -797,14 +768,6 @@ _cpuinit: j ra .end _cpuinit - - - - - - - - /********************************************************************** ** ** Keep the boot-time address of the I & D cache reset code for @@ -816,8 +779,6 @@ _cpuinit: _promIcache: .word 0 _promDcache: .word 0 - - .globl promCopyIcacheFlush .ent promCopyIcacheFlush .set noreorder @@ -837,8 +798,6 @@ promCopyIcacheFlush: .set reorder .end promCopyIcacheFlush - - .globl promCopyDcacheFlush .ent promCopyDcacheFlush .set noreorder @@ -858,10 +817,6 @@ promCopyDcacheFlush: .set reorder .end promCopyDcacheFlush - - - - /******************************************************************************* ** Function Name: IcacheFlush ** Description: This functions flushes the on chip icache. @@ -900,7 +855,6 @@ icache_write: bltu t8, t9, icache_write /* check to see if we are done */ nop - /* ** De-isolate I cache */ @@ -912,13 +866,11 @@ icache_write: .set reorder .end IcacheFlush - /******************************************************** ** Function Name: DcacheFlush ** Description: This functions flushes the on chip dcache. */ - .ent DcacheFlush .set noreorder DcacheFlush: @@ -955,5 +907,4 @@ dcache_write: .set reorder .end DcacheFlush - /* EOF start.S */ |