3 files changed, 45 insertions, 1 deletions

diff --git a/c/src/lib/libbsp/m68k/gen68360/README b/c/src/lib/libbsp/m68k/gen68360/README
index 3902ff7d2e..802e518e70 100644
--- a/c/src/lib/libbsp/m68k/gen68360/README
+++ b/c/src/lib/libbsp/m68k/gen68360/README
@@ -299,3 +299,17 @@ The board support package has been tested with:
 		Arnewsh Inc.
 		P.O. Box 270352
 		Fort Collins, CO 80527-0352
+
+Interrupt Notes
+===============
+ckinit.c:
+        Occasional network lockups have been noted when the PIT has a higher
+interrupt request level than the CPM.  The SCC1 bit in the CISR is set
+even though the SCC1 interrupt handler is not active.  This blocks
+interrupts from SCC1 (and all other CPM sources) and locks up the
+system.  It has not been determined whether the error is within the
+68360 or in the RTEMS interrupt support assembler code.  The solution,
+for now, is to set both PIT and CPM interrupt request levels to the same
+value (4).
+
+
diff --git a/c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c b/c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c
index b7d2b296ae..8fd64ff918 100644
--- a/c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c
@@ -35,7 +35,7 @@
 #include "m68360.h"
 
 #define CLOCK_VECTOR	120
-#define CLOCK_IRQ_LEVEL	6
+#define CLOCK_IRQ_LEVEL	4
 
 /*
  * Clock_driver_ticks is a monotonically increasing counter of the
diff --git a/c/src/lib/libbsp/m68k/gen68360/network/network.c b/c/src/lib/libbsp/m68k/gen68360/network/network.c
index db0340cc58..7dc4f4a73f 100644
--- a/c/src/lib/libbsp/m68k/gen68360/network/network.c
+++ b/c/src/lib/libbsp/m68k/gen68360/network/network.c
@@ -364,6 +364,8 @@ m360Enet_retire_tx_bd (struct scc_softc *sc)
 			if (status & (M360_BD_LATE_COLLISION |
 					M360_BD_RETRY_LIMIT |
 					M360_BD_UNDERRUN)) {
+				int j;
+
 				if (status & M360_BD_LATE_COLLISION)
 					scc_softc[0].txLateCollision++;
 				if (status & M360_BD_RETRY_LIMIT)
@@ -372,9 +374,37 @@ m360Enet_retire_tx_bd (struct scc_softc *sc)
 					scc_softc[0].txUnderrun++;
 
 				/*
+				 * Reenable buffer descriptors
+				 */
+				j = sc->txBdTail;
+				for (;;) {
+					status = (sc->txBdBase + j)->status;
+					if (status & M360_BD_READY)
+						break;
+					(sc->txBdBase + j)->status = M360_BD_READY | 
+						(status & (M360_BD_PAD | 
+							   M360_BD_WRAP | 
+							   M360_BD_INTERRUPT | 
+							   M360_BD_LAST |
+							   M360_BD_TX_CRC));
+					if (status & M360_BD_LAST)
+						break;
+					if (++j == sc->txBdCount)
+						j = 0;
+				}
+
+				/*
+				 * Move transmitter back to the first
+				 * buffer descriptor in the frame.
+				 */
+				m360.scc1p._tbptr = m360.scc1p.tbase + 
+					sc->txBdTail * sizeof (m360BufferDescriptor_t);
+
+				/*
 				 * Restart the transmitter
 				 */
 				M360ExecuteRISC (M360_CR_OP_RESTART_TX | M360_CR_CHAN_SCC1);
+				continue;
 			}
 			if (status & M360_BD_DEFER)
 				scc_softc[0].txDeferred++;