diff options
Diffstat (limited to 'c/src/lib/libbsp/m68k/av5282/startup/init5282.c')
| -rw-r--r-- | c/src/lib/libbsp/m68k/av5282/startup/init5282.c | 76 |
1 files changed, 37 insertions, 39 deletions
diff --git a/c/src/lib/libbsp/m68k/av5282/startup/init5282.c b/c/src/lib/libbsp/m68k/av5282/startup/init5282.c index 2898295bfb..df5eedb2fd 100644 --- a/c/src/lib/libbsp/m68k/av5282/startup/init5282.c +++ b/c/src/lib/libbsp/m68k/av5282/startup/init5282.c @@ -7,12 +7,15 @@ * work has been done by the bootstrap dBUG code. */ -#include <rtems.h> #include <bsp.h> -#define m68k_set_cacr(_cacr) __asm__ volatile ("movec %0,%%cacr" : : "d" (_cacr)) -#define m68k_set_acr0(_acr0) __asm__ volatile ("movec %0,%%acr0" : : "d" (_acr0)) -#define m68k_set_acr1(_acr1) __asm__ volatile ("movec %0,%%acr1" : : "d" (_acr1)) -#define MM_SDRAM_BASE (0x00000000) + +#define m68k_set_cacr(_cacr) \ + __asm__ volatile ("movec %0,%%cacr" : : "d" (_cacr)) +#define m68k_set_acr0(_acr0) \ + __asm__ volatile ("movec %0,%%acr0" : : "d" (_acr0)) +#define m68k_set_acr1(_acr1) \ + __asm__ volatile ("movec %0,%%acr1" : : "d" (_acr1)) +#define MM_SDRAM_BASE (0x00000000) /* * External methods used by this file @@ -41,49 +44,44 @@ void Init5282 (void) MCF5282_CS0_CSMR = 0x007f0001; MCF5282_CS0_CSCR =(((0xf)&0x0F)<<10)|(1<<8)|(0x80); - /*Setup the SDRAM */ - for(x=0; x<20000; x++) - { - temp +=1; - } - MCF5282_SDRAMC_DCR = 0x00000239; - MCF5282_SDRAMC_DACR0 = 0x00001320; - MCF5282_SDRAMC_DMR0 = (0x00FC0000) | (0x00000001); - for(x=0; x<20000; x++) - { - temp +=1; - } - /* set ip ( bit 3 ) in dacr */ - MCF5282_SDRAMC_DACR0 |= (0x00000008) ; - /* init precharge */ - *((short *)MM_SDRAM_BASE) = 0; - /* set RE in dacr */ - MCF5282_SDRAMC_DACR0 |= (0x00008000); - /* wait */ - for(x=0; x<20000; x++) - { - temp +=1; - } - /* issue IMRS */ - MCF5282_SDRAMC_DACR0 |= (0x00000040); - *((short *)MM_SDRAM_BASE) = 0x0000; - for(x=0; x<60000; x++) - { - temp +=1; - } - *((unsigned long*)MM_SDRAM_BASE)=0x12345678; + /*Setup the SDRAM */ + for(x=0; x<20000; x++) { + temp +=1; + } + MCF5282_SDRAMC_DCR = 0x00000239; + MCF5282_SDRAMC_DACR0 = 0x00001320; + MCF5282_SDRAMC_DMR0 = (0x00FC0000) | (0x00000001); + for(x=0; x<20000; x++) { + temp +=1; + } + /* set ip ( bit 3 ) in dacr */ + MCF5282_SDRAMC_DACR0 |= (0x00000008) ; + /* init precharge */ + *((short *)MM_SDRAM_BASE) = 0; + /* set RE in dacr */ + MCF5282_SDRAMC_DACR0 |= (0x00008000); + /* wait */ + for(x=0; x<20000; x++) { + temp +=1; + } + /* issue IMRS */ + MCF5282_SDRAMC_DACR0 |= (0x00000040); + *((short *)MM_SDRAM_BASE) = 0x0000; + for(x=0; x<60000; x++) { + temp +=1; + } + *((unsigned long*)MM_SDRAM_BASE)=0x12345678; /* Copy the interrupt vector table to address 0x0 in SDRAM */ { uint32_t *inttab = (uint32_t *)&INTERRUPT_VECTOR; uint32_t *intvec = (uint32_t *)0x0; register int i; - for (i = 0; i < 256; i++) - { + for (i = 0; i < 256; i++) { *(intvec++) = *(inttab++); } } - /* + /* * Copy data, clear BSS and call boot_card() */ CopyDataClearBSSAndStart (); |