summaryrefslogtreecommitdiffstats
path: root/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S
diff options
context:
space:
mode:
Diffstat (limited to 'c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S')
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S67
1 files changed, 67 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S
new file mode 100644
index 0000000000..7436c3d8fe
--- /dev/null
+++ b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S
@@ -0,0 +1,67 @@
+/* bsp_irq_asm.S
+ *
+ * This file contains the implementation of the IRQ handler
+ * for a specific BSP
+ *
+ * CopyRight (C) 2000 Canon Research France SA.
+ * Emmanuel Raguet, mailto:raguet@crf.canon.fr
+ *
+ * The license and distribution terms for this file may be
+ * found in found in the file LICENSE in this distribution or at
+ * http://www.OARcorp.com/rtems/license.html.
+ *
+ */
+
+#define __asm__
+#include <registers.h>
+
+/*
+ * Function to obtain, execute an IT handler and acknowledge the IT
+ */
+
+ .globl ExecuteITHandler
+
+ExecuteITHandler :
+ ldr r0, =INTPHAI3 /* read the vector number */
+ ldr r0, [r0]
+ ldr r0, [r0] /* extract the IT handler @ */
+
+ /*
+ * re-enable interrupts at processor level as the current
+ * interrupt source is now masked via VEGA logic
+ */
+ mrs r1, cpsr
+ and r1, r1, #0xFFFFFF3F
+ msr cpsr, r1
+
+ stmdb sp!,{lr}
+ ldr lr, =IRQ_return /* prepare the return from handler */
+ mov pc, r0 /* EXECUTE INT HANDLER */
+
+IRQ_return:
+ ldmia sp!,{lr}
+ ldr r2, =INTSTAT3 /* Ack the interrupt */
+ ldr r2, [r2]
+ ldr r1, =INTACK3
+ str r2, [r1]
+ /*
+ * disable interrupts_again and switch back to SVC mode
+ */
+ mrs r0, cpsr
+ orr r0, r0, #0xc3
+ msr cpsr, r0
+
+ b ReturnFromHandler /* return to ISR handler */
+
+/*
+ * Function to acknowledge the IT controller
+ */
+ .globl AckControler
+
+AckControler:
+ ldr r0, =INTEOI3
+ mov r1, #EOI
+ str r1, [r0]
+
+ b ReturnFromAck /* return to ISR handler */
+