diff options
Diffstat (limited to 'c/src/lib/libbsp/arm/tms570/startup')
4 files changed, 45 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/arm/tms570/startup/bspstart.c b/c/src/lib/libbsp/arm/tms570/startup/bspstart.c index 31ad1e7cc7..b7e2b62591 100644 --- a/c/src/lib/libbsp/arm/tms570/startup/bspstart.c +++ b/c/src/lib/libbsp/arm/tms570/startup/bspstart.c @@ -27,13 +27,49 @@ #include <bsp/irq-generic.h> #include <bsp/start.h> #include <bsp/bootcard.h> +#include <bsp/linker-symbols.h> +#include <rtems/endian.h> void bsp_start( void ) { - /* set the cpu mode to supervisor and big endian */ - arm_cpu_mode = 0x213; + #if BYTE_ORDER == BIG_ENDIAN + /* + * If CPU is big endian (TMS570 family variant) + * set the CPU mode to supervisor and big endian. + * Do not set mode if CPU is little endian + * (RM48 family variant) for which default mode 0x13 + * defined in cpukit/score/cpu/arm/cpu.c + * is right. + */ + arm_cpu_mode = 0x213; + #endif - tms570_pom_remap(); + tms570_initialize_and_clear(); + + /* + * If RTEMS image does not start at address 0x00000000 + * then first level exception table at memory begin has + * to be replaced to point to RTEMS handlers addresses. + * + * There is no VBAR or other option because Cortex-R + * does provides only fixed address 0x00000000 for exceptions + * (0xFFFF0000-0xFFFF001C alternative SCTLR.V = 1 cannot + * be used because target area corersponds to PMM peripheral + * registers on TMS570). + * + * Alternative is to use jumps over SRAM based trampolines + * but that is not compatible with + * Check TCRAM1 ECC error detection logic + * which intentionally introduces data abort during startup + * to check SRAM and if exception processing goes through + * SRAM then it leads to CPU error halt. + * + * So use of POM to replace jumps to vectors target + * addresses seems to be the best option. + */ + if ( (uintptr_t)bsp_start_vector_table_begin != 0 ) { + tms570_pom_remap(); + } /* Interrupts */ bsp_interrupt_initialize(); diff --git a/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk b/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk index 0cdc783019..a32562fc6b 100644 --- a/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk +++ b/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk @@ -27,4 +27,6 @@ REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_INT); bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 1024; bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align); +bsp_int_vec_overlay_start = ORIGIN(RAM_INT_VEC); + INCLUDE linkcmds.armv4 diff --git a/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk_intram b/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk_intram index c33dd6cdda..7cb683de3d 100644 --- a/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk_intram +++ b/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk_intram @@ -27,4 +27,6 @@ REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_INT); bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 1024; bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align); +bsp_int_vec_overlay_start = ORIGIN(RAM_INT_VEC); + INCLUDE linkcmds.armv4 diff --git a/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk_sdram b/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk_sdram index 17039f1604..0117410467 100644 --- a/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk_sdram +++ b/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk_sdram @@ -27,4 +27,6 @@ REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_EXT); bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 1024; bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align); +bsp_int_vec_overlay_start = ORIGIN(RAM_INT_VEC); + INCLUDE linkcmds.armv4 |