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Diffstat (limited to 'c/src/lib/libbsp/arm/stm32f4/include/rcc.h')
-rw-r--r--c/src/lib/libbsp/arm/stm32f4/include/rcc.h64
1 files changed, 62 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/arm/stm32f4/include/rcc.h b/c/src/lib/libbsp/arm/stm32f4/include/rcc.h
index 7d49527b83..c105470acd 100644
--- a/c/src/lib/libbsp/arm/stm32f4/include/rcc.h
+++ b/c/src/lib/libbsp/arm/stm32f4/include/rcc.h
@@ -16,8 +16,7 @@
#define LIBBSP_ARM_STM32F4_RCC_H
#include <stdbool.h>
-
-#include <bsp/stm32f4.h>
+#include <bspopts.h>
#ifdef __cplusplus
extern "C" {
@@ -26,6 +25,7 @@ extern "C" {
#define STM32F4_RCC_INDEX(reg, idx) (((reg) << 5) | (idx))
typedef enum {
+#ifdef STM32F4_FAMILY_F4XXXX
STM32F4_RCC_OTGHS = STM32F4_RCC_INDEX(0, 29),
STM32F4_RCC_ETHMAC = STM32F4_RCC_INDEX(0, 25),
STM32F4_RCC_DMA2 = STM32F4_RCC_INDEX(0, 22),
@@ -86,6 +86,64 @@ typedef enum {
STM32F4_RCC_USART1 = STM32F4_RCC_INDEX(5, 4),
STM32F4_RCC_TIM8 = STM32F4_RCC_INDEX(5, 1),
STM32F4_RCC_TIM1 = STM32F4_RCC_INDEX(5, 0),
+#endif /* STM32F4_FAMILY_F4XXXX */
+#ifdef STM32F4_FAMILY_F10XXX
+ STM32F4_RCC_DMA1 = STM32F4_RCC_INDEX(0, 0),
+ STM32F4_RCC_DMA2 = STM32F4_RCC_INDEX(0, 1),
+ STM32F4_RCC_SRAM = STM32F4_RCC_INDEX(0, 2),
+ STM32F4_RCC_FLITF = STM32F4_RCC_INDEX(0, 4),
+ STM32F4_RCC_CRCEN = STM32F4_RCC_INDEX(0, 6),
+ STM32F4_RCC_FSMC = STM32F4_RCC_INDEX(0, 8),
+ STM32F4_RCC_SDIO = STM32F4_RCC_INDEX(0, 10),
+ STM32F4_RCC_OTGFS = STM32F4_RCC_INDEX(0, 12),
+ STM32F4_RCC_ETHMAC = STM32F4_RCC_INDEX(0, 14),
+ STM32F4_RCC_ETHMACTX = STM32F4_RCC_INDEX(0, 15),
+ STM32F4_RCC_ETHMACRX = STM32F4_RCC_INDEX(0, 16),
+
+ STM32F4_RCC_AFIO = STM32F4_RCC_INDEX(1, 0),
+ STM32F4_RCC_GPIOA = STM32F4_RCC_INDEX(1, 2),
+ STM32F4_RCC_GPIOB = STM32F4_RCC_INDEX(1, 3),
+ STM32F4_RCC_GPIOC = STM32F4_RCC_INDEX(1, 4),
+ STM32F4_RCC_GPIOD = STM32F4_RCC_INDEX(1, 5),
+ STM32F4_RCC_GPIOE = STM32F4_RCC_INDEX(1, 6),
+ STM32F4_RCC_GPIOF = STM32F4_RCC_INDEX(1, 7),
+ STM32F4_RCC_GPIOG = STM32F4_RCC_INDEX(1, 8),
+ STM32F4_RCC_ADC1 = STM32F4_RCC_INDEX(1, 9),
+ STM32F4_RCC_ADC2 = STM32F4_RCC_INDEX(1, 10),
+ STM32F4_RCC_TIM1 = STM32F4_RCC_INDEX(1, 11),
+ STM32F4_RCC_SPI1 = STM32F4_RCC_INDEX(1, 12),
+ STM32F4_RCC_TIM8 = STM32F4_RCC_INDEX(1, 13),
+ STM32F4_RCC_USART1 = STM32F4_RCC_INDEX(1, 14),
+ STM32F4_RCC_ADC3 = STM32F4_RCC_INDEX(1, 15),
+ STM32F4_RCC_TIM9 = STM32F4_RCC_INDEX(1, 19),
+ STM32F4_RCC_TIM10 = STM32F4_RCC_INDEX(1, 20),
+ STM32F4_RCC_TIM11 = STM32F4_RCC_INDEX(1, 21),
+
+ STM32F4_RCC_TIM2 = STM32F4_RCC_INDEX(2, 0),
+ STM32F4_RCC_TIM3 = STM32F4_RCC_INDEX(2, 1),
+ STM32F4_RCC_TIM4 = STM32F4_RCC_INDEX(2, 2),
+ STM32F4_RCC_TIM5 = STM32F4_RCC_INDEX(2, 3),
+ STM32F4_RCC_TIM6 = STM32F4_RCC_INDEX(2, 4),
+ STM32F4_RCC_TIM7 = STM32F4_RCC_INDEX(2, 5),
+ STM32F4_RCC_TIM12 = STM32F4_RCC_INDEX(2, 6),
+ STM32F4_RCC_TIM13 = STM32F4_RCC_INDEX(2, 7),
+ STM32F4_RCC_TIM14 = STM32F4_RCC_INDEX(2, 8),
+ STM32F4_RCC_WWDG = STM32F4_RCC_INDEX(2, 11),
+ STM32F4_RCC_SPI2 = STM32F4_RCC_INDEX(2, 14),
+ STM32F4_RCC_SPI3 = STM32F4_RCC_INDEX(2, 15),
+ STM32F4_RCC_USART2 = STM32F4_RCC_INDEX(2, 17),
+ STM32F4_RCC_USART3 = STM32F4_RCC_INDEX(2, 18),
+ STM32F4_RCC_UART4 = STM32F4_RCC_INDEX(2, 19),
+ STM32F4_RCC_UART5 = STM32F4_RCC_INDEX(2, 20),
+ STM32F4_RCC_I2C1 = STM32F4_RCC_INDEX(2, 21),
+ STM32F4_RCC_I2C2 = STM32F4_RCC_INDEX(2, 22),
+ STM32F4_RCC_USB = STM32F4_RCC_INDEX(2, 23),
+ STM32F4_RCC_CAN1 = STM32F4_RCC_INDEX(2, 24),
+ STM32F4_RCC_CAN2 = STM32F4_RCC_INDEX(2, 25),
+ STM32F4_RCC_BKP = STM32F4_RCC_INDEX(2, 27),
+ STM32F4_RCC_PWR = STM32F4_RCC_INDEX(2, 28),
+ STM32F4_RCC_DAC = STM32F4_RCC_INDEX(2, 29),
+#endif /* STM32F4_FAMILY_F10XXX */
} stm32f4_rcc_index;
void stm32f4_rcc_reset(stm32f4_rcc_index index);
@@ -94,7 +152,9 @@ void stm32f4_rcc_set_reset(stm32f4_rcc_index index, bool set);
void stm32f4_rcc_set_clock(stm32f4_rcc_index index, bool set);
+#ifdef STM32F4_FAMILY_F4XXXX
void stm32f4_rcc_set_low_power_clock(stm32f4_rcc_index index, bool set);
+#endif /* STM32F4_FAMILY_F4XXXX */
#ifdef __cplusplus
}