diff options
Diffstat (limited to 'c/src/lib/libbsp/arm/raspberrypi/include')
-rw-r--r-- | c/src/lib/libbsp/arm/raspberrypi/include/bsp.h | 38 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/raspberrypi/include/irq.h | 62 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/raspberrypi/include/mmu.h | 68 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h | 194 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/raspberrypi/include/usart.h | 26 |
5 files changed, 388 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/bsp.h b/c/src/lib/libbsp/arm/raspberrypi/include/bsp.h new file mode 100644 index 0000000000..cb34bd3331 --- /dev/null +++ b/c/src/lib/libbsp/arm/raspberrypi/include/bsp.h @@ -0,0 +1,38 @@ +/** + * @file + * + * @ingroup raspberrypi + * + * @brief Global BSP definitions. + */ + +/* + * Copyright (c) 2013 Alan Cudmore + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.rtems.com/license/LICENSE + * + */ + +#ifndef LIBBSP_ARM_RASPBERRYPI_BSP_H +#define LIBBSP_ARM_RASPBERRYPI_BSP_H + +#include <bspopts.h> +#include <rtems.h> +#include <rtems/console.h> +#include <rtems/clockdrv.h> +#include <bsp/raspberrypi.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define BSP_FEATURE_IRQ_EXTENSION + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* LIBBSP_ARM_RASPBERRYPI_BSP_H */ diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/irq.h b/c/src/lib/libbsp/arm/raspberrypi/include/irq.h new file mode 100644 index 0000000000..0e3769c07f --- /dev/null +++ b/c/src/lib/libbsp/arm/raspberrypi/include/irq.h @@ -0,0 +1,62 @@ +/** + * @file + * + * @ingroup bsp_interrupt + * + * @brief Interrupt definitions. + */ + +/* + * Copyright (c) 2013 Alan Cudmore + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.rtems.com/license/LICENSE + * + */ + +#ifndef LIBBSP_ARM_RASBPERRYPI_IRQ_H +#define LIBBSP_ARM_RASPBERRYPI_IRQ_H + +#ifndef ASM + +#include <rtems.h> +#include <rtems/irq.h> +#include <rtems/irq-extension.h> + +#define BCM2835_INTC_TOTAL_IRQ 64 + 8 + + +#define BCM2835_IRQ_ID_AUX 29 +#define BCM2835_IRQ_ID_SPI_SLAVE 43 +#define BCM2835_IRQ_ID_PWA0 45 +#define BCM2835_IRQ_ID_PWA1 46 +#define BCM2835_IRQ_ID_SMI 48 +#define BCM2835_IRQ_ID_GPIO_0 49 +#define BCM2835_IRQ_ID_GPIO_1 50 +#define BCM2835_IRQ_ID_GPIO_2 51 +#define BCM2835_IRQ_ID_GPIO_3 52 +#define BCM2835_IRQ_ID_I2C 53 +#define BCM2835_IRQ_ID_SPI 54 +#define BCM2835_IRQ_ID_PCM 55 +#define BCM2835_IRQ_ID_UART 57 + + +#define BCM2835_IRQ_ID_TIMER_0 64 +#define BCM2835_IRQ_ID_MAILBOX_0 65 +#define BCM2835_IRQ_ID_DOORBELL_0 66 +#define BCM2835_IRQ_ID_DOORBELL_1 67 +#define BCM2835_IRQ_ID_GPU0_HALTED 68 + +#define BSP_INTERRUPT_VECTOR_MIN (0) +#define BSP_INTERRUPT_VECTOR_MAX (BCM2835_INTC_TOTAL_IRQ - 1) + +#define BSP_IRQ_COUNT (BCM2835_INTC_TOTAL_IRQ) + + +void raspberrypi_set_exception_handler(Arm_symbolic_exception_name exception, + void (*handler)(void)); + +#endif /* ASM */ +#endif /* LIBBSP_ARM_RASPBERRYPI_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/mmu.h b/c/src/lib/libbsp/arm/raspberrypi/include/mmu.h new file mode 100644 index 0000000000..50e9180dcc --- /dev/null +++ b/c/src/lib/libbsp/arm/raspberrypi/include/mmu.h @@ -0,0 +1,68 @@ +/** + * @file + * + * @ingroup rapberrypi_mmu + * + * @brief MMU API. + */ + +/* + * Copyright (c) 2013 Alan Cudmore. + * based on work by: + * Copyright (c) 2009 + * embedded brains GmbH + * Obere Lagerstr. 30 + * D-82178 Puchheim + * Germany + * <rtems@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.rtems.com/license/LICENSE + * + */ + +#ifndef LIBBSP_ARM_RASPBERRYPI_MMU_H +#define LIBBSP_ARM_RASPBERRYPI_MMU_H + +#include <libcpu/arm-cp15.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +/** + * @defgroup raspberrypi_mmu MMU Support + * + * @ingroup raspberrypi + * + * @brief MMU support. + * + * @{ + */ + +#define RASPBERRYPI_MMU_CLIENT_DOMAIN 15U + +#define RASPBERRYPI_MMU_READ_ONLY \ + ((RASPBERRYPI_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \ + | ARM_MMU_SECT_DEFAULT) + +#define RASPBERRYPI_MMU_READ_ONLY_CACHED \ + (RASPBERRYPI_MMU_READ_ONLY | ARM_MMU_SECT_C | ARM_MMU_SECT_B) + +#define RASPBERRYPI_MMU_READ_WRITE \ + ((RASPBERRYPI_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \ + | ARM_MMU_SECT_AP_0 \ + | ARM_MMU_SECT_DEFAULT) + +#define RASPBERRYPI_MMU_READ_WRITE_CACHED \ + (RASPBERRYPI_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B) + +/** @} */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* LIBBSP_ARM_RASPBERRYPI_MMU_H */ diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h b/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h new file mode 100644 index 0000000000..44a105ad4b --- /dev/null +++ b/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h @@ -0,0 +1,194 @@ + +/* + * raspberrypi.h + * + * Copyright (c) 2013 Alan Cudmore. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.rtems.com/license/LICENSE + * + */ + +#ifndef LIBBSP_ARM_RASPBERRYPI_RASPBERRYPI_H +#define LIBBSP_ARM_RASPBERRYPI_RASPBERRYPI_H + +#include <stdint.h> +#include <bsp/utility.h> + +/** + * @defgroup raspberrypi_reg Register Definitions + * + * @ingroup raspberrypi + * + * @brief Register definitions. + * + * @{ + */ + +/** + * @name Register Macros + * + * @{ + */ + +#define BCM2835_REG(x) (*(volatile uint32_t *)(x)) +#define BCM2835_BIT(n) (1 << (n)) + +/** @} */ + +/** + * @name Internal ARM Timer Registers + * + * @{ + */ + +#define BCM2835_CLOCK_FREQ 250000000 + +#define BCM2835_TIMER_BASE (0x2000B400) + +#define BCM2835_TIMER_LOD (BCM2835_TIMER_BASE+0x00) +#define BCM2835_TIMER_VAL (BCM2835_TIMER_BASE+0x04) +#define BCM2835_TIMER_CTL (BCM2835_TIMER_BASE+0x08) +#define BCM2835_TIMER_CLI (BCM2835_TIMER_BASE+0x0C) +#define BCM2835_TIMER_RIS (BCM2835_TIMER_BASE+0x10) +#define BCM2835_TIMER_MIS (BCM2835_TIMER_BASE+0x14) +#define BCM2835_TIMER_RLD (BCM2835_TIMER_BASE+0x18) +#define BCM2835_TIMER_DIV (BCM2835_TIMER_BASE+0x1C) +#define BCM2835_TIMER_CNT (BCM2835_TIMER_BASE+0x20) + +#define BCM2835_TIMER_PRESCALE 0xF9 + +/** @} */ + +/** + * @name GPIO Registers + * + * @{ + */ + +#define BCM2835_GPIO_REGS_BASE (0x20200000) + +#define BCM2835_GPIO_GPFSEL1 (BCM2835_GPIO_REGS_BASE+0x04) +#define BCM2835_GPIO_GPSET0 (BCM2835_GPIO_REGS_BASE+0x1C) +#define BCM2835_GPIO_GPCLR0 (BCM2835_GPIO_REGS_BASE+0x28) +#define BCM2835_GPIO_GPPUD (BCM2835_GPIO_REGS_BASE+0x94) +#define BCM2835_GPIO_GPPUDCLK0 (BCM2835_GPIO_REGS_BASE+0x98) + +/** @} */ + +/** + * @name AUX Registers + * + * @{ + */ + +#define BCM2835_AUX_BASE (0x20215000) + +#define AUX_ENABLES (BCM2835_AUX_BASE+0x04) +#define AUX_MU_IO_REG (BCM2835_AUX_BASE+0x40) +#define AUX_MU_IER_REG (BCM2835_AUX_BASE+0x44) +#define AUX_MU_IIR_REG (BCM2835_AUX_BASE+0x48) +#define AUX_MU_LCR_REG (BCM2835_AUX_BASE+0x4C) +#define AUX_MU_MCR_REG (BCM2835_AUX_BASE+0x50) +#define AUX_MU_LSR_REG (BCM2835_AUX_BASE+0x54) +#define AUX_MU_MSR_REG (BCM2835_AUX_BASE+0x58) +#define AUX_MU_SCRATCH (BCM2835_AUX_BASE+0x5C) +#define AUX_MU_CNTL_REG (BCM2835_AUX_BASE+0x60) +#define AUX_MU_STAT_REG (BCM2835_AUX_BASE+0x64) +#define AUX_MU_BAUD_REG (BCM2835_AUX_BASE+0x68) + +/** @} */ + + +/** + * @name UART 0 (PL011) Registers + * + * @{ + */ + + +#define BCM2835_UART0_BASE (0x20201000) + +#define BCM2835_UART0_DR (BCM2835_UART0_BASE+0x00) +#define BCM2835_UART0_RSRECR (BCM2835_UART0_BASE+0x04) +#define BCM2835_UART0_FR (BCM2835_UART0_BASE+0x18) +#define BCM2835_UART0_ILPR (BCM2835_UART0_BASE+0x20) +#define BCM2835_UART0_IBRD (BCM2835_UART0_BASE+0x24) +#define BCM2835_UART0_FBRD (BCM2835_UART0_BASE+0x28) +#define BCM2835_UART0_LCRH (BCM2835_UART0_BASE+0x2C) +#define BCM2835_UART0_CR (BCM2835_UART0_BASE+0x30) +#define BCM2835_UART0_IFLS (BCM2835_UART0_BASE+0x34) +#define BCM2835_UART0_IMSC (BCM2835_UART0_BASE+0x38) +#define BCM2835_UART0_RIS (BCM2835_UART0_BASE+0x3C) +#define BCM2835_UART0_MIS (BCM2835_UART0_BASE+0x40) +#define BCM2835_UART0_ICR (BCM2835_UART0_BASE+0x44) +#define BCM2835_UART0_DMACR (BCM2835_UART0_BASE+0x48) +#define BCM2835_UART0_ITCR (BCM2835_UART0_BASE+0x80) +#define BCM2835_UART0_ITIP (BCM2835_UART0_BASE+0x84) +#define BCM2835_UART0_ITOP (BCM2835_UART0_BASE+0x88) +#define BCM2835_UART0_TDR (BCM2835_UART0_BASE+0x8C) + +#define BCM2835_UART0_MIS_RX 0x10 +#define BCM2835_UART0_MIS_TX 0x20 +#define BCM2835_UART0_IMSC_RX 0x10 +#define BCM2835_UART0_IMSC_TX 0x20 +#define BCM2835_UART0_FR_RXFE 0x10 +#define BCM2835_UART0_FR_TXFF 0x20 +#define BCM2835_UART0_ICR_RX 0x10 +#define BCM2835_UART0_ICR_TX 0x20 + + +/** @} */ + + +/** + * @name IRQ Registers + * + * @{ + */ + +#define BCM2835_BASE_INTC (0x2000B200) + +#define BCM2835_IRQ_BASIC (BCM2835_BASE_INTC + 0x00) +#define BCM2835_IRQ_PENDING1 (BCM2835_BASE_INTC + 0x04) +#define BCM2835_IRQ_PENDING2 (BCM2835_BASE_INTC + 0x08) +#define BCM2835_IRQ_FIQ_CTRL (BCM2835_BASE_INTC + 0x0C) +#define BCM2835_IRQ_ENABLE1 (BCM2835_BASE_INTC + 0x10) +#define BCM2835_IRQ_ENABLE2 (BCM2835_BASE_INTC + 0x14) +#define BCM2835_IRQ_ENABLE_BASIC (BCM2835_BASE_INTC + 0x18) +#define BCM2835_IRQ_DISABLE1 (BCM2835_BASE_INTC + 0x1C) +#define BCM2835_IRQ_DISABLE2 (BCM2835_BASE_INTC + 0x20) +#define BCM2835_IRQ_DISABLE_BASIC (BCM2835_BASE_INTC + 0x24) + +/** @} */ + + +/** + * @name GPU Timer Registers + * + * @{ + */ + +/** + * NOTE: The GPU uses Compare registers 0 and 2 for + * it's own RTOS. 1 and 3 are available for use in + * RTEMS. + */ +#define BCM2835_GPU_TIMER_BASE (0x20003000) + +#define BCM2835_GPU_TIMER_CS (BCM2835_TIMER_BASE+0x00) +#define BCM2835_GPU_TIMER_CLO (BCM2835_TIMER_BASE+0x04) +#define BCM2835_GPU_TIMER_CHI (BCM2835_TIMER_BASE+0x08) +#define BCM2835_GPU_TIMER_C0 (BCM2835_TIMER_BASE+0x0C) +#define BCM2835_GPU_TIMER_C1 (BCM2835_TIMER_BASE+0x10) +#define BCM2835_GPU_TIMER_C2 (BCM2835_TIMER_BASE+0x14) +#define BCM2835_GPU_TIMER_C3 (BCM2835_TIMER_BASE+0x18) + +/** @} */ + + +/** @} */ + +#endif /* LIBBSP_ARM_RASPBERRYPI_RASPBERRYPI_H */ diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/usart.h b/c/src/lib/libbsp/arm/raspberrypi/include/usart.h new file mode 100644 index 0000000000..26b44161da --- /dev/null +++ b/c/src/lib/libbsp/arm/raspberrypi/include/usart.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2013 Alan Cudmore. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE + */ + +#ifndef LIBBSP_ARM_RASPBERRYPI_USART_H +#define LIBBSP_ARM_RASPBERRYPI_USART_H + +#include <libchip/serial.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define USART0_DEFAULT_BAUD 115000 + +extern const console_fns bcm2835_usart_fns; + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* LIBBSP_ARM_RASPBERRYPI_USART_H */ |