diff options
Diffstat (limited to 'c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h')
| -rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h | 101 |
1 files changed, 99 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h b/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h index bb52e40164..0c90c4355b 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h +++ b/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h @@ -1,7 +1,7 @@ /** * @file * - * @ingroup lpc32xx + * @ingroup lpc32xx_reg * * @brief Register base addresses. */ @@ -22,6 +22,22 @@ #ifndef LIBBSP_ARM_LPC32XX_LPC32XX_H #define LIBBSP_ARM_LPC32XX_LPC32XX_H +/** + * @defgroup lpc32xx_reg Register Definitions + * + * @ingroup lpc32xx + * + * @brief Register definitions. + * + * @{ + */ + +/** + * @name Register Base Addresses + * + * @{ + */ + #define LPC32XX_BASE_ADC 0x40048000 #define LPC32XX_BASE_SYSCON 0x40004000 #define LPC32XX_BASE_DEBUG_CTRL 0x40040000 @@ -81,6 +97,14 @@ #define LPC32XX_BASE_USB_OTG_I2C 0x31020300 #define LPC32XX_BASE_WDT 0x4003c000 +/** @} */ + +/** + * @name Miscanellanous Registers + * + * @{ + */ + #define LPC32XX_U3CLK (*(volatile uint32_t *) 0x400040d0) #define LPC32XX_U4CLK (*(volatile uint32_t *) 0x400040d4) #define LPC32XX_U5CLK (*(volatile uint32_t *) 0x400040d8) @@ -91,7 +115,6 @@ #define LPC32XX_UART_LOOP (*(volatile uint32_t *) 0x40054008) #define LPC32XX_SW_INT (*(volatile uint32_t *) 0x400040a8) #define LPC32XX_MAC_CLK_CTRL (*(volatile uint32_t *) 0x40004090) -#define LPC32XX_USB_CTRL (*(volatile uint32_t *) 0x40004064) #define LPC32XX_USB_DIV (*(volatile uint32_t *) 0x4000401c) #define LPC32XX_OTG_CLK_CTRL (*(volatile uint32_t *) 0x31020ff4) #define LPC32XX_OTG_CLK_STAT (*(volatile uint32_t *) 0x31020ff8) @@ -102,5 +125,79 @@ #define LPC32XX_I2C_CTL (*(volatile uint32_t *) 0x31020308) #define LPC32XX_I2C_CLKHI (*(volatile uint32_t *) 0x3102030c) #define LPC32XX_I2C_CLKLO (*(volatile uint32_t *) 0x31020310) +#define LPC32XX_PWR_CTRL (*(volatile uint32_t *) 0x40004044) +#define LPC32XX_OSC_CTRL (*(volatile uint32_t *) 0x4000404c) +#define LPC32XX_SYSCLK_CTRL (*(volatile uint32_t *) 0x40004050) +#define LPC32XX_PLL397_CTRL (*(volatile uint32_t *) 0x40004048) +#define LPC32XX_HCLKPLL_CTRL (*(volatile uint32_t *) 0x40004058) +#define LPC32XX_HCLKDIV_CTRL (*(volatile uint32_t *) 0x40004040) +#define LPC32XX_TEST_CLK (*(volatile uint32_t *) 0x400040a4) +#define LPC32XX_AUTOCLK_CTRL (*(volatile uint32_t *) 0x400040ec) +#define LPC32XX_START_ER_PIN (*(volatile uint32_t *) 0x40004030) +#define LPC32XX_START_ER_INT (*(volatile uint32_t *) 0x40004020) +#define LPC32XX_P0_INTR_ER (*(volatile uint32_t *) 0x40004018) +#define LPC32XX_START_SR_PIN (*(volatile uint32_t *) 0x40004038) +#define LPC32XX_START_SR_INT (*(volatile uint32_t *) 0x40004028) +#define LPC32XX_START_RSR_PIN (*(volatile uint32_t *) 0x40004034) +#define LPC32XX_START_RSR_INT (*(volatile uint32_t *) 0x40004024) +#define LPC32XX_START_APR_PIN (*(volatile uint32_t *) 0x4000403c) +#define LPC32XX_START_APR_INT (*(volatile uint32_t *) 0x4000402c) +#define LPC32XX_USB_CTRL (*(volatile uint32_t *) 0x40004064) +#define LPC32XX_USBDIV_CTRL (*(volatile uint32_t *) 0x4000401c) +#define LPC32XX_MS_CTRL (*(volatile uint32_t *) 0x40004080) +#define LPC32XX_DMACLK_CTRL (*(volatile uint32_t *) 0x400040e8) +#define LPC32XX_FLASHCLK_CTRL (*(volatile uint32_t *) 0x400040c8) +#define LPC32XX_MACCLK_CTRL (*(volatile uint32_t *) 0x40004090) +#define LPC32XX_LCDCLK_CTRL (*(volatile uint32_t *) 0x40004054) +#define LPC32XX_I2S_CTRL (*(volatile uint32_t *) 0x4000407c) +#define LPC32XX_SSP_CTRL (*(volatile uint32_t *) 0x40004078) +#define LPC32XX_SPI_CTRL (*(volatile uint32_t *) 0x400040c4) +#define LPC32XX_I2CCLK_CTRL (*(volatile uint32_t *) 0x400040ac) +#define LPC32XX_TIMCLK_CTRL1 (*(volatile uint32_t *) 0x400040c0) +#define LPC32XX_TIMCLK_CTRL (*(volatile uint32_t *) 0x400040bc) +#define LPC32XX_ADCLK_CTRL (*(volatile uint32_t *) 0x400040b4) +#define LPC32XX_ADCLK_CTRL1 (*(volatile uint32_t *) 0x40004060) +#define LPC32XX_KEYCLK_CTRL (*(volatile uint32_t *) 0x400040b0) +#define LPC32XX_PWMCLK_CTRL (*(volatile uint32_t *) 0x400040b8) +#define LPC32XX_UARTCLK_CTRL (*(volatile uint32_t *) 0x400040e4) +#define LPC32XX_POS0_IRAM_CTRl (*(volatile uint32_t *) 0x40004110) +#define LPC32XX_POS1_IRAM_CTRl (*(volatile uint32_t *) 0x40004114) + +/** @} */ + +/** + * @name GPIO Registers + * + * @{ + */ + +#define LPC32XX_P0_INP_STATE (*(volatile uint32_t *) 0x40028040) +#define LPC32XX_P0_OUTP_SET (*(volatile uint32_t *) 0x40028044) +#define LPC32XX_P0_OUTP_CLR (*(volatile uint32_t *) 0x40028048) +#define LPC32XX_P0_DIR_SET (*(volatile uint32_t *) 0x40028050) +#define LPC32XX_P0_DIR_CLR (*(volatile uint32_t *) 0x40028054) +#define LPC32XX_P0_DIR_STATE (*(volatile uint32_t *) 0x40028058) +#define LPC32XX_P0_OUTP_STATE (*(volatile uint32_t *) 0x4002804c) +#define LPC32XX_P1_INP_STATE (*(volatile uint32_t *) 0x40028060) +#define LPC32XX_P1_OUTP_SET (*(volatile uint32_t *) 0x40028064) +#define LPC32XX_P1_OUTP_CLR (*(volatile uint32_t *) 0x40028068) +#define LPC32XX_P1_DIR_SET (*(volatile uint32_t *) 0x40028070) +#define LPC32XX_P1_DIR_CLR (*(volatile uint32_t *) 0x40028074) +#define LPC32XX_P1_DIR_STATE (*(volatile uint32_t *) 0x40028078) +#define LPC32XX_P1_OUTP_STATE (*(volatile uint32_t *) 0x4002806c) +#define LPC32XX_P2_INP_STATE (*(volatile uint32_t *) 0x4002801c) +#define LPC32XX_P2_OUTP_SET (*(volatile uint32_t *) 0x40028020) +#define LPC32XX_P2_OUTP_CLR (*(volatile uint32_t *) 0x40028024) +#define LPC32XX_P2_DIR_SET (*(volatile uint32_t *) 0x40028010) +#define LPC32XX_P2_DIR_CLR (*(volatile uint32_t *) 0x40028014) +#define LPC32XX_P2_DIR_STATE (*(volatile uint32_t *) 0x40028018) +#define LPC32XX_P3_INP_STATE (*(volatile uint32_t *) 0x40028000) +#define LPC32XX_P3_OUTP_SET (*(volatile uint32_t *) 0x40028004) +#define LPC32XX_P3_OUTP_CLR (*(volatile uint32_t *) 0x40028008) +#define LPC32XX_P3_OUTP_STATE (*(volatile uint32_t *) 0x4002800c) + +/** @} */ + +/** @} */ #endif /* LIBBSP_ARM_LPC32XX_LPC32XX_H */ |