diff options
Diffstat (limited to '')
-rw-r--r-- | c/src/exec/score/cpu/unix/.cvsignore | 15 | ||||
-rw-r--r-- | c/src/exec/score/cpu/unix/ChangeLog | 134 | ||||
-rw-r--r-- | c/src/exec/score/cpu/unix/Makefile.am | 50 | ||||
-rw-r--r-- | c/src/exec/score/cpu/unix/configure.ac | 50 | ||||
-rw-r--r-- | c/src/exec/score/cpu/unix/cpu.c | 1137 | ||||
-rw-r--r-- | c/src/exec/score/cpu/unix/rtems/.cvsignore | 2 | ||||
-rw-r--r-- | c/src/exec/score/cpu/unix/rtems/score/.cvsignore | 4 | ||||
-rw-r--r-- | c/src/exec/score/cpu/unix/rtems/score/cpu.h | 1120 | ||||
-rw-r--r-- | c/src/exec/score/cpu/unix/rtems/score/types.h | 71 | ||||
-rw-r--r-- | c/src/exec/score/cpu/unix/rtems/score/unix.h | 72 |
10 files changed, 0 insertions, 2655 deletions
diff --git a/c/src/exec/score/cpu/unix/.cvsignore b/c/src/exec/score/cpu/unix/.cvsignore deleted file mode 100644 index 62edb16be0..0000000000 --- a/c/src/exec/score/cpu/unix/.cvsignore +++ /dev/null @@ -1,15 +0,0 @@ -Makefile -Makefile.in -aclocal.m4 -autom4te.cache -config.cache -config.guess -config.log -config.status -config.sub -configure -depcomp -install-sh -missing -mkinstalldirs -stamp-h.in diff --git a/c/src/exec/score/cpu/unix/ChangeLog b/c/src/exec/score/cpu/unix/ChangeLog deleted file mode 100644 index da6fb7c730..0000000000 --- a/c/src/exec/score/cpu/unix/ChangeLog +++ /dev/null @@ -1,134 +0,0 @@ -2002-07-05 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * configure.ac: RTEMS_TOP(../../../..). - -2002-07-01 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * configure.ac: Remove RTEMS_PROJECT_ROOT. - -2002-06-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..). - Add AC_PROG_RANLIB. - -2002-06-26 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * configure.ac: Remove references to RTEMS_BSP. - -2002-06-17 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * Makefile.am: Include $(top_srcdir)/../../../automake/*.am. - Use ../../../aclocal. - -2001-04-03 Joel Sherrill <joel@OARcorp.com> - - * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h. - * rtems/score/unixtypes.h: Removed. - * rtems/score/types.h: New file via CVS magic. - * Makefile.am, rtems/score/cpu.h: Account for name change. - -2001-03-28 Joel Sherrill <joel@OARcorp.com> - - * cpu.c: Define fix_syscall_errno() to nothing so MP links. - -2002-03-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * configure.ac: - AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS). - AM_INIT_AUTOMAKE([no-define foreign 1.6]). - * Makefile.am: Remove AUTOMAKE_OPTIONS. - -2002-02-13 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * configure.ac: Fix the test to determine cpu context size. - -2001-02-05 Joel Sherrill <joel@OARcorp.com> - - * .cvsignore: Added stamp-h.in. - -2002-01-23 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * Makefile.am: Merge in rtems/Makefile.am and - rtems/score/Makefile.am. Remove gensize. Require automake-1.5. - * rtems/Makefile.am: Removed. - * rtems/score/Makefile.am: Removed. - * rtems/score/.cvsignore: Add unixsize.h*. Add stamp-h*. - * configure.ac: Add AM_CONFIG_HEADER(rtems/score/unixsize.h). - * rtems/score/cpu.h: Replace CPU_CONTEXT_SIZE_IN_BYTES with - SIZEOF_CPU_CONTEXT. - -2001-12-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * Makefile.am: Add multilib support. - -2001-11-28 Joel Sherrill <joel@OARcorp.com>, - - This was tracked as PR91. - * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which - is used to specify if the port uses the standard macro for this (FALSE). - A TRUE setting indicates the port provides its own implementation. - -2001-11-28 Joel Sherrill <joel@OARcorp.com>, - - This was tracked as PR91. - * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which - is used to specify if the port uses the standard macro for this (FALSE). - A TRUE setting indicates the port provides its own implementation. - -2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * .cvsignore: Add autom4te.cache for autoconf > 2.52. - * configure.in: Remove. - * configure.ac: New file, generated from configure.in by autoupdate. - -2001-09-23 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='. - -2001-05-07 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * rtems/score/cpu.h: Remove #undef __STRICT_ANSI__. - -2001-02-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * Makefile.am, rtems/score/Makefile.am: - Apply include_*HEADERS instead of H_FILES. - -2001-01-25 Joel Sherrill <joel@OARcorp.com> - - * cpu.c, rtems/score/cpu.h: Bug report from Peter Mueller - <peter.o.mueller@gmx.de> because of not correcting for the ISR - vector table now being allocated from the workspace. - -2001-01-03 Joel Sherrill <joel@OARcorp.com> - - * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). - -2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS. - -2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal. - -2000-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros. - Switch to GNU canonicalization. - -2000-09-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * Makefile.am: Use += to set up AM_CPPFLAGS. - -2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * rtems/score/Makefile.am: Use PROJECT_TOPdir in path to gensize. - -2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> - - * Makefile.am: Include compile.am. - -2000-08-10 Joel Sherrill <joel@OARcorp.com> - - * ChangeLog: New file. diff --git a/c/src/exec/score/cpu/unix/Makefile.am b/c/src/exec/score/cpu/unix/Makefile.am deleted file mode 100644 index 3d100423aa..0000000000 --- a/c/src/exec/score/cpu/unix/Makefile.am +++ /dev/null @@ -1,50 +0,0 @@ -## -## $Id$ -## - -ACLOCAL_AMFLAGS = -I ../../../aclocal - -include $(top_srcdir)/../../../automake/multilib.am -include $(top_srcdir)/../../../automake/compile.am -include $(top_srcdir)/../../../automake/lib.am - -AM_CPPFLAGS += -DCPU_SYNC_IO $(LIBC_DEFINES) - -$(PROJECT_INCLUDE)/%.h: %.h - $(INSTALL_DATA) $< $@ - -$(PROJECT_INCLUDE): - $(mkinstalldirs) $@ - -$(PROJECT_INCLUDE)/rtems: - $(mkinstalldirs) $@ - -$(PROJECT_INCLUDE)/rtems/score: - $(mkinstalldirs) $@ - -include_rtems_scoredir = $(includedir)/rtems/score -include_rtems_score_HEADERS = \ - rtems/score/types.h \ - rtems/score/cpu.h \ - rtems/score/unix.h \ - rtems/score/unixsize.h -PREINSTALL_FILES = $(PROJECT_INCLUDE)/rtems/score \ - $(include_rtems_score_HEADERS:%.h=$(PROJECT_INCLUDE)/%.h) - -C_FILES = cpu.c -C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o) - -REL = $(ARCH)/rtems-cpu.rel - -rtems_cpu_rel_OBJECTS = $(C_O_FILES) - -$(REL): $(rtems_cpu_rel_OBJECTS) - $(make-rel) - -all-local: $(ARCH) $(rtems_cpu_rel_OBJECTS) $(REL) - -.PRECIOUS: $(REL) - -EXTRA_DIST = cpu.c - -include $(top_srcdir)/../../../automake/local.am diff --git a/c/src/exec/score/cpu/unix/configure.ac b/c/src/exec/score/cpu/unix/configure.ac deleted file mode 100644 index c9be4b92ed..0000000000 --- a/c/src/exec/score/cpu/unix/configure.ac +++ /dev/null @@ -1,50 +0,0 @@ -## Process this file with autoconf to produce a configure script. -## -## $Id$ - -AC_PREREQ(2.52) -AC_INIT([rtems-c-src-exec-score-cpu-unix],[_RTEMS_VERSION],[rtems-bugs@OARcorp.com]) -AC_CONFIG_SRCDIR([cpu.c]) -RTEMS_TOP(../../../..) -AC_CONFIG_AUX_DIR(../../../..) - -RTEMS_CANONICAL_TARGET_CPU - -AM_INIT_AUTOMAKE([no-define foreign 1.6]) -AM_MAINTAINER_MODE - -RTEMS_ENV_RTEMSCPU - -RTEMS_CHECK_CPU -RTEMS_CANONICAL_HOST - -RTEMS_PROG_CC_FOR_TARGET -RTEMS_CANONICALIZE_TOOLS -AC_PROG_RANLIB - -RTEMS_CHECK_NEWLIB -RTEMS_CHECK_MULTIPROCESSING - -# The only use of System V IPC is the UNIX port when multiprocessing. -AS_IF([test "$HAS_MP" = "yes"], - [RTEMS_CHECK_SYSV_UNIX]) - -## The code fragment below had been used in tools/cpu/unix/gensize.c. -## FIXME: -## * The pad very likely is not necessary. -AC_CHECK_SIZEOF([CPU_CONTEXT],[],[ -#include <stdio.h> -#include <setjmp.h> - -typedef struct { - jmp_buf regs; - int isr_level; - int pad[4]; /* just in case */ -} CPU_CONTEXT; -]) - -AM_CONFIG_HEADER(rtems/score/unixsize.h) - -# Explicitly list all Makefiles here -AC_CONFIG_FILES([Makefile]) -AC_OUTPUT diff --git a/c/src/exec/score/cpu/unix/cpu.c b/c/src/exec/score/cpu/unix/cpu.c deleted file mode 100644 index dc1b4a9e52..0000000000 --- a/c/src/exec/score/cpu/unix/cpu.c +++ /dev/null @@ -1,1137 +0,0 @@ -/* - * UNIX Simulator Dependent Source - * - * COPYRIGHT (c) 1994,95 by Division Incorporated - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - */ - -#include <rtems/system.h> -#include <rtems/score/isr.h> -#include <rtems/score/interr.h> - -#if defined(__linux__) -#define _XOPEN_SOURCE -#define MALLOC_0_RETURNS_NULL -#endif - -#include <sys/types.h> -#include <sys/times.h> -#include <stdio.h> -#include <stdlib.h> -#include <setjmp.h> -#include <signal.h> -#include <time.h> -#include <sys/time.h> -#include <errno.h> -#include <unistd.h> -#if defined(RTEMS_MULTIPROCESSING) -#include <sys/ipc.h> -#include <sys/shm.h> -#include <sys/sem.h> -#endif -#include <string.h> /* memset */ - -#ifndef SA_RESTART -#define SA_RESTART 0 -#endif - -typedef struct { - jmp_buf regs; - int isr_level; -} Context_Control_overlay; - -void _CPU_Signal_initialize(void); -void _CPU_Stray_signal(int); -void _CPU_ISR_Handler(int); - -static sigset_t _CPU_Signal_mask; -static Context_Control_overlay _CPU_Context_Default_with_ISRs_enabled; -static Context_Control_overlay _CPU_Context_Default_with_ISRs_disabled; - -/* - * Sync IO support, an entry for each fd that can be set - */ - -void _CPU_Sync_io_Init(); - -static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE]; -static int sync_io_nfds; -static fd_set sync_io_readfds; -static fd_set sync_io_writefds; -static fd_set sync_io_exceptfds; - -/* - * Which cpu are we? Used by libcpu and libbsp. - */ - -int cpu_number; - -/*PAGE - * - * _CPU_Initialize_vectors() - * - * Support routine to initialize the RTEMS vector table after it is allocated. - * - * UNIX Specific Information: - * - * Complete initialization since the table is now allocated. - */ - -sigset_t posix_empty_mask; - -void _CPU_Initialize_vectors(void) -{ - unsigned32 i; - proc_ptr old_handler; - - /* - * Generate an empty mask to be used by disable_support - */ - - sigemptyset(&posix_empty_mask); - - /* - * Block all the signals except SIGTRAP for the debugger - * and fatal error signals. - */ - - (void) sigfillset(&_CPU_Signal_mask); - (void) sigdelset(&_CPU_Signal_mask, SIGTRAP); - (void) sigdelset(&_CPU_Signal_mask, SIGABRT); -#if !defined(__CYGWIN__) - (void) sigdelset(&_CPU_Signal_mask, SIGIOT); -#endif - (void) sigdelset(&_CPU_Signal_mask, SIGCONT); - (void) sigdelset(&_CPU_Signal_mask, SIGSEGV); - (void) sigdelset(&_CPU_Signal_mask, SIGBUS); - (void) sigdelset(&_CPU_Signal_mask, SIGFPE); - - _CPU_ISR_Enable(1); - - /* - * Set the handler for all signals to be signal_handler - * which will then vector out to the correct handler - * for whichever signal actually happened. Initially - * set the vectors to the stray signal handler. - */ - - for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++) - (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler); - - _CPU_Signal_initialize(); -} - -void _CPU_Signal_initialize( void ) -{ - struct sigaction act; - sigset_t mask; - - /* mark them all active except for TraceTrap and Abort */ - - mask = _CPU_Signal_mask; - sigprocmask(SIG_UNBLOCK, &mask, 0); - - act.sa_handler = _CPU_ISR_Handler; - act.sa_mask = mask; - act.sa_flags = SA_RESTART; - - sigaction(SIGHUP, &act, 0); - sigaction(SIGINT, &act, 0); - sigaction(SIGQUIT, &act, 0); - sigaction(SIGILL, &act, 0); -#ifdef SIGEMT - sigaction(SIGEMT, &act, 0); -#endif - sigaction(SIGFPE, &act, 0); - sigaction(SIGKILL, &act, 0); - sigaction(SIGBUS, &act, 0); - sigaction(SIGSEGV, &act, 0); -#ifdef SIGSYS - sigaction(SIGSYS, &act, 0); -#endif - sigaction(SIGPIPE, &act, 0); - sigaction(SIGALRM, &act, 0); - sigaction(SIGTERM, &act, 0); - sigaction(SIGUSR1, &act, 0); - sigaction(SIGUSR2, &act, 0); - sigaction(SIGCHLD, &act, 0); -#ifdef SIGCLD - sigaction(SIGCLD, &act, 0); -#endif -#ifdef SIGPWR - sigaction(SIGPWR, &act, 0); -#endif - sigaction(SIGVTALRM, &act, 0); - sigaction(SIGPROF, &act, 0); - sigaction(SIGIO, &act, 0); - sigaction(SIGWINCH, &act, 0); - sigaction(SIGSTOP, &act, 0); - sigaction(SIGTTIN, &act, 0); - sigaction(SIGTTOU, &act, 0); - sigaction(SIGURG, &act, 0); -#ifdef SIGLOST - sigaction(SIGLOST, &act, 0); -#endif -} - -/*PAGE - * - * _CPU_Context_From_CPU_Init - */ - -void _CPU_Context_From_CPU_Init() -{ - -#if defined(__hppa__) && defined(RTEMS_UNIXLIB_SETJMP) - /* - * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp - * will handle the full 32 floating point registers. - */ - - { - extern unsigned32 _SYSTEM_ID; - - _SYSTEM_ID = 0x20c; - } -#endif - - /* - * get default values to use in _CPU_Context_Initialize() - */ - - if ( sizeof(Context_Control_overlay) > sizeof(Context_Control) ) - _CPU_Fatal_halt( 0xdeadf00d ); - - (void) memset( - &_CPU_Context_Default_with_ISRs_enabled, - 0, - sizeof(Context_Control_overlay) - ); - (void) memset( - &_CPU_Context_Default_with_ISRs_disabled, - 0, - sizeof(Context_Control_overlay) - ); - - _CPU_ISR_Set_level( 0 ); - _CPU_Context_switch( - (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled, - (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled - ); - - _CPU_ISR_Set_level( 1 ); - _CPU_Context_switch( - (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled, - (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled - ); -} - -/*PAGE - * - * _CPU_Sync_io_Init - */ - -void _CPU_Sync_io_Init() -{ - int fd; - - for (fd = 0; fd < FD_SETSIZE; fd++) - _CPU_Sync_io_handlers[fd] = NULL; - - sync_io_nfds = 0; - FD_ZERO(&sync_io_readfds); - FD_ZERO(&sync_io_writefds); - FD_ZERO(&sync_io_exceptfds); -} - -/*PAGE - * - * _CPU_ISR_Get_level - */ - -unsigned32 _CPU_ISR_Get_level( void ) -{ - sigset_t old_mask; - - sigemptyset( &old_mask ); - sigprocmask(SIG_BLOCK, 0, &old_mask); - - if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) - return 1; - - return 0; -} - -/* _CPU_Initialize - * - * This routine performs processor dependent initialization. - * - * INPUT PARAMETERS: - * cpu_table - CPU table to initialize - * thread_dispatch - address of disptaching routine - */ - - -void _CPU_Initialize( - rtems_cpu_table *cpu_table, - void (*thread_dispatch) /* ignored on this CPU */ -) -{ - /* - * If something happened where the public Context_Control is not - * at least as large as the private Context_Control_overlay, then - * we are in trouble. - */ - - if ( sizeof(Context_Control_overlay) > sizeof(Context_Control) ) - _CPU_Fatal_error(0x100 + 1); - - /* - * The thread_dispatch argument is the address of the entry point - * for the routine called at the end of an ISR once it has been - * decided a context switch is necessary. On some compilation - * systems it is difficult to call a high-level language routine - * from assembly. This allows us to trick these systems. - * - * If you encounter this problem save the entry point in a CPU - * dependent variable. - */ - - _CPU_Thread_dispatch_pointer = thread_dispatch; - - /* - * XXX; If there is not an easy way to initialize the FP context - * during Context_Initialize, then it is usually easier to - * save an "uninitialized" FP context here and copy it to - * the task's during Context_Initialize. - */ - - /* XXX: FP context initialization support */ - - _CPU_Table = *cpu_table; - - _CPU_Sync_io_Init(); - - _CPU_Context_From_CPU_Init(); - -} - -/*PAGE - * - * _CPU_ISR_install_raw_handler - */ - -void _CPU_ISR_install_raw_handler( - unsigned32 vector, - proc_ptr new_handler, - proc_ptr *old_handler -) -{ - _CPU_Fatal_halt( 0xdeaddead ); -} - -/*PAGE - * - * _CPU_ISR_install_vector - * - * This kernel routine installs the RTEMS handler for the - * specified vector. - * - * Input parameters: - * vector - interrupt vector number - * old_handler - former ISR for this vector number - * new_handler - replacement ISR for this vector number - * - * Output parameters: NONE - * - */ - - -void _CPU_ISR_install_vector( - unsigned32 vector, - proc_ptr new_handler, - proc_ptr *old_handler -) -{ - *old_handler = _ISR_Vector_table[ vector ]; - - /* - * If the interrupt vector table is a table of pointer to isr entry - * points, then we need to install the appropriate RTEMS interrupt - * handler for this vector number. - */ - - /* - * We put the actual user ISR address in '_ISR_vector_table'. This will - * be used by the _CPU_ISR_Handler so the user gets control. - */ - - _ISR_Vector_table[ vector ] = new_handler; -} - -/*PAGE - * - * _CPU_Install_interrupt_stack - */ - -void _CPU_Install_interrupt_stack( void ) -{ -} - -/*PAGE - * - * _CPU_Thread_Idle_body - * - * Stop until we get a signal which is the logically the same thing - * entering low-power or sleep mode on a real processor and waiting for - * an interrupt. This significantly reduces the consumption of host - * CPU cycles which is again similar to low power mode. - */ - -void _CPU_Thread_Idle_body( void ) -{ -#if CPU_SYNC_IO - extern void _Thread_Dispatch(void); - int fd; -#endif - - while (1) { -#ifdef RTEMS_DEBUG - /* interrupts had better be enabled at this point! */ - if (_CPU_ISR_Get_level() != 0) - abort(); -#endif - - /* - * Block on a select statement, the CPU interface added allow the - * user to add new descriptors which are to be blocked on - */ - -#if CPU_SYNC_IO - if (sync_io_nfds) { - int result; - fd_set readfds, writefds, exceptfds; - - readfds = sync_io_readfds; - writefds = sync_io_writefds; - exceptfds = sync_io_exceptfds; - result = select(sync_io_nfds, - &readfds, - &writefds, - &exceptfds, - NULL); - - if (result < 0) { - if (errno != EINTR) - _CPU_Fatal_error(0x200); /* FIXME : what number should go here !! */ - _Thread_Dispatch(); - continue; - } - - for (fd = 0; fd < sync_io_nfds; fd++) { - boolean read = FD_ISSET(fd, &readfds); - boolean write = FD_ISSET(fd, &writefds); - boolean except = FD_ISSET(fd, &exceptfds); - - if (_CPU_Sync_io_handlers[fd] && (read || write || except)) - _CPU_Sync_io_handlers[fd](fd, read, write, except); - } - - _Thread_Dispatch(); - } else - pause(); -#else - pause(); -#endif - - } - -} - -/*PAGE - * - * _CPU_Context_Initialize - */ - -void _CPU_Context_Initialize( - Context_Control *_the_context, - unsigned32 *_stack_base, - unsigned32 _size, - unsigned32 _new_level, - void *_entry_point, - boolean _is_fp -) -{ - unsigned32 *addr; - unsigned32 jmp_addr; - unsigned32 _stack_low; /* lowest "stack aligned" address */ - unsigned32 _stack_high; /* highest "stack aligned" address */ - unsigned32 _the_size; - - jmp_addr = (unsigned32) _entry_point; - - /* - * On CPUs with stacks which grow down, we build the stack - * based on the _stack_high address. On CPUs with stacks which - * grow up, we build the stack based on the _stack_low address. - */ - - _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1; - _stack_low &= ~(CPU_STACK_ALIGNMENT - 1); - - _stack_high = (unsigned32)(_stack_base) + _size; - _stack_high &= ~(CPU_STACK_ALIGNMENT - 1); - - if (_stack_high > _stack_low) - _the_size = _stack_high - _stack_low; - else - _the_size = _stack_low - _stack_high; - - /* - * Slam our jmp_buf template into the context we are creating - */ - - if ( _new_level == 0 ) - *(Context_Control_overlay *)_the_context = - _CPU_Context_Default_with_ISRs_enabled; - else - *(Context_Control_overlay *)_the_context = - _CPU_Context_Default_with_ISRs_disabled; - - addr = (unsigned32 *)_the_context; - -#if defined(__hppa__) - *(addr + RP_OFF) = jmp_addr; - *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE); - - /* - * See if we are using shared libraries by checking - * bit 30 in 24 off of newp. If bit 30 is set then - * we are using shared libraries and the jump address - * points to the pointer, so we put that into rp instead. - */ - - if (jmp_addr & 0x40000000) { - jmp_addr &= 0xfffffffc; - *(addr + RP_OFF) = *(unsigned32 *)jmp_addr; - } -#elif defined(__sparc__) - - /* - * See /usr/include/sys/stack.h in Solaris 2.3 for a nice - * diagram of the stack. - */ - - asm ("ta 0x03"); /* flush registers */ - - *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET; - *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE); - *(addr + FP_OFF) = (unsigned32)(_stack_high); - -#elif defined(__i386__) - - /* - * This information was gathered by disassembling setjmp(). - */ - - { - unsigned32 stack_ptr; - - stack_ptr = _stack_high - CPU_FRAME_SIZE; - - *(addr + EBX_OFF) = 0xFEEDFEED; - *(addr + ESI_OFF) = 0xDEADDEAD; - *(addr + EDI_OFF) = 0xDEAFDEAF; - *(addr + EBP_OFF) = stack_ptr; - *(addr + ESP_OFF) = stack_ptr; - *(addr + RET_OFF) = jmp_addr; - - addr = (unsigned32 *) stack_ptr; - - addr[ 0 ] = jmp_addr; - addr[ 1 ] = (unsigned32) stack_ptr; - addr[ 2 ] = (unsigned32) stack_ptr; - } - -#else -#error "UNKNOWN CPU!!!" -#endif - -} - -/*PAGE - * - * _CPU_Context_restore - */ - -void _CPU_Context_restore( - Context_Control *next -) -{ - Context_Control_overlay *nextp = (Context_Control_overlay *)next; - - _CPU_ISR_Enable(nextp->isr_level); - longjmp( nextp->regs, 0 ); -} - -/*PAGE - * - * _CPU_Context_switch - */ - -static void do_jump( - Context_Control_overlay *currentp, - Context_Control_overlay *nextp -); - -void _CPU_Context_switch( - Context_Control *current, - Context_Control *next -) -{ - Context_Control_overlay *currentp = (Context_Control_overlay *)current; - Context_Control_overlay *nextp = (Context_Control_overlay *)next; -#if 0 - int status; -#endif - - currentp->isr_level = _CPU_ISR_Disable_support(); - - do_jump( currentp, nextp ); - -#if 0 - if (sigsetjmp(currentp->regs, 1) == 0) { /* Save the current context */ - siglongjmp(nextp->regs, 0); /* Switch to the new context */ - _Internal_error_Occurred( - INTERNAL_ERROR_CORE, - TRUE, - status - ); - } -#endif - -#ifdef RTEMS_DEBUG - if (_CPU_ISR_Get_level() == 0) - abort(); -#endif - - _CPU_ISR_Enable(currentp->isr_level); -} - -static void do_jump( - Context_Control_overlay *currentp, - Context_Control_overlay *nextp -) -{ - int status; - - if (setjmp(currentp->regs) == 0) { /* Save the current context */ - longjmp(nextp->regs, 0); /* Switch to the new context */ - _Internal_error_Occurred( - INTERNAL_ERROR_CORE, - TRUE, - status - ); - } -} - -/*PAGE - * - * _CPU_Save_float_context - */ - -void _CPU_Save_float_context( - Context_Control_fp *fp_context -) -{ -} - -/*PAGE - * - * _CPU_Restore_float_context - */ - -void _CPU_Restore_float_context( - Context_Control_fp *fp_context -) -{ -} - -/*PAGE - * - * _CPU_ISR_Disable_support - */ - -unsigned32 _CPU_ISR_Disable_support(void) -{ - int status; - sigset_t old_mask; - - sigemptyset( &old_mask ); - status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask); - if ( status ) - _Internal_error_Occurred( - INTERNAL_ERROR_CORE, - TRUE, - status - ); - - if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) - return 1; - - return 0; -} - -/*PAGE - * - * _CPU_ISR_Enable - */ - -void _CPU_ISR_Enable( - unsigned32 level -) -{ - int status; - - if (level == 0) - status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0); - else - status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0); - - if ( status ) - _Internal_error_Occurred( - INTERNAL_ERROR_CORE, - TRUE, - status - ); -} - -/*PAGE - * - * _CPU_ISR_Handler - * - * External interrupt handler. - * This is installed as a UNIX signal handler. - * It vectors out to specific user interrupt handlers. - */ - -void _CPU_ISR_Handler(int vector) -{ - extern void _Thread_Dispatch(void); - extern unsigned32 _Thread_Dispatch_disable_level; - extern boolean _Context_Switch_necessary; - - if (_ISR_Nest_level++ == 0) { - /* switch to interrupt stack */ - } - - _Thread_Dispatch_disable_level++; - - if (_ISR_Vector_table[vector]) { - _ISR_Vector_table[vector](vector); - } else { - _CPU_Stray_signal(vector); - } - - if (_ISR_Nest_level-- == 0) { - /* switch back to original stack */ - } - - _Thread_Dispatch_disable_level--; - - if (_Thread_Dispatch_disable_level == 0 && - (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) { - _ISR_Signals_to_thread_executing = FALSE; - _CPU_ISR_Enable(0); - _Thread_Dispatch(); - } -} - -/*PAGE - * - * _CPU_Stray_signal - */ - -void _CPU_Stray_signal(int sig_num) -{ - char buffer[ 4 ]; - - /* - * print "stray" msg about ones which that might mean something - * Avoid using the stdio section of the library. - * The following is generally safe. - */ - - switch (sig_num) - { -#ifdef SIGCLD - case SIGCLD: - break; -#endif - default: - { - /* - * We avoid using the stdio section of the library. - * The following is generally safe - */ - - int digit; - int number = sig_num; - int len = 0; - - digit = number / 100; - number %= 100; - if (digit) buffer[len++] = '0' + digit; - - digit = number / 10; - number %= 10; - if (digit || len) buffer[len++] = '0' + digit; - - digit = number; - buffer[len++] = '0' + digit; - - buffer[ len++ ] = '\n'; - - write( 2, "Stray signal ", 13 ); - write( 2, buffer, len ); - - } - } - - /* - * If it was a "fatal" signal, then exit here - * If app code has installed a hander for one of these, then - * we won't call _CPU_Stray_signal, so this is ok. - */ - - switch (sig_num) { - case SIGINT: - case SIGHUP: - case SIGQUIT: - case SIGILL: -#ifdef SIGEMT - case SIGEMT: -#endif - case SIGKILL: - case SIGBUS: - case SIGSEGV: - case SIGTERM: -#if !defined(__CYGWIN__) - case SIGIOT: -#endif - _CPU_Fatal_error(0x100 + sig_num); - } -} - -/*PAGE - * - * _CPU_Fatal_error - */ - -void _CPU_Fatal_error(unsigned32 error) -{ - setitimer(ITIMER_REAL, 0, 0); - - if ( error ) { -#ifdef RTEMS_DEBUG - abort(); -#endif - if (getenv("RTEMS_DEBUG")) - abort(); - } - - _exit(error); -} - -/* - * Special Purpose Routines to hide the use of UNIX system calls. - */ - -int _CPU_Set_sync_io_handler( - int fd, - boolean read, - boolean write, - boolean except, - rtems_sync_io_handler handler -) -{ - if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) { - if (read) - FD_SET(fd, &sync_io_readfds); - else - FD_CLR(fd, &sync_io_readfds); - if (write) - FD_SET(fd, &sync_io_writefds); - else - FD_CLR(fd, &sync_io_writefds); - if (except) - FD_SET(fd, &sync_io_exceptfds); - else - FD_CLR(fd, &sync_io_exceptfds); - _CPU_Sync_io_handlers[fd] = handler; - if ((fd + 1) > sync_io_nfds) - sync_io_nfds = fd + 1; - return 0; - } - return -1; -} - -int _CPU_Clear_sync_io_handler( - int fd -) -{ - if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) { - FD_CLR(fd, &sync_io_readfds); - FD_CLR(fd, &sync_io_writefds); - FD_CLR(fd, &sync_io_exceptfds); - _CPU_Sync_io_handlers[fd] = NULL; - sync_io_nfds = 0; - for (fd = 0; fd < FD_SETSIZE; fd++) - if (FD_ISSET(fd, &sync_io_readfds) || - FD_ISSET(fd, &sync_io_writefds) || - FD_ISSET(fd, &sync_io_exceptfds)) - sync_io_nfds = fd + 1; - return 0; - } - return -1; -} - -int _CPU_Get_clock_vector( void ) -{ - return SIGALRM; -} - -void _CPU_Start_clock( - int microseconds -) -{ - struct itimerval new; - - new.it_value.tv_sec = 0; - new.it_value.tv_usec = microseconds; - new.it_interval.tv_sec = 0; - new.it_interval.tv_usec = microseconds; - - setitimer(ITIMER_REAL, &new, 0); -} - -void _CPU_Stop_clock( void ) -{ - struct itimerval new; - struct sigaction act; - - /* - * Set the SIGALRM signal to ignore any last - * signals that might come in while we are - * disarming the timer and removing the interrupt - * vector. - */ - - (void) memset(&act, 0, sizeof(act)); - act.sa_handler = SIG_IGN; - - sigaction(SIGALRM, &act, 0); - - (void) memset(&new, 0, sizeof(new)); - setitimer(ITIMER_REAL, &new, 0); -} - -#if 0 -extern void fix_syscall_errno( void ); -#endif -#define fix_syscall_errno() - -#if defined(RTEMS_MULTIPROCESSING) -int _CPU_SHM_Semid; - -void _CPU_SHM_Init( - unsigned32 maximum_nodes, - boolean is_master_node, - void **shm_address, - unsigned32 *shm_length -) -{ - int i; - int shmid; - char *shm_addr; - key_t shm_key; - key_t sem_key; - int status = 0; /* to avoid unitialized warnings */ - int shm_size; - - if (getenv("RTEMS_SHM_KEY")) - shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0); - else -#ifdef RTEMS_SHM_KEY - shm_key = RTEMS_SHM_KEY; -#else - shm_key = 0xa000; -#endif - - if (getenv("RTEMS_SHM_SIZE")) - shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0); - else -#ifdef RTEMS_SHM_SIZE - shm_size = RTEMS_SHM_SIZE; -#else - shm_size = 64 * 1024; -#endif - - if (getenv("RTEMS_SHM_SEMAPHORE_KEY")) - sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0); - else -#ifdef RTEMS_SHM_SEMAPHORE_KEY - sem_key = RTEMS_SHM_SEMAPHORE_KEY; -#else - sem_key = 0xa001; -#endif - - shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660); - if ( shmid == -1 ) { - fix_syscall_errno(); /* in case of newlib */ - perror( "shmget" ); - _CPU_Fatal_halt( 0xdead0001 ); - } - - shm_addr = shmat(shmid, (char *)0, SHM_RND); - if ( shm_addr == (void *)-1 ) { - fix_syscall_errno(); /* in case of newlib */ - perror( "shmat" ); - _CPU_Fatal_halt( 0xdead0002 ); - } - - _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660); - if ( _CPU_SHM_Semid == -1 ) { - fix_syscall_errno(); /* in case of newlib */ - perror( "semget" ); - _CPU_Fatal_halt( 0xdead0003 ); - } - - if ( is_master_node ) { - for ( i=0 ; i <= maximum_nodes ; i++ ) { -#if !HAS_UNION_SEMUN - union semun { - int val; - struct semid_ds *buf; - unsigned short int *array; -#if defined(__linux__) - struct seminfo *__buf; -#endif - } ; -#endif - union semun help ; - help.val = 1; - status = semctl( _CPU_SHM_Semid, i, SETVAL, help ); - - fix_syscall_errno(); /* in case of newlib */ - if ( status == -1 ) { - _CPU_Fatal_halt( 0xdead0004 ); - } - } - } - - *shm_address = shm_addr; - *shm_length = shm_size; - -} -#endif - -int _CPU_Get_pid( void ) -{ - return getpid(); -} - -#if defined(RTEMS_MULTIPROCESSING) -/* - * Define this to use signals for MPCI shared memory driver. - * If undefined, the shared memory driver will poll from the - * clock interrupt. - * Ref: ../shmsupp/getcfg.c - * - * BEWARE:: many UN*X kernels and debuggers become severely confused when - * debugging programs which use signals. The problem is *much* - * worse when using multiple signals, since ptrace(2) tends to - * drop all signals except 1 in the case of multiples. - * On hpux9, this problem was so bad, we couldn't use interrupts - * with the shared memory driver if we ever hoped to debug - * RTEMS programs. - * Maybe systems that use /proc don't have this problem... - */ - - -int _CPU_SHM_Get_vector( void ) -{ -#ifdef CPU_USE_SHM_INTERRUPTS - return SIGUSR1; -#else - return 0; -#endif -} - -void _CPU_SHM_Send_interrupt( - int pid, - int vector -) -{ - kill((pid_t) pid, vector); -} - -void _CPU_SHM_Lock( - int semaphore -) -{ - struct sembuf sb; - - sb.sem_num = semaphore; - sb.sem_op = -1; - sb.sem_flg = 0; - - while (1) { - int status = -1; - - status = semop(_CPU_SHM_Semid, &sb, 1); - if ( status >= 0 ) - break; - if ( status == -1 ) { - fix_syscall_errno(); /* in case of newlib */ - if (errno == EINTR) - continue; - perror("shm lock"); - _CPU_Fatal_halt( 0xdead0005 ); - } - } - -} - -void _CPU_SHM_Unlock( - int semaphore -) -{ - struct sembuf sb; - int status; - - sb.sem_num = semaphore; - sb.sem_op = 1; - sb.sem_flg = 0; - - while (1) { - status = semop(_CPU_SHM_Semid, &sb, 1); - if ( status >= 0 ) - break; - - if ( status == -1 ) { - fix_syscall_errno(); /* in case of newlib */ - if (errno == EINTR) - continue; - perror("shm unlock"); - _CPU_Fatal_halt( 0xdead0006 ); - } - } - -} -#endif diff --git a/c/src/exec/score/cpu/unix/rtems/.cvsignore b/c/src/exec/score/cpu/unix/rtems/.cvsignore deleted file mode 100644 index 282522db03..0000000000 --- a/c/src/exec/score/cpu/unix/rtems/.cvsignore +++ /dev/null @@ -1,2 +0,0 @@ -Makefile -Makefile.in diff --git a/c/src/exec/score/cpu/unix/rtems/score/.cvsignore b/c/src/exec/score/cpu/unix/rtems/score/.cvsignore deleted file mode 100644 index 7a3170081d..0000000000 --- a/c/src/exec/score/cpu/unix/rtems/score/.cvsignore +++ /dev/null @@ -1,4 +0,0 @@ -Makefile -Makefile.in -unixsize.h* -stamp-h* diff --git a/c/src/exec/score/cpu/unix/rtems/score/cpu.h b/c/src/exec/score/cpu/unix/rtems/score/cpu.h deleted file mode 100644 index 644fbb4b86..0000000000 --- a/c/src/exec/score/cpu/unix/rtems/score/cpu.h +++ /dev/null @@ -1,1120 +0,0 @@ -/* cpu.h - * - * This include file contains information pertaining to the HP - * PA-RISC processor (Level 1.1). - * - * COPYRIGHT (c) 1994 by Division Incorporated - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - */ - -#ifndef __CPU_h -#define __CPU_h - -#ifdef __cplusplus -extern "C" { -#endif - -#include <rtems/score/unix.h> /* pick up machine definitions */ -#ifndef ASM -#include <rtems/score/types.h> -#endif - -#include <rtems/score/unixsize.h> - -#if defined(solaris2) -#undef _POSIX_C_SOURCE -#define _POSIX_C_SOURCE 3 -#endif - -#if defined(linux) -#define MALLOC_0_RETURNS_NULL -#endif - -/* conditional compilation parameters */ - -/* - * Should the calls to _Thread_Enable_dispatch be inlined? - * - * If TRUE, then they are inlined. - * If FALSE, then a subroutine call is made. - * - * Basically this is an example of the classic trade-off of size - * versus speed. Inlining the call (TRUE) typically increases the - * size of RTEMS while speeding up the enabling of dispatching. - * [NOTE: In general, the _Thread_Dispatch_disable_level will - * only be 0 or 1 unless you are in an interrupt handler and that - * interrupt handler invokes the executive.] When not inlined - * something calls _Thread_Enable_dispatch which in turns calls - * _Thread_Dispatch. If the enable dispatch is inlined, then - * one subroutine call is avoided entirely.] - */ - -#define CPU_INLINE_ENABLE_DISPATCH FALSE - -/* - * Should the body of the search loops in _Thread_queue_Enqueue_priority - * be unrolled one time? In unrolled each iteration of the loop examines - * two "nodes" on the chain being searched. Otherwise, only one node - * is examined per iteration. - * - * If TRUE, then the loops are unrolled. - * If FALSE, then the loops are not unrolled. - * - * The primary factor in making this decision is the cost of disabling - * and enabling interrupts (_ISR_Flash) versus the cost of rest of the - * body of the loop. On some CPUs, the flash is more expensive than - * one iteration of the loop body. In this case, it might be desirable - * to unroll the loop. It is important to note that on some CPUs, this - * code is the longest interrupt disable period in RTEMS. So it is - * necessary to strike a balance when setting this parameter. - */ - -#define CPU_UNROLL_ENQUEUE_PRIORITY TRUE - -/* - * Does RTEMS manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * If the CPU supports a dedicated interrupt stack in hardware, - * then it is generally the responsibility of the BSP to allocate it - * and set it up. - * - * If the CPU does not support a dedicated interrupt stack, then - * the porter has two options: (1) execute interrupts on the - * stack of the interrupted task, and (2) have RTEMS manage a dedicated - * interrupt stack. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - */ - -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE - -/* - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * If TRUE, then it must be installed during initialization. - * If FALSE, then no installation is performed. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - */ - -#define CPU_HAS_HARDWARE_INTERRUPT_STACK TRUE - -/* - * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager? - * - * If TRUE, then the memory is allocated during initialization. - * If FALSE, then the memory is allocated during initialization. - * - * This should be TRUE if CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE - * or CPU_INSTALL_HARDWARE_INTERRUPT_STACK is TRUE. - */ - -#define CPU_ALLOCATE_INTERRUPT_STACK FALSE - -/* - * Does the RTEMS invoke the user's ISR with the vector number and - * a pointer to the saved interrupt frame (1) or just the vector - * number (0)? - */ - -#define CPU_ISR_PASSES_FRAME_POINTER 0 - -/* - * Does the CPU have hardware floating point? - * - * If TRUE, then the RTEMS_FLOATING_POINT task attribute is supported. - * If FALSE, then the RTEMS_FLOATING_POINT task attribute is ignored. - * - * If there is a FP coprocessor such as the i387 or mc68881, then - * the answer is TRUE. - * - * The macro name "NO_CPU_HAS_FPU" should be made CPU specific. - * It indicates whether or not this CPU model has FP support. For - * example, it would be possible to have an i386_nofp CPU model - * which set this to false to indicate that you have an i386 without - * an i387 and wish to leave floating point support out of RTEMS. - */ - -#define CPU_HARDWARE_FP TRUE -#define CPU_SOFTWARE_FP FALSE - -/* - * Are all tasks RTEMS_FLOATING_POINT tasks implicitly? - * - * If TRUE, then the RTEMS_FLOATING_POINT task attribute is assumed. - * If FALSE, then the RTEMS_FLOATING_POINT task attribute is followed. - * - * So far, the only CPU in which this option has been used is the - * HP PA-RISC. The HP C compiler and gcc both implicitly use the - * floating point registers to perform integer multiplies. If - * a function which you would not think utilize the FP unit DOES, - * then one can not easily predict which tasks will use the FP hardware. - * In this case, this option should be TRUE. - * - * If CPU_HARDWARE_FP is FALSE, then this should be FALSE as well. - */ - -#define CPU_ALL_TASKS_ARE_FP FALSE - -/* - * Should the IDLE task have a floating point context? - * - * If TRUE, then the IDLE task is created as a RTEMS_FLOATING_POINT task - * and it has a floating point context which is switched in and out. - * If FALSE, then the IDLE task does not have a floating point context. - * - * Setting this to TRUE negatively impacts the time required to preempt - * the IDLE task from an interrupt because the floating point context - * must be saved as part of the preemption. - */ - -#define CPU_IDLE_TASK_IS_FP FALSE - -/* - * Should the saving of the floating point registers be deferred - * until a context switch is made to another different floating point - * task? - * - * If TRUE, then the floating point context will not be stored until - * necessary. It will remain in the floating point registers and not - * disturned until another floating point task is switched to. - * - * If FALSE, then the floating point context is saved when a floating - * point task is switched out and restored when the next floating point - * task is restored. The state of the floating point registers between - * those two operations is not specified. - * - * If the floating point context does NOT have to be saved as part of - * interrupt dispatching, then it should be safe to set this to TRUE. - * - * Setting this flag to TRUE results in using a different algorithm - * for deciding when to save and restore the floating point context. - * The deferred FP switch algorithm minimizes the number of times - * the FP context is saved and restored. The FP context is not saved - * until a context switch is made to another, different FP task. - * Thus in a system with only one FP task, the FP context will never - * be saved or restored. - */ - -#define CPU_USE_DEFERRED_FP_SWITCH TRUE - -/* - * Does this port provide a CPU dependent IDLE task implementation? - * - * If TRUE, then the routine _CPU_Thread_Idle_body - * must be provided and is the default IDLE thread body instead of - * _CPU_Thread_Idle_body. - * - * If FALSE, then use the generic IDLE thread body if the BSP does - * not provide one. - * - * This is intended to allow for supporting processors which have - * a low power or idle mode. When the IDLE thread is executed, then - * the CPU can be powered down. - * - * The order of precedence for selecting the IDLE thread body is: - * - * 1. BSP provided - * 2. CPU dependent (if provided) - * 3. generic (if no BSP and no CPU dependent) - */ - -#define CPU_PROVIDES_IDLE_THREAD_BODY TRUE - -/* - * Does the stack grow up (toward higher addresses) or down - * (toward lower addresses)? - * - * If TRUE, then the grows upward. - * If FALSE, then the grows toward smaller addresses. - */ - -#if defined(__hppa__) -#define CPU_STACK_GROWS_UP TRUE -#elif defined(__sparc__) || defined(__i386__) -#define CPU_STACK_GROWS_UP FALSE -#else -#error "unknown CPU!!" -#endif - - -/* - * The following is the variable attribute used to force alignment - * of critical RTEMS structures. On some processors it may make - * sense to have these aligned on tighter boundaries than - * the minimum requirements of the compiler in order to have as - * much of the critical data area as possible in a cache line. - * - * The placement of this macro in the declaration of the variables - * is based on the syntactically requirements of the GNU C - * "__attribute__" extension. For example with GNU C, use - * the following to force a structures to a 32 byte boundary. - * - * __attribute__ ((aligned (32))) - * - * NOTE: Currently only the Priority Bit Map table uses this feature. - * To benefit from using this, the data must be heavily - * used so it will stay in the cache and used frequently enough - * in the executive to justify turning this on. - */ - -#ifdef __GNUC__ -#define CPU_STRUCTURE_ALIGNMENT __attribute__ ((aligned (32))) -#else -#define CPU_STRUCTURE_ALIGNMENT -#endif - -/* - * Define what is required to specify how the network to host conversion - * routines are handled. - */ - -#if defined(__hppa__) || defined(__sparc__) -#define CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES FALSE -#define CPU_BIG_ENDIAN TRUE -#define CPU_LITTLE_ENDIAN FALSE -#elif defined(__i386__) -#define CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES FALSE -#define CPU_BIG_ENDIAN FALSE -#define CPU_LITTLE_ENDIAN TRUE -#else -#error "Unknown CPU!!!" -#endif - -/* - * The following defines the number of bits actually used in the - * interrupt field of the task mode. How those bits map to the - * CPU interrupt levels is defined by the routine _CPU_ISR_Set_level(). - */ - -#define CPU_MODES_INTERRUPT_MASK 0x00000001 - -#define CPU_NAME "UNIX" - -/* - * Processor defined structures - * - * Examples structures include the descriptor tables from the i386 - * and the processor control structure on the i960ca. - */ - -/* may need to put some structures here. */ - -#if defined(__hppa__) -/* - * Word indices within a jmp_buf structure - */ - -#ifdef RTEMS_NEWLIB_SETJMP -#define RP_OFF 6 -#define SP_OFF 2 -#define R3_OFF 10 -#define R4_OFF 11 -#define R5_OFF 12 -#define R6_OFF 13 -#define R7_OFF 14 -#define R8_OFF 15 -#define R9_OFF 16 -#define R10_OFF 17 -#define R11_OFF 18 -#define R12_OFF 19 -#define R13_OFF 20 -#define R14_OFF 21 -#define R15_OFF 22 -#define R16_OFF 23 -#define R17_OFF 24 -#define R18_OFF 25 -#define DP_OFF 26 -#endif - -#ifdef RTEMS_UNIXLIB_SETJMP -#define RP_OFF 0 -#define SP_OFF 1 -#define R3_OFF 4 -#define R4_OFF 5 -#define R5_OFF 6 -#define R6_OFF 7 -#define R7_OFF 8 -#define R8_OFF 9 -#define R9_OFF 10 -#define R10_OFF 11 -#define R11_OFF 12 -#define R12_OFF 13 -#define R13_OFF 14 -#define R14_OFF 15 -#define R15_OFF 16 -#define R16_OFF 17 -#define R17_OFF 18 -#define R18_OFF 19 -#define DP_OFF 20 -#endif -#endif - -#if defined(__i386__) - -#ifdef RTEMS_NEWLIB -#error "Newlib not installed" -#endif - -/* - * For i386 targets - */ - -#ifdef RTEMS_UNIXLIB -#if defined(__FreeBSD__) -#define RET_OFF 0 -#define EBX_OFF 1 -#define EBP_OFF 2 -#define ESP_OFF 3 -#define ESI_OFF 4 -#define EDI_OFF 5 -#elif defined(__CYGWIN__) -#define EAX_OFF 0 -#define EBX_OFF 1 -#define ECX_OFF 2 -#define EDX_OFF 3 -#define ESI_OFF 4 -#define EDI_OFF 5 -#define EBP_OFF 6 -#define ESP_OFF 7 -#define RET_OFF 8 -#else -/* Linux */ -#define EBX_OFF 0 -#define ESI_OFF 1 -#define EDI_OFF 2 -#define EBP_OFF 3 -#define ESP_OFF 4 -#define RET_OFF 5 -#endif -#endif - -#endif - -#if defined(__sparc__) - -/* - * Word indices within a jmp_buf structure - */ - -#ifdef RTEMS_NEWLIB -#define ADDR_ADJ_OFFSET -8 -#define SP_OFF 0 -#define RP_OFF 1 -#define FP_OFF 2 -#endif - -#ifdef RTEMS_UNIXLIB -#define ADDR_ADJ_OFFSET 0 -#define G0_OFF 0 -#define SP_OFF 1 -#define RP_OFF 2 -#define FP_OFF 3 -#define I7_OFF 4 -#endif - -#endif - -/* - * Contexts - * - * Generally there are 2 types of context to save. - * 1. Interrupt registers to save - * 2. Task level registers to save - * - * This means we have the following 3 context items: - * 1. task level context stuff:: Context_Control - * 2. floating point task stuff:: Context_Control_fp - * 3. special interrupt level context :: Context_Control_interrupt - * - * On some processors, it is cost-effective to save only the callee - * preserved registers during a task context switch. This means - * that the ISR code needs to save those registers which do not - * persist across function calls. It is not mandatory to make this - * distinctions between the caller/callee saves registers for the - * purpose of minimizing context saved during task switch and on interrupts. - * If the cost of saving extra registers is minimal, simplicity is the - * choice. Save the same context on interrupt entry as for tasks in - * this case. - * - * Additionally, if gdb is to be made aware of RTEMS tasks for this CPU, then - * care should be used in designing the context area. - * - * On some CPUs with hardware floating point support, the Context_Control_fp - * structure will not be used or it simply consist of an array of a - * fixed number of bytes. This is done when the floating point context - * is dumped by a "FP save context" type instruction and the format - * is not really defined by the CPU. In this case, there is no need - * to figure out the exact format -- only the size. Of course, although - * this is enough information for RTEMS, it is probably not enough for - * a debugger such as gdb. But that is another problem. - */ - -/* - * This is really just the area for the following fields. - * - * jmp_buf regs; - * unsigned32 isr_level; - * - * Doing it this way avoids conflicts between the native stuff and the - * RTEMS stuff. - * - * NOTE: - * hpux9 setjmp is optimized for the case where the setjmp buffer - * is 8 byte aligned. In a RISC world, this seems likely to enable - * 8 byte copies, especially for the float registers. - * So we always align them on 8 byte boundaries. - */ - -#ifdef __GNUC__ -#define CONTEXT_STRUCTURE_ALIGNMENT __attribute__ ((aligned (8))) -#else -#define CONTEXT_STRUCTURE_ALIGNMENT -#endif - -typedef struct { - char Area[ SIZEOF_CPU_CONTEXT ] CONTEXT_STRUCTURE_ALIGNMENT; -} Context_Control; - -typedef struct { -} Context_Control_fp; - -typedef struct { -} CPU_Interrupt_frame; - - -/* - * The following table contains the information required to configure - * the UNIX Simulator specific parameters. - */ - -typedef struct { - void (*pretasking_hook)( void ); - void (*predriver_hook)( void ); - void (*postdriver_hook)( void ); - void (*idle_task)( void ); - boolean do_zero_of_workspace; - unsigned32 idle_task_stack_size; - unsigned32 interrupt_stack_size; - unsigned32 extra_mpci_receive_server_stack; - void * (*stack_allocate_hook)( unsigned32 ); - void (*stack_free_hook)( void* ); - /* end of required fields */ -} rtems_cpu_table; - -/* - * Macros to access required entires in the CPU Table are in - * the file rtems/system.h. - */ - -/* - * Macros to access UNIX specific additions to the CPU Table - */ - -/* There are no CPU specific additions to the CPU Table for this port. */ - -/* - * This variable is optional. It is used on CPUs on which it is difficult - * to generate an "uninitialized" FP context. It is filled in by - * _CPU_Initialize and copied into the task's FP context area during - * _CPU_Context_Initialize. - */ - -SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context; - -/* - * On some CPUs, RTEMS supports a software managed interrupt stack. - * This stack is allocated by the Interrupt Manager and the switch - * is performed in _ISR_Handler. These variables contain pointers - * to the lowest and highest addresses in the chunk of memory allocated - * for the interrupt stack. Since it is unknown whether the stack - * grows up or down (in general), this give the CPU dependent - * code the option of picking the version it wants to use. - * - * NOTE: These two variables are required if the macro - * CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE. - */ - -SCORE_EXTERN void *_CPU_Interrupt_stack_low; -SCORE_EXTERN void *_CPU_Interrupt_stack_high; - -/* - * With some compilation systems, it is difficult if not impossible to - * call a high-level language routine from assembly language. This - * is especially true of commercial Ada compilers and name mangling - * C++ ones. This variable can be optionally defined by the CPU porter - * and contains the address of the routine _Thread_Dispatch. This - * can make it easier to invoke that routine at the end of the interrupt - * sequence (if a dispatch is necessary). - */ - -SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)(); - -/* - * Nothing prevents the porter from declaring more CPU specific variables. - */ - -/* XXX: if needed, put more variables here */ - -/* - * The size of the floating point context area. On some CPUs this - * will not be a "sizeof" because the format of the floating point - * area is not defined -- only the size is. This is usually on - * CPUs with a "floating point save context" instruction. - */ - -#define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp ) - -/* - * The size of a frame on the stack - */ - -#if defined(__hppa__) -#define CPU_FRAME_SIZE (32 * 4) -#elif defined(__sparc__) -#define CPU_FRAME_SIZE (112) /* based on disassembled test code */ -#elif defined(__i386__) -#define CPU_FRAME_SIZE (24) /* return address, sp, and bp pushed plus fudge */ -#else -#error "Unknown CPU!!!" -#endif - -/* - * Amount of extra stack (above minimum stack size) required by - * MPCI receive server thread. Remember that in a multiprocessor - * system this thread must exist and be able to process all directives. - */ - -#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 - -/* - * This defines the number of entries in the ISR_Vector_table managed - * by RTEMS. - */ - -#define CPU_INTERRUPT_NUMBER_OF_VECTORS 64 -#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1) - -/* - * This is defined if the port has a special way to report the ISR nesting - * level. Most ports maintain the variable _ISR_Nest_level. - */ - -#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE - -/* - * Should be large enough to run all RTEMS tests. This insures - * that a "reasonable" small application should not have any problems. - */ - -#define CPU_STACK_MINIMUM_SIZE (16 * 1024) - -/* - * CPU's worst alignment requirement for data types on a byte boundary. This - * alignment does not take into account the requirements for the stack. - */ - -#define CPU_ALIGNMENT 8 - -/* - * This number corresponds to the byte alignment requirement for the - * heap handler. This alignment requirement may be stricter than that - * for the data types alignment specified by CPU_ALIGNMENT. It is - * common for the heap to follow the same alignment requirement as - * CPU_ALIGNMENT. If the CPU_ALIGNMENT is strict enough for the heap, - * then this should be set to CPU_ALIGNMENT. - * - * NOTE: This does not have to be a power of 2. It does have to - * be greater or equal to than CPU_ALIGNMENT. - */ - -#define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT - -/* - * This number corresponds to the byte alignment requirement for memory - * buffers allocated by the partition manager. This alignment requirement - * may be stricter than that for the data types alignment specified by - * CPU_ALIGNMENT. It is common for the partition to follow the same - * alignment requirement as CPU_ALIGNMENT. If the CPU_ALIGNMENT is strict - * enough for the partition, then this should be set to CPU_ALIGNMENT. - * - * NOTE: This does not have to be a power of 2. It does have to - * be greater or equal to than CPU_ALIGNMENT. - */ - -#define CPU_PARTITION_ALIGNMENT CPU_ALIGNMENT - -/* - * This number corresponds to the byte alignment requirement for the - * stack. This alignment requirement may be stricter than that for the - * data types alignment specified by CPU_ALIGNMENT. If the CPU_ALIGNMENT - * is strict enough for the stack, then this should be set to 0. - * - * NOTE: This must be a power of 2 either 0 or greater than CPU_ALIGNMENT. - */ - -#define CPU_STACK_ALIGNMENT 64 - -/* - * ISR handler macros - */ - -/* - * Support routine to initialize the RTEMS vector table after it is allocated. - */ - -void _CPU_Initialize_vectors(void); - -/* - * Disable all interrupts for an RTEMS critical section. The previous - * level is returned in _level. - */ - -extern unsigned32 _CPU_ISR_Disable_support(void); - -#define _CPU_ISR_Disable( _level ) \ - do { \ - (_level) = _CPU_ISR_Disable_support(); \ - } while ( 0 ) - -/* - * Enable interrupts to the previous level (returned by _CPU_ISR_Disable). - * This indicates the end of an RTEMS critical section. The parameter - * _level is not modified. - */ - -void _CPU_ISR_Enable(unsigned32 level); - -/* - * This temporarily restores the interrupt to _level before immediately - * disabling them again. This is used to divide long RTEMS critical - * sections into two or more parts. The parameter _level is not - * modified. - */ - -#define _CPU_ISR_Flash( _level ) \ - do { \ - register unsigned32 _ignored = 0; \ - _CPU_ISR_Enable( (_level) ); \ - _CPU_ISR_Disable( _ignored ); \ - } while ( 0 ) - -/* - * Map interrupt level in task mode onto the hardware that the CPU - * actually provides. Currently, interrupt levels which do not - * map onto the CPU in a generic fashion are undefined. Someday, - * it would be nice if these were "mapped" by the application - * via a callout. For example, m68k has 8 levels 0 - 7, levels - * 8 - 255 would be available for bsp/application specific meaning. - * This could be used to manage a programmable interrupt controller - * via the rtems_task_mode directive. - */ - -#define _CPU_ISR_Set_level( new_level ) \ - { \ - if ( new_level == 0 ) _CPU_ISR_Enable( 0 ); \ - else _CPU_ISR_Enable( 1 ); \ - } - -unsigned32 _CPU_ISR_Get_level( void ); - -/* end of ISR handler macros */ - -/* Context handler macros */ - -/* - * This routine is responsible for somehow restarting the currently - * executing task. If you are lucky, then all that is necessary - * is restoring the context. Otherwise, there will need to be - * a special assembly routine which does something special in this - * case. Context_Restore should work most of the time. It will - * not work if restarting self conflicts with the stack frame - * assumptions of restoring a context. - */ - -#define _CPU_Context_Restart_self( _the_context ) \ - _CPU_Context_restore( (_the_context) ); - -/* - * The purpose of this macro is to allow the initial pointer into - * a floating point context area (used to save the floating point - * context) to be at an arbitrary place in the floating point - * context area. - * - * This is necessary because some FP units are designed to have - * their context saved as a stack which grows into lower addresses. - * Other FP units can be saved by simply moving registers into offsets - * from the base of the context area. Finally some FP units provide - * a "dump context" instruction which could fill in from high to low - * or low to high based on the whim of the CPU designers. - */ - -#define _CPU_Context_Fp_start( _base, _offset ) \ - ( (void *) _Addresses_Add_offset( (_base), (_offset) ) ) - -/* - * This routine initializes the FP context area passed to it to. - * There are a few standard ways in which to initialize the - * floating point context. The code included for this macro assumes - * that this is a CPU in which a "initial" FP context was saved into - * _CPU_Null_fp_context and it simply copies it to the destination - * context passed to it. - * - * Other models include (1) not doing anything, and (2) putting - * a "null FP status word" in the correct place in the FP context. - */ - -#define _CPU_Context_Initialize_fp( _destination ) \ - { \ - *((Context_Control_fp *) *((void **) _destination)) = _CPU_Null_fp_context; \ - } - -#define _CPU_Context_save_fp( _fp_context ) \ - _CPU_Save_float_context( *(Context_Control_fp **)(_fp_context)) - -#define _CPU_Context_restore_fp( _fp_context ) \ - _CPU_Restore_float_context( *(Context_Control_fp **)(_fp_context)) - -extern void _CPU_Context_Initialize( - Context_Control *_the_context, - unsigned32 *_stack_base, - unsigned32 _size, - unsigned32 _new_level, - void *_entry_point, - boolean _is_fp -); - -/* end of Context handler macros */ - -/* Fatal Error manager macros */ - -/* - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - */ - -#define _CPU_Fatal_halt( _error ) \ - _CPU_Fatal_error( _error ) - -/* end of Fatal Error manager macros */ - -/* Bitfield handler macros */ - -/* - * This routine sets _output to the bit number of the first bit - * set in _value. _value is of CPU dependent type Priority_Bit_map_control. - * This type may be either 16 or 32 bits wide although only the 16 - * least significant bits will be used. - * - * There are a number of variables in using a "find first bit" type - * instruction. - * - * (1) What happens when run on a value of zero? - * (2) Bits may be numbered from MSB to LSB or vice-versa. - * (3) The numbering may be zero or one based. - * (4) The "find first bit" instruction may search from MSB or LSB. - * - * RTEMS guarantees that (1) will never happen so it is not a concern. - * (2),(3), (4) are handled by the macros _CPU_Priority_mask() and - * _CPU_Priority_bits_index(). These three form a set of routines - * which must logically operate together. Bits in the _value are - * set and cleared based on masks built by _CPU_Priority_mask(). - * The basic major and minor values calculated by _Priority_Major() - * and _Priority_Minor() are "massaged" by _CPU_Priority_bits_index() - * to properly range between the values returned by the "find first bit" - * instruction. This makes it possible for _Priority_Get_highest() to - * calculate the major and directly index into the minor table. - * This mapping is necessary to ensure that 0 (a high priority major/minor) - * is the first bit found. - * - * This entire "find first bit" and mapping process depends heavily - * on the manner in which a priority is broken into a major and minor - * components with the major being the 4 MSB of a priority and minor - * the 4 LSB. Thus (0 << 4) + 0 corresponds to priority 0 -- the highest - * priority. And (15 << 4) + 14 corresponds to priority 254 -- the next - * to the lowest priority. - * - * If your CPU does not have a "find first bit" instruction, then - * there are ways to make do without it. Here are a handful of ways - * to implement this in software: - * - * - a series of 16 bit test instructions - * - a "binary search using if's" - * - _number = 0 - * if _value > 0x00ff - * _value >>=8 - * _number = 8; - * - * if _value > 0x0000f - * _value >=8 - * _number += 4 - * - * _number += bit_set_table[ _value ] - * - * where bit_set_table[ 16 ] has values which indicate the first - * bit set - */ - -/* - * The UNIX port uses the generic C algorithm for bitfield scan to avoid - * dependencies on either a native bitscan instruction or an ffs() in the - * C library. - */ - -#define CPU_USE_GENERIC_BITFIELD_CODE TRUE -#define CPU_USE_GENERIC_BITFIELD_DATA TRUE - -/* end of Bitfield handler macros */ - -/* Priority handler handler macros */ - -/* - * The UNIX port uses the generic C algorithm for bitfield scan to avoid - * dependencies on either a native bitscan instruction or an ffs() in the - * C library. - */ - -/* end of Priority handler macros */ - -/* functions */ - -/* - * _CPU_Initialize - * - * This routine performs CPU dependent initialization. - */ - -void _CPU_Initialize( - rtems_cpu_table *cpu_table, - void (*thread_dispatch) -); - -/* - * _CPU_ISR_install_raw_handler - * - * This routine installs a "raw" interrupt handler directly into the - * processor's vector table. - */ - -void _CPU_ISR_install_raw_handler( - unsigned32 vector, - proc_ptr new_handler, - proc_ptr *old_handler -); - -/* - * _CPU_ISR_install_vector - * - * This routine installs an interrupt vector. - */ - -void _CPU_ISR_install_vector( - unsigned32 vector, - proc_ptr new_handler, - proc_ptr *old_handler -); - -/* - * _CPU_Install_interrupt_stack - * - * This routine installs the hardware interrupt stack pointer. - * - * NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK - * is TRUE. - */ - -void _CPU_Install_interrupt_stack( void ); - -/* - * _CPU_Thread_Idle_body - * - * This routine is the CPU dependent IDLE thread body. - * - * NOTE: It need only be provided if CPU_PROVIDES_IDLE_THREAD_BODY - * is TRUE. - */ - -void _CPU_Thread_Idle_body( void ); - -/* - * _CPU_Context_switch - * - * This routine switches from the run context to the heir context. - */ - -void _CPU_Context_switch( - Context_Control *run, - Context_Control *heir -); - -/* - * _CPU_Context_restore - * - * This routine is generally used only to restart self in an - * efficient manner. It may simply be a label in _CPU_Context_switch. - * - * NOTE: May be unnecessary to reload some registers. - */ - -void _CPU_Context_restore( - Context_Control *new_context -); - -/* - * _CPU_Save_float_context - * - * This routine saves the floating point context passed to it. - */ - -void _CPU_Save_float_context( - Context_Control_fp *fp_context_ptr -); - -/* - * _CPU_Restore_float_context - * - * This routine restores the floating point context passed to it. - */ - -void _CPU_Restore_float_context( - Context_Control_fp *fp_context_ptr -); - - -void _CPU_ISR_Set_signal_level( - unsigned32 level -); - -void _CPU_Fatal_error( - unsigned32 _error -); - -/* The following routine swaps the endian format of an unsigned int. - * It must be static because it is referenced indirectly. - * - * This version will work on any processor, but if there is a better - * way for your CPU PLEASE use it. The most common way to do this is to: - * - * swap least significant two bytes with 16-bit rotate - * swap upper and lower 16-bits - * swap most significant two bytes with 16-bit rotate - * - * Some CPUs have special instructions which swap a 32-bit quantity in - * a single instruction (e.g. i486). It is probably best to avoid - * an "endian swapping control bit" in the CPU. One good reason is - * that interrupts would probably have to be disabled to insure that - * an interrupt does not try to access the same "chunk" with the wrong - * endian. Another good reason is that on some CPUs, the endian bit - * endianness for ALL fetches -- both code and data -- so the code - * will be fetched incorrectly. - */ - -static inline unsigned int CPU_swap_u32( - unsigned int value -) -{ - unsigned32 byte1, byte2, byte3, byte4, swapped; - - byte4 = (value >> 24) & 0xff; - byte3 = (value >> 16) & 0xff; - byte2 = (value >> 8) & 0xff; - byte1 = value & 0xff; - - swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4; - return( swapped ); -} - -#define CPU_swap_u16( value ) \ - (((value&0xff) << 8) | ((value >> 8)&0xff)) - -/* - * Special Purpose Routines to hide the use of UNIX system calls. - */ - - -/* - * Pointer to a sync io Handler - */ - -typedef void ( *rtems_sync_io_handler )( - int fd, - boolean read, - boolean wrtie, - boolean except -); - -/* returns -1 if fd to large, 0 is successful */ -int _CPU_Set_sync_io_handler( - int fd, - boolean read, - boolean write, - boolean except, - rtems_sync_io_handler handler -); - -/* returns -1 if fd to large, o if successful */ -int _CPU_Clear_sync_io_handler( - int fd -); - -int _CPU_Get_clock_vector( void ); - -void _CPU_Start_clock( - int microseconds -); - -void _CPU_Stop_clock( void ); - -#if defined(RTEMS_MULTIPROCESSING) - -void _CPU_SHM_Init( - unsigned32 maximum_nodes, - boolean is_master_node, - void **shm_address, - unsigned32 *shm_length -); - -int _CPU_Get_pid( void ); - -int _CPU_SHM_Get_vector( void ); - -void _CPU_SHM_Send_interrupt( - int pid, - int vector -); - -void _CPU_SHM_Lock( - int semaphore -); - -void _CPU_SHM_Unlock( - int semaphore -); -#endif - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/c/src/exec/score/cpu/unix/rtems/score/types.h b/c/src/exec/score/cpu/unix/rtems/score/types.h deleted file mode 100644 index f423564ebc..0000000000 --- a/c/src/exec/score/cpu/unix/rtems/score/types.h +++ /dev/null @@ -1,71 +0,0 @@ -/* unixtypes.h - * - * This include file contains type definitions which are appropriate - * for a typical modern UNIX box using GNU C for the RTEMS simulator. - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - */ - -#ifndef __UNIX_TYPES_h -#define __UNIX_TYPES_h - -#ifndef ASM - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * some C++ compilers (eg: HP's) don't do 'signed' or 'volatile' - */ -#if defined(__cplusplus) && !defined(__GNUC__) -#define signed -#define volatile -#endif - -/* - * This section defines the basic types for this processor. - */ - -typedef unsigned char unsigned8; /* unsigned 8-bit integer */ -typedef unsigned short unsigned16; /* unsigned 16-bit integer */ -typedef unsigned int unsigned32; /* unsigned 32-bit integer */ - -typedef unsigned16 Priority_Bit_map_control; - -typedef signed char signed8; /* 8-bit signed integer */ -typedef signed short signed16; /* 16-bit signed integer */ -typedef signed int signed32; /* 32-bit signed integer */ - -/* - * some C++ compilers (eg: HP's) don't do 'long long' - */ -#if defined(__GNUC__) -typedef unsigned long long unsigned64; /* unsigned 64-bit integer */ -typedef signed long long signed64; /* 64 bit signed integer */ -#endif - -typedef unsigned32 boolean; /* Boolean value */ - -typedef float single_precision; /* single precision float */ -typedef double double_precision; /* double precision float */ - -typedef void unix_isr; - -typedef unix_isr ( *unix_isr_entry )( void ); - -#ifdef __cplusplus -} -#endif - -#endif /* !ASM */ - -#endif -/* end of include file */ diff --git a/c/src/exec/score/cpu/unix/rtems/score/unix.h b/c/src/exec/score/cpu/unix/rtems/score/unix.h deleted file mode 100644 index e8a0c7bdd6..0000000000 --- a/c/src/exec/score/cpu/unix/rtems/score/unix.h +++ /dev/null @@ -1,72 +0,0 @@ -/* unix.h - * - * This include file contains the definitions required by RTEMS - * which are typical for a modern UNIX computer using GCC. - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - */ - -#ifndef __UNIX_h -#define __UNIX_h - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * This file contains the information required to build - * RTEMS for a particular member of the "unix" - * family when executing in protected mode. It does - * this by setting variables to indicate which implementation - * dependent features are present in a particular member - * of the family. - */ - -#if defined(rtems_multilib) -/* - * Figure out all CPU Model Feature Flags based upon compiler - * predefines. - */ - -#define CPU_MODEL_NAME "rtems_multilib" - -#elif defined(hpux) - -#define CPU_MODEL_NAME "HP-UX" - -#elif defined(solaris2) - -#define CPU_MODEL_NAME "Solaris" - -#elif defined(__linux__) || defined(linux) - -#define CPU_MODEL_NAME "Linux" - -#elif defined(__CYGWIN__) - -#define CPU_MODEL_NAME "Cygwin" - -#elif defined(__FreeBSD__) - -#define CPU_MODEL_NAME "FreeBSD" - -#else - -#error "Unsupported CPU Model" - -#endif - -#ifdef __cplusplus -} -#endif - -#endif -/* end of include file */ - |