4 files changed, 21 insertions, 63 deletions
diff --git a/c/src/exec/score/cpu/sparc/rtems/score/cpu.h b/c/src/exec/score/cpu/sparc/rtems/score/cpu.h
index ab81a85e5f..5baf9aac5f 100644
--- a/c/src/exec/score/cpu/sparc/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/sparc/rtems/score/cpu.h
@@ -10,13 +10,6 @@
  *  found in the file LICENSE in this distribution or at
  *  http://www.OARcorp.com/rtems/license.html.
  *
- *  Ported to ERC32 implementation of the SPARC by On-Line Applications
- *  Research Corporation (OAR) under contract to the European Space 
- *  Agency (ESA).
- *
- *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. 
- *  European Space Agency.
- *
  *  $Id$
  */
 
@@ -160,11 +153,7 @@ extern "C" {
  *  not provide one.
  */
 
-#if (SPARC_HAS_LOW_POWER_MODE == 1)
-#define CPU_PROVIDES_IDLE_THREAD_BODY    TRUE
-#else
 #define CPU_PROVIDES_IDLE_THREAD_BODY    FALSE
-#endif
 
 /*
  *  Does the stack grow up (toward higher addresses) or down
@@ -560,16 +549,6 @@ SCORE_EXTERN Context_Control_fp  _CPU_Null_fp_context CPU_STRUCTURE_ALIGNMENT;
 SCORE_EXTERN void *_CPU_Interrupt_stack_low;
 SCORE_EXTERN void *_CPU_Interrupt_stack_high;
 
-#if defined(erc32)
-
-/*
- *  ERC32 Specific Variables
- */
-
-SCORE_EXTERN unsigned32 _ERC32_MEC_Timer_Control_Mirror;
-
-#endif
-
 /*
  *  The following type defines an entry in the SPARC's trap table.
  *
diff --git a/c/src/exec/score/cpu/sparc/rtems/score/sparc.h b/c/src/exec/score/cpu/sparc/rtems/score/sparc.h
index 9fa52533cd..1d09116295 100644
--- a/c/src/exec/score/cpu/sparc/rtems/score/sparc.h
+++ b/c/src/exec/score/cpu/sparc/rtems/score/sparc.h
@@ -10,13 +10,6 @@
  *  found in the file LICENSE in this distribution or at
  *  http://www.OARcorp.com/rtems/license.html.
  *
- *  Ported to ERC32 implementation of the SPARC by On-Line Applications
- *  Research Corporation (OAR) under contract to the European Space 
- *  Agency (ESA).
- *
- *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. 
- *  European Space Agency.
- *
  *  $Id$
  */
 
@@ -47,37 +40,37 @@ extern "C" {
  *    + SPARC_NUMBER_OF_REGISTER_WINDOWS
  *        8 is the most common number supported by SPARC implementations.
  *        SPARC_PSR_CWP_MASK is derived from this value.
- * 
- *    + SPARC_HAS_LOW_POWER_MODE
- *        0 - does not have low power mode support (or not supported)
- *        1 - has low power mode and thus a CPU model dependent idle task.
- *
  */
  
-#if defined(rtems_multilib)
 /*
- *  Figure out all CPU Model Feature Flags based upon compiler 
- *  predefines. 
+ *  Some higher end SPARCs have a bitscan instructions. It would
+ *  be nice to take advantage of them.  Right now, there is no
+ *  port to a CPU model with this feature and no (untested) code
+ *  that is based on this feature flag.
  */
 
-#define CPU_MODEL_NAME                   "rtems_multilib"
-#define SPARC_HAS_FPU                    1
 #define SPARC_HAS_BITSCAN                0
-#define SPARC_NUMBER_OF_REGISTER_WINDOWS 8
-#define SPARC_HAS_LOW_POWER_MODE         1
 
-#elif defined(erc32)
- 
-#define CPU_MODEL_NAME                   "erc32"
-#define SPARC_HAS_FPU                    1
-#define SPARC_HAS_BITSCAN                0
+/*
+ *  This should be OK until a port to a higher end SPARC processor
+ *  is made that has more than 8 register windows.  If this cannot
+ *  be determined based on multilib settings (v7/v8/v9), then the
+ *  cpu_asm.S code that depends on this will have to move to libcpu.
+ */
+
 #define SPARC_NUMBER_OF_REGISTER_WINDOWS 8
-#define SPARC_HAS_LOW_POWER_MODE         1
  
+/*
+ *  This should be determined based on some soft float derived 
+ *  cpp predefine but gcc does not currently give us that information.
+ */
+
+#define SPARC_HAS_FPU                    1
+
+#if SPARC_HAS_FPU
+#define CPU_MODEL_NAME "w/FPU"
 #else
- 
-#error "Unsupported CPU Model"
- 
+#define CPU_MODEL_NAME "w/soft-float"
 #endif
 
 /*
diff --git a/c/src/exec/score/cpu/sparc/rtems/score/sparctypes.h b/c/src/exec/score/cpu/sparc/rtems/score/sparctypes.h
index 1621d6fd5c..5e81acb4c7 100644
--- a/c/src/exec/score/cpu/sparc/rtems/score/sparctypes.h
+++ b/c/src/exec/score/cpu/sparc/rtems/score/sparctypes.h
@@ -10,13 +10,6 @@
  *  found in the file LICENSE in this distribution or at
  *  http://www.OARcorp.com/rtems/license.html.
  *
- *  Ported to ERC32 implementation of the SPARC by On-Line Applications
- *  Research Corporation (OAR) under contract to the European Space 
- *  Agency (ESA).
- *
- *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. 
- *  European Space Agency.
- *
  *  $Id$
  */
 
diff --git a/c/src/exec/score/cpu/sparc/rtems/score/types.h b/c/src/exec/score/cpu/sparc/rtems/score/types.h
index 1621d6fd5c..5e81acb4c7 100644
--- a/c/src/exec/score/cpu/sparc/rtems/score/types.h
+++ b/c/src/exec/score/cpu/sparc/rtems/score/types.h
@@ -10,13 +10,6 @@
  *  found in the file LICENSE in this distribution or at
  *  http://www.OARcorp.com/rtems/license.html.
  *
- *  Ported to ERC32 implementation of the SPARC by On-Line Applications
- *  Research Corporation (OAR) under contract to the European Space 
- *  Agency (ESA).
- *
- *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. 
- *  European Space Agency.
- *
  *  $Id$
  */