4 files changed, 29 insertions, 10 deletions
diff --git a/c/src/exec/score/cpu/i960/asm.h b/c/src/exec/score/cpu/i960/asm.h
index e8fc986402..73a8b3a641 100644
--- a/c/src/exec/score/cpu/i960/asm.h
+++ b/c/src/exec/score/cpu/i960/asm.h
@@ -31,7 +31,7 @@
  */
 
 #define ASM
-#include <rtems/i960.h>
+#include <rtems/core/i960.h>
 
 /*
  *  Recent versions of GNU cpp define variables which indicate the
diff --git a/c/src/exec/score/cpu/i960/cpu.c b/c/src/exec/score/cpu/i960/cpu.c
index d5acebd225..ec4613c4cf 100644
--- a/c/src/exec/score/cpu/i960/cpu.c
+++ b/c/src/exec/score/cpu/i960/cpu.c
@@ -21,7 +21,7 @@
 
 #include <rtems/system.h>
 #include <rtems/fatal.h>
-#include <rtems/isr.h>
+#include <rtems/core/isr.h>
 
 /*  _CPU_Initialize
  *
@@ -40,15 +40,26 @@ void _CPU_Initialize(
 )
 {
 
-  if ( cpu_table == NULL )
-    rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED );
-
   _CPU_Table = *cpu_table;
 
 }
 
 /*PAGE
  *
+ *  _CPU_ISR_Get_level
+ */
+ 
+unsigned32 _CPU_ISR_Get_level( void )
+{
+  unsigned32 level;
+ 
+  i960_get_interrupt_level( level );
+ 
+  return level;
+}
+
+/*PAGE
+ *
  *  _CPU_ISR_install_raw_handler
  */
  
diff --git a/c/src/exec/score/cpu/i960/cpu.h b/c/src/exec/score/cpu/i960/cpu.h
index 4e8e82e9de..3c4cb98ec8 100644
--- a/c/src/exec/score/cpu/i960/cpu.h
+++ b/c/src/exec/score/cpu/i960/cpu.h
@@ -23,9 +23,9 @@ extern "C" {
 
 #pragma align 4            /* for GNU C structure alignment */
 
-#include <rtems/i960.h>
+#include <rtems/core/i960.h>
 #ifndef ASM
-#include <rtems/i960types.h>
+#include <rtems/core/i960types.h>
 #endif
 
 #define CPU_INLINE_ENABLE_DISPATCH       FALSE
@@ -237,6 +237,8 @@ EXTERN void               *_CPU_Interrupt_stack_high;
     ); \
   }
 
+unsigned32 _CPU_ISR_Get_level( void );
+
 /* ISR handler section macros */
 
 /*
diff --git a/c/src/exec/score/cpu/i960/i960.h b/c/src/exec/score/cpu/i960/i960.h
index 53b99f469a..5112fd58c8 100644
--- a/c/src/exec/score/cpu/i960/i960.h
+++ b/c/src/exec/score/cpu/i960/i960.h
@@ -169,6 +169,13 @@ typedef struct {
                        : "0"  (_mask), "1"  ((oldlevel)) ); \
   }
 
+#define i960_get_interrupt_level( _level ) \
+  { \
+    i960_disable_interrupts( _level ); \
+    i960_enable_interrupts( _level ); \
+    (_level) = ((_level) & 0x1f0000) >> 16; \
+  } while ( 0 )
+
 #define i960_atomic_modify( mask, addr, prev ) \
  { register unsigned int  _mask = (mask); \
    register unsigned int *_addr = (unsigned int *)(addr); \
@@ -199,9 +206,8 @@ typedef struct {
 
 #define i960_clear_intr( xint ) \
  { register unsigned int _xint=(xint); \
-   asm volatile( "loop_til_cleared:
-                    clrbit %0,sf0,sf0 ; \
-                    bbs    %0,sf0,loop_til_cleared" \
+asm volatile( "loop_til_cleared: clrbit %0,sf0,sf0 ; \
+                  bbs    %0,sf0, loop_til_cleared" \
                   : "=d" (_xint) : "0" (_xint) ); \
  }