diff options
Diffstat (limited to 'bsps/powerpc/qoriq/start/mmu.c')
-rw-r--r-- | bsps/powerpc/qoriq/start/mmu.c | 84 |
1 files changed, 77 insertions, 7 deletions
diff --git a/bsps/powerpc/qoriq/start/mmu.c b/bsps/powerpc/qoriq/start/mmu.c index d3e342c9e9..706c9fd293 100644 --- a/bsps/powerpc/qoriq/start/mmu.c +++ b/bsps/powerpc/qoriq/start/mmu.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -7,11 +9,28 @@ */ /* - * Copyright (c) 2011, 2018 embedded brains GmbH. All rights reserved. + * Copyright (C) 2011, 2018 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #include <bsp/mmu.h> @@ -339,17 +358,20 @@ void qoriq_mmu_change_perm(uint32_t test, uint32_t set, uint32_t clear) { int i = 0; - for (i = 0; i < 16; ++i) { + for (i = 0; i < QORIQ_TLB1_ENTRY_COUNT; ++i) { uint32_t mas0 = FSL_EIS_MAS0_TLBSEL | FSL_EIS_MAS0_ESEL(i); uint32_t mas1 = 0; PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, mas0); + ppc_synchronize_instructions(); ppc_tlbre(); + ppc_synchronize_instructions(); - mas1 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mas1); if ((mas1 & FSL_EIS_MAS1_V) != 0) { uint32_t mask = 0x3ff; - uint32_t mas3 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3); + uint32_t mas3; + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3, mas3); if ((mas3 & mask) == test) { mas3 &= ~(clear & mask); @@ -363,3 +385,51 @@ void qoriq_mmu_change_perm(uint32_t test, uint32_t set, uint32_t clear) } } } + +int qoriq_mmu_find_free_tlb1_entry(void) +{ + int i = 0; + + for (i = 0; i < QORIQ_TLB1_ENTRY_COUNT; ++i) { + uint32_t mas0 = FSL_EIS_MAS0_TLBSEL | FSL_EIS_MAS0_ESEL(i); + uint32_t mas1; + + PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, mas0); + ppc_synchronize_instructions(); + ppc_tlbre(); + ppc_synchronize_instructions(); + + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mas1); + if ((mas1 & FSL_EIS_MAS1_V) == 0) { + return i; + } + } + + return -1; +} + +void qoriq_mmu_adjust_and_write_to_tlb1( + int tlb, + uintptr_t begin, + uintptr_t last, + uint32_t mas1, + uint32_t mas2, + uint32_t mas3, + uint32_t mas7 +) +{ + qoriq_mmu_context context; + + qoriq_mmu_context_init(&context); + qoriq_mmu_add( + &context, + begin, + last, + mas1, + mas2, + mas3, + mas7 + ); + qoriq_mmu_partition(&context, 1); + qoriq_mmu_write_to_tlb1(&context, tlb); +} |