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-rw-r--r--bsps/powerpc/motorola_powerpc/include/bsp.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/bsps/powerpc/motorola_powerpc/include/bsp.h b/bsps/powerpc/motorola_powerpc/include/bsp.h
index 7d362bf406..d44bcd5cff 100644
--- a/bsps/powerpc/motorola_powerpc/include/bsp.h
+++ b/bsps/powerpc/motorola_powerpc/include/bsp.h
@@ -50,8 +50,8 @@ extern "C" {
* _VME_A32_WIN0_ON_VME: VME address of that same window
*
* AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
- * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI
- * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
+ * CPU and PCI addresses). The mvme2307/mvme2700 'ppcbug' firmware configures the
+ * PCI bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
* the base address read from PCI config.space in order to translate that
* into a CPU address.
*
@@ -89,7 +89,7 @@ extern "C" {
*/
/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
#define _IO_BASE CHRP_ISA_IO_BASE
#define _ISA_MEM_BASE CHRP_ISA_MEM_BASE
/* address of our ram on the PCI bus */
@@ -154,7 +154,7 @@ extern "C" {
* find out what it is which is VERY different from other Motorola boards.
*/
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000)
/* #define BSP_UART_IOBASE_COM1 (0xffe10000) */
#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
@@ -169,7 +169,7 @@ extern "C" {
#define BSP_VGA_IOBASE ((_IO_BASE)+0x3c0)
#endif
-#if defined(mvme2300)
+#if defined(mvme2300) || defined(mot_ppc_mvme2307) || defined(mot_ppc_mvme2700)
#define MVME_HAS_DEC21140
#endif
#endif
@@ -190,7 +190,7 @@ extern int rtems_dec21140_driver_attach(struct rtems_bsdnet_ifconfig *, int);
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach
extern int rtems_ne_driver_attach(struct rtems_bsdnet_ifconfig *, int);
-RTEMS_INLINE_ROUTINE const char* bsp_cmdline_arg(const char* arg)
+static inline const char* bsp_cmdline_arg(const char* arg)
{
return rtems_bsp_cmdline_get_param_raw(arg);
}
@@ -271,7 +271,7 @@ extern int BSP_connect_clock_handler (void);
* It returns and clears the error bits of the PCI status register.
* MCP support is disabled because:
* a) the 2100 has no raven chip
- * b) the raven (2300) would raise machine check interrupts
+ * b) the raven (2300, 2307, 2700) would raise machine check interrupts
* on PCI config space access to empty slots.
*/
extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);