diff options
Diffstat (limited to 'bsps/powerpc/include/libcpu/powerpc-utility.h')
| -rw-r--r-- | bsps/powerpc/include/libcpu/powerpc-utility.h | 67 |
1 files changed, 46 insertions, 21 deletions
diff --git a/bsps/powerpc/include/libcpu/powerpc-utility.h b/bsps/powerpc/include/libcpu/powerpc-utility.h index 407020717d..bfe0a68154 100644 --- a/bsps/powerpc/include/libcpu/powerpc-utility.h +++ b/bsps/powerpc/include/libcpu/powerpc-utility.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -8,14 +10,31 @@ */ /* - * Copyright (c) 2008-2015 embedded brains GmbH. + * Copyright (C) 2008, 2015 embedded brains GmbH & Co. KG * * access function for Device Control Registers inspired by "ppc405common.h" * from Michael Hamel ADInstruments May 2008 * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ /** @@ -558,15 +577,11 @@ static inline void ppc_set_decrementer_register(uint32_t dec) * * @note This macro uses a GNU C extension. */ -#define PPC_SPECIAL_PURPOSE_REGISTER(spr) \ - ({ \ - uint32_t val; \ - __asm__ volatile (\ - "mfspr %0, " PPC_STRINGOF(spr) \ - : "=r" (val) \ - ); \ - val;\ - } ) +#define PPC_SPECIAL_PURPOSE_REGISTER(spr, val) \ + __asm__ volatile (\ + "mfspr %0, " PPC_STRINGOF(spr) \ + : "=r" (val) \ + ) /** * @brief Sets the Special Purpose Register with number @a spr to the value in @@ -593,7 +608,7 @@ static inline void ppc_set_decrementer_register(uint32_t dec) uint32_t val; \ uint32_t mybits = bits; \ _ISR_Local_disable(level); \ - val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \ + PPC_SPECIAL_PURPOSE_REGISTER(spr, val); \ val |= mybits; \ PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \ _ISR_Local_enable(level); \ @@ -613,7 +628,7 @@ static inline void ppc_set_decrementer_register(uint32_t dec) uint32_t mybits = bits; \ uint32_t mymask = mask; \ _ISR_Local_disable(level); \ - val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \ + PPC_SPECIAL_PURPOSE_REGISTER(spr, val); \ val &= ~mymask; \ val |= mybits; \ PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \ @@ -632,7 +647,7 @@ static inline void ppc_set_decrementer_register(uint32_t dec) uint32_t val; \ uint32_t mybits = bits; \ _ISR_Local_disable(level); \ - val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \ + PPC_SPECIAL_PURPOSE_REGISTER(spr, val); \ val &= ~mybits; \ PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \ _ISR_Local_enable(level); \ @@ -771,7 +786,9 @@ static inline void ppc_set_time_base(uint32_t val) static inline uint32_t ppc_time_base_upper(void) { - return PPC_SPECIAL_PURPOSE_REGISTER(TBRU); + uint32_t val; + PPC_SPECIAL_PURPOSE_REGISTER(TBRU, val); + return val; } static inline void ppc_set_time_base_upper(uint32_t val) @@ -791,12 +808,16 @@ static inline void ppc_set_time_base_64(uint64_t val) static inline uint32_t ppc_alternate_time_base(void) { - return PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_ATBL); + uint32_t val; + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_ATBL, val); + return val; } static inline uint32_t ppc_alternate_time_base_upper(void) { - return PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_ATBU); + uint32_t val; + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_ATBU, val); + return val; } static inline uint64_t ppc_alternate_time_base_64(void) @@ -816,7 +837,9 @@ static inline uint64_t ppc_alternate_time_base_64(void) static inline uint32_t ppc_processor_id(void) { - return PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_PIR); + uint32_t val; + PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_PIR, val); + return val; } static inline void ppc_set_processor_id(uint32_t val) @@ -826,7 +849,9 @@ static inline void ppc_set_processor_id(uint32_t val) static inline uint32_t ppc_fsl_system_version(void) { - return PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_SVR); + uint32_t val; + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_SVR, val); + return val; } static inline uint32_t ppc_fsl_system_version_cid(uint32_t svr) |