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Diffstat (limited to 'bsps/mips/include/libcpu/tx3904.h')
| -rw-r--r-- | bsps/mips/include/libcpu/tx3904.h | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/bsps/mips/include/libcpu/tx3904.h b/bsps/mips/include/libcpu/tx3904.h new file mode 100644 index 0000000000..b573d3c7d9 --- /dev/null +++ b/bsps/mips/include/libcpu/tx3904.h @@ -0,0 +1,45 @@ +/** + * @file + * + * MIPS Tx3904 specific information + * + * NOTE: This is far from complete. --joel (13 Dec 2000) + */ + +/* + * COPYRIGHT (c) 1989-2012. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef __TX3904_h +#define __TX3904_h + +/* + * Timer Base Addresses and Offsets + */ + +#define TX3904_TIMER0_BASE 0xFFFFF000 +#define TX3904_TIMER1_BASE 0xFFFFF100 +#define TX3904_TIMER2_BASE 0xFFFFF200 + +#define TX3904_TIMER_TCR 0x00 +#define TX3904_TIMER_TISR 0x04 +#define TX3904_TIMER_CPRA 0x08 +#define TX3904_TIMER_CPRB 0x0C +#define TX3904_TIMER_ITMR 0x10 +#define TX3904_TIMER_CCDR 0x20 +#define TX3904_TIMER_PGMR 0x30 +#define TX3904_TIMER_WTMR 0x40 +#define TX3904_TIMER_TRR 0xF0 + +#define TX3904_TIMER_READ( _base, _register ) \ + *((volatile uint32_t*)((_base) + (_register))) + +#define TX3904_TIMER_WRITE( _base, _register, _value ) \ + *((volatile uint32_t*)((_base) + (_register))) = (_value) + +#endif |