1 files changed, 17 insertions, 15 deletions

diff --git a/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c b/bsps/m68k/shared/cache/cache-mcf532x.c
index 5a93ea9d6c..0203afee77 100644
--- a/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c
+++ b/bsps/m68k/shared/cache/cache-mcf532x.c
@@ -6,7 +6,7 @@
 
 #include <rtems.h>
 #include <mcf532x/mcf532x.h>
-#include "cache_.h"
+#include "cache.h"
 
 #define m68k_set_cacr(_cacr) \
   __asm__ volatile ("movec %0,%%cacr" : : "d" (_cacr))
@@ -23,23 +23,23 @@ static uint32_t cacr_mode = MCF_CACR_ESB |
 /*
  * Cannot be frozen
  */
-void _CPU_cache_freeze_data(void)
+static void _CPU_cache_freeze_data(void)
 {
 }
 
-void _CPU_cache_unfreeze_data(void)
+static void _CPU_cache_unfreeze_data(void)
 {
 }
 
-void _CPU_cache_freeze_instruction(void)
+static void _CPU_cache_freeze_instruction(void)
 {
 }
 
-void _CPU_cache_unfreeze_instruction(void)
+static void _CPU_cache_unfreeze_instruction(void)
 {
 }
 
-void _CPU_cache_flush_1_data_line(const void *d_addr)
+static void _CPU_cache_flush_1_data_line(const void *d_addr)
 {
   register unsigned long adr = (((unsigned long) d_addr >> 4) & 0xff) << 4;
 
@@ -52,7 +52,7 @@ void _CPU_cache_flush_1_data_line(const void *d_addr)
   __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
 }
 
-void _CPU_cache_flush_entire_data(void)
+static void _CPU_cache_flush_entire_data(void)
 {
   register unsigned long set, adr;
 
@@ -68,7 +68,7 @@ void _CPU_cache_flush_entire_data(void)
   }
 }
 
-void _CPU_cache_enable_instruction(void)
+static void _CPU_cache_enable_instruction(void)
 {
   rtems_interrupt_level level;
 
@@ -81,7 +81,7 @@ void _CPU_cache_enable_instruction(void)
   rtems_interrupt_enable(level);
 }
 
-void _CPU_cache_disable_instruction(void)
+static void _CPU_cache_disable_instruction(void)
 {
   rtems_interrupt_level level;
 
@@ -94,12 +94,12 @@ void _CPU_cache_disable_instruction(void)
   rtems_interrupt_enable(level);
 }
 
-void _CPU_cache_invalidate_entire_instruction(void)
+static void _CPU_cache_invalidate_entire_instruction(void)
 {
   m68k_set_cacr(cacr_mode | MCF_CACR_CINVA);
 }
 
-void _CPU_cache_invalidate_1_instruction_line(const void *addr)
+static void _CPU_cache_invalidate_1_instruction_line(const void *addr)
 {
   register unsigned long adr = (((unsigned long) addr >> 4) & 0xff) << 4;
 
@@ -112,7 +112,7 @@ void _CPU_cache_invalidate_1_instruction_line(const void *addr)
   __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
 }
 
-void _CPU_cache_enable_data(void)
+static void _CPU_cache_enable_data(void)
 {
   /*
    * The 532x has a unified data and instruction cache, so we call through
@@ -121,7 +121,7 @@ void _CPU_cache_enable_data(void)
   _CPU_cache_enable_instruction();
 }
 
-void _CPU_cache_disable_data(void)
+static void _CPU_cache_disable_data(void)
 {
   /*
    * The 532x has a unified data and instruction cache, so we call through
@@ -130,12 +130,14 @@ void _CPU_cache_disable_data(void)
   _CPU_cache_disable_instruction();
 }
 
-void _CPU_cache_invalidate_entire_data(void)
+static void _CPU_cache_invalidate_entire_data(void)
 {
   _CPU_cache_invalidate_entire_instruction();
 }
 
-void _CPU_cache_invalidate_1_data_line(const void *addr)
+static void _CPU_cache_invalidate_1_data_line(const void *addr)
 {
   _CPU_cache_invalidate_1_instruction_line(addr);
 }
+
+#include "../../../shared/cache/cacheimpl.h"