diff options
Diffstat (limited to '')
41 files changed, 745 insertions, 210 deletions
diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_microzed-testsuite.tcfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_microzed-testsuite.tcfg new file mode 100755 index 0000000000..ba80faab99 --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_microzed-testsuite.tcfg @@ -0,0 +1,7 @@ +# +# Xilinx Zedboard RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: xilinx_zynq-testsuite.tcfg diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_microzed.cfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_microzed.cfg new file mode 100755 index 0000000000..2de871d46e --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_microzed.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_picozed-testsuite.tcfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_picozed-testsuite.tcfg new file mode 100755 index 0000000000..ba80faab99 --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_picozed-testsuite.tcfg @@ -0,0 +1,7 @@ +# +# Xilinx Zedboard RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: xilinx_zynq-testsuite.tcfg diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_picozed.cfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_picozed.cfg new file mode 100755 index 0000000000..2de871d46e --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_picozed.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_pynq-testsuite.tcfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_pynq-testsuite.tcfg new file mode 100755 index 0000000000..ba80faab99 --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_pynq-testsuite.tcfg @@ -0,0 +1,7 @@ +# +# Xilinx Zedboard RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: xilinx_zynq-testsuite.tcfg diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_pynq.cfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_pynq.cfg new file mode 100755 index 0000000000..2de871d46e --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_pynq.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_zybo-testsuite.tcfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zybo-testsuite.tcfg new file mode 100755 index 0000000000..ba80faab99 --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zybo-testsuite.tcfg @@ -0,0 +1,7 @@ +# +# Xilinx Zedboard RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: xilinx_zynq-testsuite.tcfg diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_zybo.cfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zybo.cfg new file mode 100755 index 0000000000..2de871d46e --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zybo.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_zybo_z7-testsuite.tcfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zybo_z7-testsuite.tcfg new file mode 100755 index 0000000000..ba80faab99 --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zybo_z7-testsuite.tcfg @@ -0,0 +1,7 @@ +# +# Xilinx Zedboard RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: xilinx_zynq-testsuite.tcfg diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_zybo_z7.cfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zybo_z7.cfg new file mode 100755 index 0000000000..2de871d46e --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zybo_z7.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc diff --git a/bsps/arm/xilinx-zynq/console/console-config.c b/bsps/arm/xilinx-zynq/console/console-config.c deleted file mode 100644 index 0581247a2d..0000000000 --- a/bsps/arm/xilinx-zynq/console/console-config.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2013, 2017 embedded brains GmbH - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include <bsp/irq.h> -#include <dev/serial/zynq-uart.h> - -zynq_uart_context zynq_uart_instances[2] = { - { - .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ), - .regs = (volatile struct zynq_uart *) 0xe0000000, - .irq = ZYNQ_IRQ_UART_0 - }, { - .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ), - .regs = (volatile struct zynq_uart *) 0xe0001000, - .irq = ZYNQ_IRQ_UART_1 - } -}; diff --git a/bsps/arm/xilinx-zynq/console/console-init.c b/bsps/arm/xilinx-zynq/console/console-init.c index a3659e3906..2018aaa710 100644 --- a/bsps/arm/xilinx-zynq/console/console-init.c +++ b/bsps/arm/xilinx-zynq/console/console-init.c @@ -1,7 +1,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2013, 2017 embedded brains GmbH + * Copyright (C) 2013, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -26,9 +26,25 @@ */ #include <rtems/console.h> +#include <rtems/termiostypes.h> #include <bsp.h> +#include <bsp/bootcard.h> +#include <bsp/irq.h> #include <dev/serial/zynq-uart.h> +#include <dev/serial/zynq-uart-regs.h> + +static zynq_uart_context zynq_uart_instances[2] = { + { + .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ), + .regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR, + .irq = ZYNQ_IRQ_UART_0 + }, { + .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ), + .regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR, + .irq = ZYNQ_IRQ_UART_1 + } +}; rtems_status_code console_initialize( rtems_device_major_number major, @@ -41,6 +57,7 @@ rtems_status_code console_initialize( rtems_termios_initialize(); for (i = 0; i < RTEMS_ARRAY_SIZE(zynq_uart_instances); ++i) { + zynq_uart_context *ctx = &zynq_uart_instances[i]; char uart[] = "/dev/ttySX"; uart[sizeof(uart) - 2] = (char) ('0' + i); @@ -48,10 +65,10 @@ rtems_status_code console_initialize( &uart[0], &zynq_uart_handler, NULL, - &zynq_uart_instances[i].base + &ctx->base ); - if (i == BSP_CONSOLE_MINOR) { + if (ctx->regs == (zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR) { link(&uart[0], CONSOLE_DEVICE_NAME); } } diff --git a/bsps/arm/xilinx-zynq/console/debug-console.c b/bsps/arm/xilinx-zynq/console/debug-console.c deleted file mode 100644 index 0e9b756f30..0000000000 --- a/bsps/arm/xilinx-zynq/console/debug-console.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2013, 2017 embedded brains GmbH - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include <rtems/bspIo.h> -#include <rtems/sysinit.h> - -#include <bsp.h> -#include <dev/serial/zynq-uart.h> - -#include <bspopts.h> - -static void zynq_debug_console_out(char c) -{ - rtems_termios_device_context *base = - &zynq_uart_instances[BSP_CONSOLE_MINOR].base; - - zynq_uart_write_polled(base, c); -} - -static void zynq_debug_console_init(void) -{ - rtems_termios_device_context *base = - &zynq_uart_instances[BSP_CONSOLE_MINOR].base; - - zynq_uart_initialize(base); - BSP_output_char = zynq_debug_console_out; -} - -static void zynq_debug_console_early_init(char c) -{ - rtems_termios_device_context *base = - &zynq_uart_instances[BSP_CONSOLE_MINOR].base; - - zynq_uart_initialize(base); - zynq_debug_console_out(c); -} - -static int zynq_debug_console_in(void) -{ - rtems_termios_device_context *base = - &zynq_uart_instances[BSP_CONSOLE_MINOR].base; - - return zynq_uart_read_polled(base); -} - -BSP_output_char_function_type BSP_output_char = zynq_debug_console_early_init; - -BSP_polling_getchar_function_type BSP_poll_char = zynq_debug_console_in; - -RTEMS_SYSINIT_ITEM( - zynq_debug_console_init, - RTEMS_SYSINIT_BSP_START, - RTEMS_SYSINIT_ORDER_LAST_BUT_5 -); diff --git a/bsps/arm/xilinx-zynq/include/bsp.h b/bsps/arm/xilinx-zynq/include/bsp.h index fde8d03130..151e603812 100644 --- a/bsps/arm/xilinx-zynq/include/bsp.h +++ b/bsps/arm/xilinx-zynq/include/bsp.h @@ -7,7 +7,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2013, 2014 embedded brains GmbH + * Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -54,7 +54,7 @@ #include <bsp/default-initial-extension.h> #include <bsp/start.h> -#include <dev/serial/zynq-uart.h> +#include <dev/serial/zynq-uart-zynq.h> #ifdef __cplusplus extern "C" { @@ -74,8 +74,6 @@ extern "C" { #define BSP_ARM_L2C_310_ID 0x410000c8 -extern zynq_uart_context zynq_uart_instances[2]; - /** * @brief Zynq specific set up of the MMU. * diff --git a/bsps/arm/xilinx-zynq/include/bsp/i2c.h b/bsps/arm/xilinx-zynq/include/bsp/i2c.h index fbdf6ea2c0..93a8b364b1 100644 --- a/bsps/arm/xilinx-zynq/include/bsp/i2c.h +++ b/bsps/arm/xilinx-zynq/include/bsp/i2c.h @@ -1,7 +1,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2014 embedded brains GmbH + * Copyright (C) 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -28,10 +28,11 @@ #ifndef LIBBSP_ARM_XILINX_ZYNQ_I2C_H #define LIBBSP_ARM_XILINX_ZYNQ_I2C_H -#include <bsp/cadence-i2c.h> #include <bsp/irq.h> #include <bsp.h> +#include <dev/i2c/cadence-i2c.h> + #ifdef __cplusplus extern "C" { #endif /* __cplusplus */ diff --git a/bsps/arm/xilinx-zynq/include/bsp/irq.h b/bsps/arm/xilinx-zynq/include/bsp/irq.h index f4579ae614..61d47c529b 100644 --- a/bsps/arm/xilinx-zynq/include/bsp/irq.h +++ b/bsps/arm/xilinx-zynq/include/bsp/irq.h @@ -7,7 +7,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2013 embedded brains GmbH + * Copyright (C) 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -36,7 +36,6 @@ #ifndef ASM -#include <rtems/irq.h> #include <rtems/irq-extension.h> #include <bsp/arm-a9mpcore-irq.h> diff --git a/bsps/arm/xilinx-zynq/include/tm27.h b/bsps/arm/xilinx-zynq/include/tm27.h index 7fc8dd7edd..9f3f846c87 100644 --- a/bsps/arm/xilinx-zynq/include/tm27.h +++ b/bsps/arm/xilinx-zynq/include/tm27.h @@ -7,7 +7,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2013 embedded brains GmbH + * Copyright (C) 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/arm/xilinx-zynq/start/bsp_specs b/bsps/arm/xilinx-zynq/start/bsp_specs deleted file mode 100644 index e69de29bb2..0000000000 --- a/bsps/arm/xilinx-zynq/start/bsp_specs +++ /dev/null diff --git a/bsps/arm/xilinx-zynq/start/bspreset.c b/bsps/arm/xilinx-zynq/start/bspreset.c index 3e797a137e..b6cf09ba02 100644 --- a/bsps/arm/xilinx-zynq/start/bspreset.c +++ b/bsps/arm/xilinx-zynq/start/bspreset.c @@ -1,7 +1,15 @@ -/* - * SPDX-License-Identifier: BSD-2-Clause +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsARMZynq * - * Copyright (C) 2013 embedded brains GmbH + * @brief This source file contains the implementation of bsp_reset(). + */ + +/* + * Copyright (C) 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -27,14 +35,16 @@ #include <bsp.h> #include <bsp/bootcard.h> -#include <dev/serial/zynq-uart.h> +#include <dev/serial/zynq-uart-regs.h> void bsp_reset(void) { + volatile zynq_uart *regs = + (volatile zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR; volatile uint32_t *slcr_unlock = (volatile uint32_t *) 0xf8000008; volatile uint32_t *pss_rst_ctrl = (volatile uint32_t *) 0xf8000200; - zynq_uart_reset_tx_flush(&zynq_uart_instances[BSP_CONSOLE_MINOR]); + zynq_uart_reset_tx_flush(regs); while (true) { *slcr_unlock = 0xdf0d; diff --git a/bsps/arm/xilinx-zynq/start/bspsmp.c b/bsps/arm/xilinx-zynq/start/bspsmp.c index fdb7f85ba6..294acb0083 100644 --- a/bsps/arm/xilinx-zynq/start/bspsmp.c +++ b/bsps/arm/xilinx-zynq/start/bspsmp.c @@ -1,7 +1,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2014 embedded brains GmbH + * Copyright (C) 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/arm/xilinx-zynq/start/bspstart.c b/bsps/arm/xilinx-zynq/start/bspstart.c index 68b0ef0b03..89926ce1f3 100644 --- a/bsps/arm/xilinx-zynq/start/bspstart.c +++ b/bsps/arm/xilinx-zynq/start/bspstart.c @@ -1,7 +1,16 @@ -/* - * SPDX-License-Identifier: BSD-2-Clause +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsARMZynq * - * Copyright (C) 2013, 2015 embedded brains GmbH + * @brief This source file contains the implementation of zynq_clock_cpu_1x() + * and bsp_start(). + */ + +/* + * Copyright (C) 2013, 2015 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/arm/xilinx-zynq/start/bspstarthooks.c b/bsps/arm/xilinx-zynq/start/bspstarthooks.c index c67ed4f93e..de6a4ccd54 100644 --- a/bsps/arm/xilinx-zynq/start/bspstarthooks.c +++ b/bsps/arm/xilinx-zynq/start/bspstarthooks.c @@ -1,7 +1,16 @@ -/* - * SPDX-License-Identifier: BSD-2-Clause +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsARMZynq * - * Copyright (C) 2013, 2014 embedded brains GmbH + * @brief This source file contains the implementation of bsp_start_hook_0() + * and bsp_start_hook_1(). + */ + +/* + * Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/arm/xilinx-zynq/start/bspstartmmu.c b/bsps/arm/xilinx-zynq/start/bspstartmmu.c index c18f8623f7..04d7586c1b 100644 --- a/bsps/arm/xilinx-zynq/start/bspstartmmu.c +++ b/bsps/arm/xilinx-zynq/start/bspstartmmu.c @@ -1,7 +1,16 @@ -/* - * SPDX-License-Identifier: BSD-2-Clause +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsARMZynq * - * Copyright (C) 2013 embedded brains GmbH + * @brief This source file contains the implementation of + * zynq_setup_mmu_and_cache(). + */ + +/* + * Copyright (C) 2013 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c b/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c new file mode 100644 index 0000000000..db03d1e9f3 --- /dev/null +++ b/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c @@ -0,0 +1,86 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (C) 2013, 2017 embedded brains GmbH + * + * Copyright (C) 2019 DornerWorks + * + * Written by Jeff Kubascik <jeff.kubascik@dornerworks.com> + * and Josh Whitehead <josh.whitehead@dornerworks.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <rtems/console.h> +#include <rtems/bspIo.h> +#include <rtems/termiostypes.h> + +#include <bsp/irq.h> +#include <dev/serial/zynq-uart.h> +#include <dev/serial/zynq-uart-regs.h> + +#include <bspopts.h> + +static zynq_uart_context zynqmp_uart_instances[2] = { + { + .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ), + .regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR, + .irq = ZYNQMP_IRQ_UART_0 + }, { + .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ), + .regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR, + .irq = ZYNQMP_IRQ_UART_1 + } +}; + +rtems_status_code console_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg +) +{ + size_t i; + + for (i = 0; i < RTEMS_ARRAY_SIZE(zynqmp_uart_instances); ++i) { + zynq_uart_context *ctx = &zynqmp_uart_instances[i]; + char uart[] = "/dev/ttySX"; + + uart[sizeof(uart) - 2] = (char) ('0' + i); + rtems_termios_device_install( + &uart[0], + &zynq_uart_handler, + NULL, + &ctx->base + ); + + if (ctx->regs == (zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR) { + link(&uart[0], CONSOLE_DEVICE_NAME); + } + } + + return RTEMS_SUCCESSFUL; +} + +void zynqmp_debug_console_flush(void) +{ + zynq_uart_reset_tx_flush((zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR); +} diff --git a/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h b/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h new file mode 100644 index 0000000000..70ad4f3c57 --- /dev/null +++ b/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h @@ -0,0 +1,95 @@ +/** + * @file + * @ingroup RTEMSBSPsARMZynqMP + * @brief Global BSP definitions. + */ + +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (C) 2013, 2014 embedded brains GmbH + * + * Copyright (C) 2019 DornerWorks + * + * Written by Jeff Kubascik <jeff.kubascik@dornerworks.com> + * and Josh Whitehead <josh.whitehead@dornerworks.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef LIBBSP_ARM_XILINX_ZYNQMP_BSP_H +#define LIBBSP_ARM_XILINX_ZYNQMP_BSP_H + +/** + * @defgroup RTEMSBSPsARMZynqMP Xilinx Zynq UltraScale+ MPSoC + * + * @ingroup RTEMSBSPsARM + * + * @brief Xilinx Zynq UltraScale+ MPSoC Board Support Package. + * + * @{ + */ + +#include <bspopts.h> + +#define BSP_FEATURE_IRQ_EXTENSION + +#ifndef ASM + +#include <rtems.h> + +#include <bsp/default-initial-extension.h> +#include <bsp/start.h> + +#include <dev/serial/zynq-uart-zynqmp.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + + +#define BSP_ARM_GIC_CPUIF_BASE 0x00F9001000 + +#define BSP_ARM_GIC_DIST_BASE 0xF9000000 + +#define BSP_ARM_A9MPCORE_SCU_BASE 0 + +#define BSP_ARM_A9MPCORE_GT_BASE 0 + +/** + * @brief Zynq UltraScale+ MPSoC specific set up of the MMU. + * + * Provide in the application to override the defaults in the BSP. + */ +BSP_START_TEXT_SECTION void zynqmp_setup_mpu_and_cache(void); + +void zynqmp_debug_console_flush(void); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* ASM */ + +/** @} */ + +#endif /* LIBBSP_ARM_XILINX_ZYNQMP_BSP_H */ diff --git a/bsps/arm/xilinx-zynqmp-rpu/include/bsp/irq.h b/bsps/arm/xilinx-zynqmp-rpu/include/bsp/irq.h new file mode 100644 index 0000000000..51aa613cdd --- /dev/null +++ b/bsps/arm/xilinx-zynqmp-rpu/include/bsp/irq.h @@ -0,0 +1,64 @@ +/** + * @file + * @ingroup zynqmp_interrupt + * @brief Interrupt definitions. + */ + +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (C) 2013 embedded brains GmbH + * + * Copyright (C) 2019 DornerWorks + * + * Written by Jeff Kubascik <jeff.kubascik@dornerworks.com> + * and Josh Whitehead <josh.whitehead@dornerworks.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef LIBBSP_ARM_XILINX_ZYNQMP_IRQ_H +#define LIBBSP_ARM_XILINX_ZYNQMP_IRQ_H + +#ifndef ASM + +#include <rtems/irq.h> +#include <rtems/irq-extension.h> + +#include <dev/irq/arm-gic-irq.h> +#include <peripheral_maps/xilinx_zynqmp.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define BSP_INTERRUPT_VECTOR_COUNT 188 + +/** @} */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* ASM */ + +#endif /* LIBBSP_ARM_XILINX_ZYNQMP_IRQ_H */ diff --git a/bsps/arm/xilinx-zynqmp-rpu/include/tm27.h b/bsps/arm/xilinx-zynqmp-rpu/include/tm27.h new file mode 100644 index 0000000000..14214fe151 --- /dev/null +++ b/bsps/arm/xilinx-zynqmp-rpu/include/tm27.h @@ -0,0 +1,54 @@ +/** + * @file + * @ingroup zynqmp_tm27 + * @brief Interrupt mechanisms for tm27 test. + */ + +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (C) 2013 embedded brains GmbH + * + * Copyright (C) 2019 DornerWorks + * + * Written by Jeff Kubascik <jeff.kubascik@dornerworks.com> + * and Josh Whitehead <josh.whitehead@dornerworks.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RTEMS_TMTEST27 +#error "This is an RTEMS internal file you must not include directly." +#endif + +#ifndef __tm27_h +#define __tm27_h + +/** + * @defgroup zynqmp_tm27 TM27 Test Support + * @ingroup RTEMSBSPsARMZynqMP + * @brief Interrupt Mechanisms for tm27 test + */ + +#include <dev/irq/arm-gic-tm27.h> + +#endif /* __tm27_h */ diff --git a/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c b/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c new file mode 100644 index 0000000000..eecb4da838 --- /dev/null +++ b/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c @@ -0,0 +1,43 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (C) 2013 embedded brains GmbH + * + * Copyright (C) 2019 DornerWorks + * + * Written by Jeff Kubascik <jeff.kubascik@dornerworks.com> + * and Josh Whitehead <josh.whitehead@dornerworks.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <bsp.h> +#include <bsp/bootcard.h> + +void bsp_reset(void) +{ + zynqmp_debug_console_flush(); + + while (true) { + /* Wait */ + } +} diff --git a/bsps/arm/xilinx-zynqmp-rpu/start/bspstart.c b/bsps/arm/xilinx-zynqmp-rpu/start/bspstart.c new file mode 100644 index 0000000000..960442fe9b --- /dev/null +++ b/bsps/arm/xilinx-zynqmp-rpu/start/bspstart.c @@ -0,0 +1,48 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (C) 2013, 2015 embedded brains GmbH + * + * Copyright (C) 2019 DornerWorks + * + * Written by Jeff Kubascik <jeff.kubascik@dornerworks.com> + * and Josh Whitehead <josh.whitehead@dornerworks.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <bsp.h> +#include <bsp/bootcard.h> +#include <bsp/irq-generic.h> +#include <bsp/linker-symbols.h> + +#include <libcpu/arm-cp15.h> + +void bsp_start(void) +{ + bsp_interrupt_initialize(); + + rtems_cache_coherent_add_area( + bsp_section_nocacheheap_begin, + (uintptr_t) bsp_section_nocacheheap_size + ); +} diff --git a/bsps/arm/xilinx-zynqmp-rpu/start/bspstarthooks.c b/bsps/arm/xilinx-zynqmp-rpu/start/bspstarthooks.c new file mode 100644 index 0000000000..9050ff4d58 --- /dev/null +++ b/bsps/arm/xilinx-zynqmp-rpu/start/bspstarthooks.c @@ -0,0 +1,74 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (C) 2013, 2014 embedded brains GmbH + * + * Copyright (C) 2019 DornerWorks + * + * Written by Jeff Kubascik <jeff.kubascik@dornerworks.com> + * and Josh Whitehead <josh.whitehead@dornerworks.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <bsp.h> +#include <bsp/start.h> + +BSP_START_TEXT_SECTION void bsp_start_hook_0(void) +{ + /* + * On reset, V will be set. This points the exceptions to the FSBL's vectors. The FSBL + * should clear this bit before booting RTEMS but in some debugging + * configurations the bit may not be. The other bits should already be clear + * on reset. Since the correct settings in these bits are critical, + * make sure SCTLR[M, I, A, C, V] are cleared. Afterwards, exceptions are + * handled by RTEMS. + * After setting the SCTLR, invalidate the caches. + * Note 1: The APU also does these steps in start.S in _start in the #if block: + * `#if (__ARM_ARCH >= 7 && __ARM_ARCH_PROFILE == 'A') || __ARM_ARCH >= 8` + * Note 2: Not all Arm R cores need this (like the TMS570). So, this probably should + * be in this hook and not in start.S + * + * Ref: https://developer.arm.com/documentation/ddi0460/c/System-Control/Register-descriptions/c1--System-Control-Register?lang=en + */ + + __asm__ volatile( + "mrc p15, 0, r0, c1, c0, 0 \n" + "bic r1, r0, #0x3000 \n" /* Clear V[13] and I[12] */ + "bic r1, r1, #0x7 \n" /* Clear C[2] A[1] and M[0] */ + "mcr p15, 0, r1, c1, c0, 0 \n" + + /* Invalidate caches */ + "mov r0,#0 \n" + "dsb \n" + "mcr p15, 0, r0, c7, c5, 0 \n" + "mcr p15, 0, r0, c15, c5, 0 \n" + "isb \n" + : :); +} + +BSP_START_TEXT_SECTION void bsp_start_hook_1(void) +{ + bsp_start_copy_sections(); + zynqmp_setup_mpu_and_cache(); + bsp_start_clear_bss(); +} diff --git a/bsps/arm/xilinx-zynqmp-rpu/start/bspstartmpu.c b/bsps/arm/xilinx-zynqmp-rpu/start/bspstartmpu.c new file mode 100644 index 0000000000..cd11a983d2 --- /dev/null +++ b/bsps/arm/xilinx-zynqmp-rpu/start/bspstartmpu.c @@ -0,0 +1,143 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (C) 2023 Reflex Aerospace GmbH + * + * Written by Philip Kirkpatrick <p.kirkpatrick@reflexaerospace.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <bsp.h> +#include <bsp/start.h> + +#include <xil_mpu.h> +#include <xil_cache.h> +#include <xreg_cortexr5.h> + +static BSP_START_TEXT_SECTION void zynqmp_configure_mpu_sections(void); + +/* + * Make weak and let the user override. + */ +BSP_START_TEXT_SECTION void zynqmp_setup_mpu_and_cache(void) __attribute__ ((weak)); + +BSP_START_TEXT_SECTION void zynqmp_setup_mpu_and_cache(void) +{ + zynqmp_configure_mpu_sections(); + Xil_EnableMPU(); + Xil_DCacheEnable(); + Xil_ICacheEnable(); +} + +/* + * Setup MPU sections. + * + * The MPU on the ZynqMP RPU only supports 16 regions. + * Regions must align on boundaries equal to the size of the region + * Regions may overlap or be nested with the later definition taking precedence + * + * Note: LWIP for Zynq requires an available region in xemacpsif_dma.c:init_dma() + * this is used for the BD memory. + * + * The following code attempts to implement the section map from Init_MPU() in + * https://github.com/Xilinx/embeddedsw/blob/master/lib/bsp/standalone/src/arm/cortexr5/platform/ZynqMP/mpu.c + * and from ARMV7_CP15_START_DEFAULT_SECTIONS in bsps/arm/include/bsp/arm-cp15-start.h + * Due to the limitation on number of regions, some compromises have been made. + * - Merges device memories instead of configuring each one independently + * - For DRAM, assumes a baseline of `Normal write-back Cacheable` `Full Access` + * then uses precedence to set no-cache and RO sections + * + * Reference: + * https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/System-Address-Map-Interconnects + * https://developer.arm.com/documentation/ddi0460/c/Memory-Protection-Unit + * + *| | Memory Range | Attributes of MPURegion | + *|-----------------|-------------------------|-----------------------------| + *| DDR | 0x00000000 - 0x7FFFFFFF | Normal write-back Cacheable | + *| -rodata | | + PRIV_RO_USER_RO | + *| -nocache | | Normal non-cacheable | + *| -nocachenoload | | Normal non-cacheable | + *| PL | 0x80000000 - 0xBFFFFFFF | Strongly Ordered | + *| Devices | 0xC0000000 - 0xFFFFFFFF | Device Memory | + *| -QSPI | 0xC0000000 - 0xDFFFFFFF | | + *| -PCIe | 0xE0000000 - 0xEFFFFFFF | | + *| -Reserved | 0xF0000000 - 0xF7FFFFFF | | + *| -STM_CORESIGHT | 0xF8000000 - 0xF8FFFFFF | | + *| -RPU_R5_GIC | 0xF9000000 - 0xF90FFFFF | | + *| -Reserved | 0xF9100000 - 0xFCFFFFFF | | + *| -FPS | 0xFD000000 - 0xFDFFFFFF | | + *| -LPS | 0xFE000000 - 0xFFFFFFFF | (1) | + *| OCM | 0xFFFC0000 - 0xFFFFFFFF | Normal write-back Cacheable | + * + * Note 1: Actual range for LPS goes to 0xFFBFFFFF, to use less sections go to + * 0xFFFFFFFF and use precedence to configure OCM + */ + +static BSP_START_TEXT_SECTION void zynqmp_configure_mpu_sections(void) +{ + u32 addr; + u64 size; + u32 attrib; + + // Configure baseline DDR memory 0x00000000 - 0x7FFFFFFF + addr = 0x00000000U; + size = 0x80000000U; + attrib = NORM_NSHARED_WB_WA | PRIV_RW_USER_RW; + Xil_SetMPURegion(addr, size, attrib); + + // Configure PL interfaces 0x80000000 - 0xBFFFFFFF + addr = 0x80000000U; + size = 0x40000000U; + attrib = STRONG_ORDERD_SHARED | PRIV_RW_USER_RW; + Xil_SetMPURegion(addr, size, attrib); + + // Configure devices 0xC0000000 - 0xFFFFFFFF + addr = 0xC0000000U; + size = 0x40000000U; + attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW; + Xil_SetMPURegion(addr, size, attrib); + + // Configure OCM 0xFFFC0000 - 0xFFFFFFFF + addr = 0xFFFC0000U; + size = 0x00040000U; + attrib = NORM_NSHARED_WB_WA | PRIV_RW_USER_RW; + Xil_SetMPURegion(addr, size, attrib); + + // Add RO region for RO section + addr = (u32) bsp_section_rodata_begin; + size = bsp_section_rodata_end - bsp_section_rodata_begin; + attrib = NORM_NSHARED_WB_WA | PRIV_RO_USER_RO; + Xil_SetMPURegion(addr, size, attrib); + + // Add no cache region for no cache section + addr = (u32) bsp_section_nocache_begin; + size = bsp_section_nocache_end - bsp_section_nocache_begin; + attrib = NORM_SHARED_NCACHE | PRIV_RW_USER_RW; + Xil_SetMPURegion(addr, size, attrib); + + // Add no cache region for no cache no load section + addr = (u32) bsp_section_nocachenoload_begin; + size = bsp_section_nocachenoload_end - bsp_section_nocachenoload_begin; + attrib = NORM_SHARED_NCACHE | PRIV_RW_USER_RW; + Xil_SetMPURegion(addr, size, attrib); +} diff --git a/bsps/arm/xilinx-zynqmp/console/console-config.c b/bsps/arm/xilinx-zynqmp/console/console-config.c index fb0b003c83..550e930415 100644 --- a/bsps/arm/xilinx-zynqmp/console/console-config.c +++ b/bsps/arm/xilinx-zynqmp/console/console-config.c @@ -1,7 +1,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2013, 2017 embedded brains GmbH + * Copyright (C) 2013, 2017 embedded brains GmbH & Co. KG * * Copyright (C) 2019 DornerWorks * @@ -32,21 +32,22 @@ #include <rtems/console.h> #include <rtems/bspIo.h> -#include <rtems/sysinit.h> +#include <rtems/termiostypes.h> #include <bsp/irq.h> #include <dev/serial/zynq-uart.h> +#include <dev/serial/zynq-uart-regs.h> #include <bspopts.h> static zynq_uart_context zynqmp_uart_instances[2] = { { .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ), - .regs = (volatile struct zynq_uart *) 0xff000000, + .regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR, .irq = ZYNQMP_IRQ_UART_0 }, { .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ), - .regs = (volatile struct zynq_uart *) 0xff010000, + .regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR, .irq = ZYNQMP_IRQ_UART_1 } }; @@ -62,6 +63,7 @@ rtems_status_code console_initialize( rtems_termios_initialize(); for (i = 0; i < RTEMS_ARRAY_SIZE(zynqmp_uart_instances); ++i) { + zynq_uart_context *ctx = &zynqmp_uart_instances[i]; char uart[] = "/dev/ttySX"; uart[sizeof(uart) - 2] = (char) ('0' + i); @@ -69,10 +71,10 @@ rtems_status_code console_initialize( &uart[0], &zynq_uart_handler, NULL, - &zynqmp_uart_instances[i].base + &ctx->base ); - if (i == BSP_CONSOLE_MINOR) { + if (ctx->regs == (zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR) { link(&uart[0], CONSOLE_DEVICE_NAME); } } @@ -82,49 +84,5 @@ rtems_status_code console_initialize( void zynqmp_debug_console_flush(void) { - zynq_uart_reset_tx_flush(&zynqmp_uart_instances[BSP_CONSOLE_MINOR]); + zynq_uart_reset_tx_flush((zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR); } - -static void zynqmp_debug_console_out(char c) -{ - rtems_termios_device_context *base = - &zynqmp_uart_instances[BSP_CONSOLE_MINOR].base; - - zynq_uart_write_polled(base, c); -} - -static void zynqmp_debug_console_init(void) -{ - rtems_termios_device_context *base = - &zynqmp_uart_instances[BSP_CONSOLE_MINOR].base; - - zynq_uart_initialize(base); - BSP_output_char = zynqmp_debug_console_out; -} - -static void zynqmp_debug_console_early_init(char c) -{ - rtems_termios_device_context *base = - &zynqmp_uart_instances[BSP_CONSOLE_MINOR].base; - - zynq_uart_initialize(base); - zynqmp_debug_console_out(c); -} - -static int zynqmp_debug_console_in(void) -{ - rtems_termios_device_context *base = - &zynqmp_uart_instances[BSP_CONSOLE_MINOR].base; - - return zynq_uart_read_polled(base); -} - -BSP_output_char_function_type BSP_output_char = zynqmp_debug_console_early_init; - -BSP_polling_getchar_function_type BSP_poll_char = zynqmp_debug_console_in; - -RTEMS_SYSINIT_ITEM( - zynqmp_debug_console_init, - RTEMS_SYSINIT_BSP_START, - RTEMS_SYSINIT_ORDER_LAST_BUT_5 -); diff --git a/bsps/arm/xilinx-zynqmp/include/bsp.h b/bsps/arm/xilinx-zynqmp/include/bsp.h index 9d33cf6134..cdc37b79a4 100644 --- a/bsps/arm/xilinx-zynqmp/include/bsp.h +++ b/bsps/arm/xilinx-zynqmp/include/bsp.h @@ -7,7 +7,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2013, 2014 embedded brains GmbH + * Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG * * Copyright (C) 2019 DornerWorks * @@ -60,6 +60,8 @@ #include <bsp/default-initial-extension.h> #include <bsp/start.h> +#include <dev/serial/zynq-uart-zynqmp.h> + #ifdef __cplusplus extern "C" { #endif /* __cplusplus */ diff --git a/bsps/arm/xilinx-zynqmp/include/bsp/irq.h b/bsps/arm/xilinx-zynqmp/include/bsp/irq.h index 9aae8168db..2029fde773 100644 --- a/bsps/arm/xilinx-zynqmp/include/bsp/irq.h +++ b/bsps/arm/xilinx-zynqmp/include/bsp/irq.h @@ -7,7 +7,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2013 embedded brains GmbH + * Copyright (C) 2013 embedded brains GmbH & Co. KG * * Copyright (C) 2019 DornerWorks * diff --git a/bsps/arm/xilinx-zynqmp/include/tm27.h b/bsps/arm/xilinx-zynqmp/include/tm27.h index 14214fe151..70fc99afbc 100644 --- a/bsps/arm/xilinx-zynqmp/include/tm27.h +++ b/bsps/arm/xilinx-zynqmp/include/tm27.h @@ -7,7 +7,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2013 embedded brains GmbH + * Copyright (C) 2013 embedded brains GmbH & Co. KG * * Copyright (C) 2019 DornerWorks * diff --git a/bsps/arm/xilinx-zynqmp/start/bsp_specs b/bsps/arm/xilinx-zynqmp/start/bsp_specs deleted file mode 100644 index e69de29bb2..0000000000 --- a/bsps/arm/xilinx-zynqmp/start/bsp_specs +++ /dev/null diff --git a/bsps/arm/xilinx-zynqmp/start/bspreset.c b/bsps/arm/xilinx-zynqmp/start/bspreset.c index 14f7d32436..b43b19b05f 100644 --- a/bsps/arm/xilinx-zynqmp/start/bspreset.c +++ b/bsps/arm/xilinx-zynqmp/start/bspreset.c @@ -1,7 +1,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2013 embedded brains GmbH + * Copyright (C) 2013 embedded brains GmbH & Co. KG * * Copyright (C) 2019 DornerWorks * diff --git a/bsps/arm/xilinx-zynqmp/start/bspsmp.c b/bsps/arm/xilinx-zynqmp/start/bspsmp.c index 28a4b6d54d..dce6a9b45c 100644 --- a/bsps/arm/xilinx-zynqmp/start/bspsmp.c +++ b/bsps/arm/xilinx-zynqmp/start/bspsmp.c @@ -1,7 +1,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2014 embedded brains GmbH + * Copyright (C) 2014 embedded brains GmbH & Co. KG * * Copyright (C) 2019 DornerWorks * diff --git a/bsps/arm/xilinx-zynqmp/start/bspstart.c b/bsps/arm/xilinx-zynqmp/start/bspstart.c index fe04ef4f8f..585ab2a91d 100644 --- a/bsps/arm/xilinx-zynqmp/start/bspstart.c +++ b/bsps/arm/xilinx-zynqmp/start/bspstart.c @@ -1,7 +1,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2013, 2015 embedded brains GmbH + * Copyright (C) 2013, 2015 embedded brains GmbH & Co. KG * * Copyright (C) 2019 DornerWorks * diff --git a/bsps/arm/xilinx-zynqmp/start/bspstarthooks.c b/bsps/arm/xilinx-zynqmp/start/bspstarthooks.c index ef76563a38..fba23515f7 100644 --- a/bsps/arm/xilinx-zynqmp/start/bspstarthooks.c +++ b/bsps/arm/xilinx-zynqmp/start/bspstarthooks.c @@ -1,7 +1,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2013, 2014 embedded brains GmbH + * Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG * * Copyright (C) 2019 DornerWorks * @@ -33,11 +33,6 @@ #include <bsp.h> #include <bsp/start.h> -BSP_START_TEXT_SECTION void bsp_start_hook_0(void) -{ - /* Nothing to do */ -} - BSP_START_TEXT_SECTION void bsp_start_hook_1(void) { bsp_start_copy_sections(); diff --git a/bsps/arm/xilinx-zynqmp/start/bspstartmmu.c b/bsps/arm/xilinx-zynqmp/start/bspstartmmu.c index c778590192..99e88c0cc2 100644 --- a/bsps/arm/xilinx-zynqmp/start/bspstartmmu.c +++ b/bsps/arm/xilinx-zynqmp/start/bspstartmmu.c @@ -1,7 +1,7 @@ /* * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (C) 2013 embedded brains GmbH + * Copyright (C) 2013 embedded brains GmbH & Co. KG * * Copyright (C) 2019 DornerWorks * |