diff options
Diffstat (limited to 'bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h')
-rw-r--r-- | bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h | 30 |
1 files changed, 5 insertions, 25 deletions
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h b/bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h index 2a7c90c083..2645c28fb5 100644 --- a/bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h +++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2017 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -37,13 +36,11 @@ */ /* Exported types ------------------------------------------------------------*/ /** @defgroup CORTEX_Exported_Types Cortex Exported Types - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if (__MPU_PRESENT == 1) /** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition - * @ingroup RTEMSBSPsARMSTM32H7 * @brief MPU Region initialization structure * @{ */ @@ -83,12 +80,10 @@ typedef struct /* Exported constants --------------------------------------------------------*/ /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ /** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bits for pre-emption priority @@ -106,7 +101,6 @@ typedef struct */ /** @defgroup CORTEX_SysTick_clock_source CORTEX _SysTick clock source - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000) @@ -118,7 +112,6 @@ typedef struct #if (__MPU_PRESENT == 1) /** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control MPU HFNMI and PRIVILEGED Access control - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define MPU_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000) @@ -130,7 +123,6 @@ typedef struct */ /** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define MPU_REGION_ENABLE ((uint8_t)0x01) @@ -140,7 +132,6 @@ typedef struct */ /** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00) @@ -150,7 +141,6 @@ typedef struct */ /** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define MPU_ACCESS_SHAREABLE ((uint8_t)0x01) @@ -160,7 +150,6 @@ typedef struct */ /** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) @@ -170,7 +159,6 @@ typedef struct */ /** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01) @@ -180,7 +168,6 @@ typedef struct */ /** @defgroup CORTEX_MPU_TEX_Levels MPU TEX Levels - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define MPU_TEX_LEVEL0 ((uint8_t)0x00) @@ -191,7 +178,6 @@ typedef struct */ /** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define MPU_REGION_SIZE_32B ((uint8_t)0x04) @@ -227,7 +213,6 @@ typedef struct */ /** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define MPU_REGION_NO_ACCESS ((uint8_t)0x00) @@ -241,7 +226,6 @@ typedef struct */ /** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define MPU_REGION_NUMBER0 ((uint8_t)0x00) @@ -275,7 +259,6 @@ typedef struct /* Exported Macros -----------------------------------------------------------*/ /** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ @@ -286,7 +269,6 @@ typedef struct /** @defgroup CORTEX_CPU_Identifier CORTEX_CPU_Identifier - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define CM7_CPUID ((uint32_t)0x00000003) @@ -352,7 +334,6 @@ uint32_t HAL_GetCurrentCPUID(void); /* Private constants ---------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/ /** @defgroup CORTEX_Private_Macros CORTEX Private Macros - * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \ @@ -476,4 +457,3 @@ uint32_t HAL_GetCurrentCPUID(void); #endif /* STM32H7xx_HAL_CORTEX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |