5 files changed, 3 insertions, 84 deletions
diff --git a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx
index 200e7f3e04..f38f7903b2 100644
--- a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx
+++ b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx
@@ -12,6 +12,6 @@ lpc32xx = 0x20020000;
 
 lpc32xx_magic_zero_begin = 0x05000000;
 lpc32xx_magic_zero_end = 0x07000000;
-lpc32xx_magic_zero_size = lpc32xx_magic_zero_end - lpc32xx_magic_zero_end;
+lpc32xx_magic_zero_size = lpc32xx_magic_zero_end - lpc32xx_magic_zero_begin;
 
 INCLUDE linkcmds.armv4
diff --git a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx
index cf388dfbba..b0d2ecd8a6 100644
--- a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx
+++ b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx
@@ -12,33 +12,13 @@
  * @ingroup bsp_linker
  *
  * @brief MZX application memory map.
- *
- * <table>
- *   <tr><th>Region Name</th><th>Region Begin</th><th>Region Size</th></tr>
- *   <tr><td>RAM_INT</td><td>0x08000000</td><td>256k</td></tr>
- *   <tr><td>RAM_MMU</td><td>0x80000000</td><td>16k</td></tr>
- *   <tr><td>RAM_EXT</td><td>0x80004000</td><td>32M - 16k</td></tr>
- * </table>
- *
- * <table>
- *   <tr><th>Section Name</th><th>Section Runtime Region</th><th>Section Load Region</th></tr>
- *   <tr><td>.start</td><td>RAM_EXT</td><td></td></tr>
- *   <tr><td>.vector</td><td>RAM_INT</td><td></td></tr>
- *   <tr><td>.text</td><td>RAM_EXT</td><td>RAM_EXT</td></tr>
- *   <tr><td>.rodata</td><td>RAM_EXT</td><td>RAM_EXT</td></tr>
- *   <tr><td>.data</td><td>RAM_EXT</td><td>RAM_EXT</td></tr>
- *   <tr><td>.fast</td><td>RAM_EXT</td><td>RAM_EXT</td></tr>
- *   <tr><td>.bss</td><td>RAM_EXT</td><td></td></tr>
- *   <tr><td>.work</td><td>RAM_EXT</td><td></td></tr>
- *   <tr><td>.stack</td><td>RAM_INT</td><td></td></tr>
- * </table>
  */
 
 MEMORY {
 	RAM_INT : ORIGIN = 0x08000000, LENGTH = 256k
 	RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */
 	RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */
-	RAM_EXT : ORIGIN = 0x80005000, LENGTH = 32M - 20k /* SDRAM on DYCS0 */
+	RAM_EXT : ORIGIN = 0x80005000, LENGTH = 64M - 20k /* SDRAM on DYCS0 */
 }
 
 REGION_ALIAS ("REGION_START", RAM_EXT);
diff --git a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_1 b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_1
index eae076e235..d50f17d7b7 100644
--- a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_1
+++ b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_1
@@ -12,26 +12,6 @@
  * @ingroup bsp_linker
  *
  * @brief MZX stage-1 program memory map.
- *
- * <table>
- *   <tr><th>Region Name</th><th>Region Begin</th><th>Region Size</th></tr>
- *   <tr><td>RAM_INT</td><td>0x08000000</td><td>232k</td></tr>
- *   <tr><td>RAM_MMU</td><td>0x0803a000</td><td>16k</td></tr>
- *   <tr><td>RAM_VEC</td><td>0x0803d000</td><td>8k</td></tr>
- * </table>
- *
- * <table>
- *   <tr><th>Section Name</th><th>Section Runtime Region</th><th>Section Load Region</th></tr>
- *   <tr><td>.start</td><td>RAM_INT</td><td></td></tr>
- *   <tr><td>.vector</td><td>RAM_INT</td><td></td></tr>
- *   <tr><td>.text</td><td>RAM_INT</td><td>RAM_INT</td></tr>
- *   <tr><td>.rodata</td><td>RAM_INT</td><td>RAM_INT</td></tr>
- *   <tr><td>.data</td><td>RAM_INT</td><td>RAM_INT</td></tr>
- *   <tr><td>.fast</td><td>RAM_INT</td><td>RAM_INT</td></tr>
- *   <tr><td>.bss</td><td>RAM_INT</td><td></td></tr>
- *   <tr><td>.work</td><td>RAM_INT</td><td></td></tr>
- *   <tr><td>.stack</td><td>RAM_INT</td><td></td></tr>
- * </table>
  */
 
 MEMORY {
diff --git a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_2 b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_2
index 2aa8c34091..4950ce735e 100644
--- a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_2
+++ b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_mzx_stage_2
@@ -12,26 +12,6 @@
  * @ingroup bsp_linker
  *
  * @brief MZX stage-2 program memory map.
- *
- * <table>
- *   <tr><th>Region Name</th><th>Region Begin</th><th>Region Size</th></tr>
- *   <tr><td>RAM_INT</td><td>0x08000000</td><td>256k</td></tr>
- *   <tr><td>RAM_MMU</td><td>0x81c00000</td><td>16k</td></tr>
- *   <tr><td>RAM_EXT</td><td>0x81c04000</td><td>4M - 16k</td></tr>
- * </table>
- *
- * <table>
- *   <tr><th>Section Name</th><th>Section Runtime Region</th><th>Section Load Region</th></tr>
- *   <tr><td>.start</td><td>RAM_EXT</td><td></td></tr>
- *   <tr><td>.vector</td><td>RAM_INT</td><td></td></tr>
- *   <tr><td>.text</td><td>RAM_EXT</td><td>RAM_EXT</td></tr>
- *   <tr><td>.rodata</td><td>RAM_EXT</td><td>RAM_EXT</td></tr>
- *   <tr><td>.data</td><td>RAM_EXT</td><td>RAM_EXT</td></tr>
- *   <tr><td>.fast</td><td>RAM_EXT</td><td>RAM_EXT</td></tr>
- *   <tr><td>.bss</td><td>RAM_EXT</td><td></td></tr>
- *   <tr><td>.work</td><td>RAM_EXT</td><td></td></tr>
- *   <tr><td>.stack</td><td>RAM_INT</td><td></td></tr>
- * </table>
  */
 
 MEMORY {
@@ -39,7 +19,7 @@ MEMORY {
 	RAM_FAST : ORIGIN = 0x0803c000, LENGTH = 16k
 	RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */
 	RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */
-	RAM_EXT : ORIGIN = 0x81c00000, LENGTH = 4M /* SDRAM on DYCS0 */
+	RAM_EXT : ORIGIN = 0x83000000, LENGTH = 16M /* SDRAM on DYCS0 */
 }
 
 REGION_ALIAS ("REGION_START", RAM_EXT);
diff --git a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_phycore b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_phycore
index 2459da2557..34542a6dcb 100644
--- a/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_phycore
+++ b/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_phycore
@@ -12,27 +12,6 @@
  * @ingroup bsp_linker
  *
  * @brief phyCORE-LPC3250 memory map.
- *
- * <table>
- *   <tr><th>Region Name</th><th>Region Begin</th><th>Region Size</th></tr>
- *   <tr><td>RAM_INT</td><td>0x08000000</td><td>256k</td></tr>
- *   <tr><td>RAM_MMU</td><td>0x80000000</td><td>16k</td></tr>
- *   <tr><td>RAM_EXT</td><td>0x80004000</td><td>64M - 16k</td></tr>
- *   <tr><td>ROM_EXT</td><td>0xe0000000</td><td>2M</td></tr>
- * </table>
- *
- * <table>
- *   <tr><th>Section Name</th><th>Section Runtime Region</th><th>Section Load Region</th></tr>
- *   <tr><td>.start</td><td>RAM_EXT</td><td></td></tr>
- *   <tr><td>.vector</td><td>RAM_INT</td><td></td></tr>
- *   <tr><td>.text</td><td>RAM_EXT</td><td>RAM_EXT</td></tr>
- *   <tr><td>.rodata</td><td>RAM_EXT</td><td>RAM_EXT</td></tr>
- *   <tr><td>.data</td><td>RAM_EXT</td><td>RAM_EXT</td></tr>
- *   <tr><td>.fast</td><td>RAM_EXT</td><td>RAM_EXT</td></tr>
- *   <tr><td>.bss</td><td>RAM_EXT</td><td></td></tr>
- *   <tr><td>.work</td><td>RAM_EXT</td><td></td></tr>
- *   <tr><td>.stack</td><td>RAM_INT</td><td></td></tr>
- * </table>
  */
 
 MEMORY {