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Diffstat (limited to 'bsps/arm/include/bsp/cadence-spi.h')
-rw-r--r-- | bsps/arm/include/bsp/cadence-spi.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/bsps/arm/include/bsp/cadence-spi.h b/bsps/arm/include/bsp/cadence-spi.h new file mode 100644 index 0000000000..d97ede53c8 --- /dev/null +++ b/bsps/arm/include/bsp/cadence-spi.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2021 Jan Sommer, German Aerospace Center (DLR) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef LIBBSP_ARM_XILINX_ZYNQ_CADENCE_SPI_H +#define LIBBSP_ARM_XILINX_ZYNQ_CADENCE_SPI_H + +#include <rtems.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +/** + * Register the cadence-spi device with rtems + * + * @param bus_path path of the new device (e.g. /dev/spi0) + * @register_base Address of the first (i.e. config) register + * @input_clock Configured frequency of the input clock + * + * @return RTEMS_SUCCESSFUL on success, negative number on failure + * + * Note: The spi frequencies the cadence spi device can achieve + * are the @p input_clock divided by a power of 2 between + * 4 and 256. + * The driver tries to find a divider which yields a spi + * frequency equal to or lower than the desired bus frequency. + */ +int spi_bus_register_cadence( + const char *bus_path, + uintptr_t register_base, + uint32_t input_clock, + rtems_vector_number irq +); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* LIBBSP_ARM_XILINX_ZYNQ_CADENCE_SPI_H */ |