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-rw-r--r--bsps/arm/imxrt/boards/evkbimxrt1050/flash-dcd.c (renamed from bsps/arm/imxrt/start/flash-dcd.c)0
-rw-r--r--bsps/arm/imxrt/start/bspstart.c29
-rw-r--r--bsps/arm/imxrt/start/bspstarthooks.c38
-rw-r--r--bsps/arm/imxrt/start/clock-arm-pll-config.c33
-rw-r--r--bsps/arm/imxrt/start/flash-boot-data.c4
-rw-r--r--bsps/arm/imxrt/start/flash-flexspi-config.c60
-rw-r--r--bsps/arm/imxrt/start/flash-ivt.c2
-rw-r--r--bsps/arm/imxrt/start/imxrt-ffec-init.c8
-rw-r--r--bsps/arm/imxrt/start/mpu-config.c10
9 files changed, 67 insertions, 117 deletions
diff --git a/bsps/arm/imxrt/start/flash-dcd.c b/bsps/arm/imxrt/boards/evkbimxrt1050/flash-dcd.c
index a53e5bda39..a53e5bda39 100644
--- a/bsps/arm/imxrt/start/flash-dcd.c
+++ b/bsps/arm/imxrt/boards/evkbimxrt1050/flash-dcd.c
diff --git a/bsps/arm/imxrt/start/bspstart.c b/bsps/arm/imxrt/start/bspstart.c
index 445af04563..1d583d7ca4 100644
--- a/bsps/arm/imxrt/start/bspstart.c
+++ b/bsps/arm/imxrt/start/bspstart.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
- * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ * Copyright (C) 2020 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -47,6 +47,7 @@ uint32_t imxrt_systick_frequency(void)
static void imxrt_disable_wait_mode(void)
{
+#if IMXRT_IS_MIMXRT10xx
/*
* Prevent processor from entering WAIT or SLEEP mode when a WFI is executed.
* This would switch off the normal interrupt controller and activate an
@@ -58,6 +59,16 @@ static void imxrt_disable_wait_mode(void)
* every WFI.
*/
CLOCK_SetMode(kCLOCK_ModeRun);
+#elif IMXRT_IS_MIMXRT11xx
+ /*
+ * i.MX RT11xx doesn't support disabling power saving for WFI. On the other
+ * hand it doesn't have a separate interrupt controller like the i.MX RT1050.
+ * So a power save during WFI is only annoying during debugging but doesn't
+ * hurt otherwise.
+ */
+#else
+ #error Disabling wait mode not implemented for this chip.
+#endif
}
void bsp_start(void)
@@ -125,6 +136,22 @@ uint32_t bsp_fdt_map_intr(const uint32_t *intr, size_t icells)
return intr[0];
}
+/*
+ * Clock frequencies for peripherals like SD card. These are used by libbsd
+ * drivers.
+ */
+#if IMXRT_IS_MIMXRT11xx
+uint32_t
+imx_ccm_sdhci_hz(void)
+{
+ /*
+ * We don't know which SDHCI is used. So just return the clock frequency
+ * of the first SDHCI and hope the best.
+ */
+ return CLOCK_GetRootClockFreq(kCLOCK_Root_Usdhc1);
+}
+#endif
+
/* Make sure to pull in the flash headers */
__attribute__((used)) static const void *hdr_dcd = &imxrt_dcd_data;
__attribute__((used)) static const void *hdr_ivt = &imxrt_image_vector_table;
diff --git a/bsps/arm/imxrt/start/bspstarthooks.c b/bsps/arm/imxrt/start/bspstarthooks.c
index b8149691e7..c10d0dbcfe 100644
--- a/bsps/arm/imxrt/start/bspstarthooks.c
+++ b/bsps/arm/imxrt/start/bspstarthooks.c
@@ -1,15 +1,28 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/*
- * Copyright (c) 2013, 2018 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2013-2023 embedded brains GmbH & Co. KG
*
- * embedded brains GmbH
- * Dornierstr. 4
- * 82178 Puchheim
- * Germany
- * <info@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/score/armv7m.h>
@@ -18,13 +31,10 @@
#include <imxrt/mpu-config.h>
#include <chip.h>
-#include <fsl_pin_mux.h>
#include <fsl_clock_config.h>
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
- /* FIXME: Initializing SDRAM is currently done by DCD. It would be more user
- * friendly if that would be done here with a readable structure. */
if ((SCB->CCR & SCB_CCR_IC_Msk) == 0) {
SCB_EnableICache();
}
@@ -33,7 +43,7 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
SCB_EnableDCache();
}
- _ARMV7M_MPU_Setup(imxrt_config_mpu_region, imxrt_config_mpu_region_count);
+ _ARMV7M_MPU_Setup(ARMV7M_MPU_CTRL_DEFAULT, imxrt_config_mpu_region, imxrt_config_mpu_region_count);
}
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
@@ -46,9 +56,11 @@ BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
BOARD_BootClockRUN();
BOARD_InitDEBUG_UARTPins();
+#if IMXRT_IS_MIMXRT10xx
/* Reduce frequency for I2C */
CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 5);
/* Enable EDMA clock. We initialize the EDMA so we need the clock. */
CLOCK_EnableClock(kCLOCK_Dma);
+#endif
}
diff --git a/bsps/arm/imxrt/start/clock-arm-pll-config.c b/bsps/arm/imxrt/start/clock-arm-pll-config.c
deleted file mode 100644
index 12ad1867eb..0000000000
--- a/bsps/arm/imxrt/start/clock-arm-pll-config.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: BSD-2-Clause */
-
-/*
- * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "fsl_clock_config.h"
-
-const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN = {
- .loopDivider = 100,
- .src = 0,
-};
diff --git a/bsps/arm/imxrt/start/flash-boot-data.c b/bsps/arm/imxrt/start/flash-boot-data.c
index a1877f4d26..2186fc08bf 100644
--- a/bsps/arm/imxrt/start/flash-boot-data.c
+++ b/bsps/arm/imxrt/start/flash-boot-data.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
- * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ * Copyright (C) 2020 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -30,7 +30,7 @@
#include <bspopts.h>
const BOOT_DATA_T imxrt_boot_data = {
- .start = (uint32_t) imxrt_memory_flash_config_begin,
+ .start = (uint32_t) imxrt_memory_flash_raw_begin,
.size = IMXRT_MEMORY_FLASH_SIZE,
.plugin = PLUGIN_FLAG,
.placeholder = 0xFFFFFFFF,
diff --git a/bsps/arm/imxrt/start/flash-flexspi-config.c b/bsps/arm/imxrt/start/flash-flexspi-config.c
deleted file mode 100644
index 50eca19b20..0000000000
--- a/bsps/arm/imxrt/start/flash-flexspi-config.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/* SPDX-License-Identifier: BSD-2-Clause */
-
-/*
- * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <bsp/flash-headers.h>
-#include <bspopts.h>
-
-const flexspi_nor_config_t imxrt_flexspi_config = {
- .memConfig = {
- .tag = FLEXSPI_CFG_BLK_TAG,
- .version = FLEXSPI_CFG_BLK_VERSION,
- .readSampleClkSrc = kFlexSPIReadSampleClk_ExternalInputFromDqsPad,
- .csHoldTime = 3u,
- .csSetupTime = 3u,
- .columnAddressWidth = 3u,
- .controllerMiscOption = (1 << kFlexSpiMiscOffset_DdrModeEnable) |
- (1 << kFlexSpiMiscOffset_WordAddressableEnable) |
- (1 << kFlexSpiMiscOffset_SafeConfigFreqEnable) |
- (1 << kFlexSpiMiscOffset_DiffClkEnable),
- .deviceType = kFlexSpiDeviceType_SerialRAM,
- .sflashPadType = kSerialFlash_8Pads,
- .serialClkFreq = kFlexSpiSerialClk_133MHz,
- .sflashA1Size = IMXRT_MEMORY_FLASH_SIZE,
- .dataValidTime = {16u, 16u},
- .lookupTable = {
- FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
- FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06),
- FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
- },
- .lutCustomSeq = {{0,0},{0,0},{0,0},{0,0},{0,0},{0,0},
- {0,0},{0,0},{0,0},{0,0},{0,0},{0,0}},
- },
- .pageSize = 0x200,
- .sectorSize = 0x40000,
- .blockSize = 0x40000,
- .isUniformBlockSize = 1,
-};
diff --git a/bsps/arm/imxrt/start/flash-ivt.c b/bsps/arm/imxrt/start/flash-ivt.c
index fd396d5e1a..be3ec402a8 100644
--- a/bsps/arm/imxrt/start/flash-ivt.c
+++ b/bsps/arm/imxrt/start/flash-ivt.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
- * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ * Copyright (C) 2020 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
diff --git a/bsps/arm/imxrt/start/imxrt-ffec-init.c b/bsps/arm/imxrt/start/imxrt-ffec-init.c
index 4b71944c00..c0a8e168e3 100644
--- a/bsps/arm/imxrt/start/imxrt-ffec-init.c
+++ b/bsps/arm/imxrt/start/imxrt-ffec-init.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
- * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ * Copyright (C) 2020 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -41,6 +41,7 @@ void imxrt_ffec_init(void)
fdt = bsp_fdt_get();
+#if IMXRT_IS_MIMXRT10xx
const clock_enet_pll_config_t config = {
.enableClkOutput = true,
.enableClkOutput25M = false,
@@ -49,7 +50,10 @@ void imxrt_ffec_init(void)
CLOCK_InitEnetPll(&config);
- iomuxc_gpr->GPR1 |= IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK;
+ iomuxc_gpr->GPR1 |= IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK;
+#else
+ iomuxc_gpr->GPR4 |= IOMUXC_GPR_GPR4_ENET_REF_CLK_DIR_MASK;
+#endif
node = fdt_node_offset_by_compatible(fdt, -1, "fsl,imxrt-fec");
if (node >= 0) {
diff --git a/bsps/arm/imxrt/start/mpu-config.c b/bsps/arm/imxrt/start/mpu-config.c
index 79800ac431..93a4cb08e4 100644
--- a/bsps/arm/imxrt/start/mpu-config.c
+++ b/bsps/arm/imxrt/start/mpu-config.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
- * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ * Copyright (C) 2020 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -44,8 +44,8 @@ BSP_START_DATA_SECTION const ARMV7M_MPU_Region_config
| ARMV7M_MPU_RASR_TEX(0x1) | ARMV7M_MPU_RASR_C | ARMV7M_MPU_RASR_B
| ARMV7M_MPU_RASR_ENABLE,
}, {
- .begin = imxrt_memory_flash_config_begin,
- .end = imxrt_memory_flash_end,
+ .begin = imxrt_memory_flash_raw_begin,
+ .end = imxrt_memory_flash_raw_end,
.rasr = ARMV7M_MPU_RASR_AP(0x3)
| ARMV7M_MPU_RASR_TEX(0x1) | ARMV7M_MPU_RASR_C | ARMV7M_MPU_RASR_B
| ARMV7M_MPU_RASR_ENABLE,
@@ -53,13 +53,13 @@ BSP_START_DATA_SECTION const ARMV7M_MPU_Region_config
.begin = imxrt_memory_extram_nocache_begin,
.end = imxrt_memory_extram_nocache_end,
.rasr = ARMV7M_MPU_RASR_AP(0x3)
- | ARMV7M_MPU_RASR_TEX(0x2)
+ | ARMV7M_MPU_RASR_TEX(0x1)
| ARMV7M_MPU_RASR_ENABLE,
}, {
.begin = imxrt_memory_ocram_nocache_begin,
.end = imxrt_memory_ocram_nocache_end,
.rasr = ARMV7M_MPU_RASR_AP(0x3)
- | ARMV7M_MPU_RASR_TEX(0x2)
+ | ARMV7M_MPU_RASR_TEX(0x1)
| ARMV7M_MPU_RASR_ENABLE,
}, {
.begin = imxrt_memory_peripheral_begin,
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-01 07:59:25 +0000