1 files changed, 47 insertions, 0 deletions
diff --git a/bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/fsl_device_registers.h b/bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/fsl_device_registers.h
new file mode 100644
index 0000000000..4508d6634f
--- /dev/null
+++ b/bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/fsl_device_registers.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright 2014-2016 Freescale Semiconductor, Inc.
+ * Copyright 2016-2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef __FSL_DEVICE_REGISTERS_H__
+#define __FSL_DEVICE_REGISTERS_H__
+
+#ifdef __rtems__
+#include <bspopts.h>
+#endif /* __rtems__ */
+/*
+ * Include the cpu specific register header files.
+ *
+ * The CPU macro should be declared in the project or makefile.
+ */
+#if (defined(CPU_MIMXRT1166CVM5A_cm7) || defined(CPU_MIMXRT1166DVM6A_cm7) || defined(CPU_MIMXRT1166XVM5A_cm7))
+
+#define MIMXRT1166_cm7_SERIES
+
+/* CMSIS-style register definitions */
+#include "MIMXRT1166_cm7.h"
+/* CPU specific feature definitions */
+#include "MIMXRT1166_cm7_features.h"
+
+#elif (defined(CPU_MIMXRT1166CVM5A_cm4) || defined(CPU_MIMXRT1166DVM6A_cm4) || defined(CPU_MIMXRT1166XVM5A_cm4))
+
+#define MIMXRT1166_cm4_SERIES
+
+/* CMSIS-style register definitions */
+#include "MIMXRT1166_cm4.h"
+/* CPU specific feature definitions */
+#include "MIMXRT1166_cm4_features.h"
+
+#else
+    #error "No valid CPU defined!"
+#endif
+
+#endif /* __FSL_DEVICE_REGISTERS_H__ */
+
+/*******************************************************************************
+ * EOF
+ ******************************************************************************/