summaryrefslogtreecommitdiffstats
path: root/bsps/aarch64/include/dev/irq/arm-gic-arch.h
diff options
context:
space:
mode:
Diffstat (limited to '')
-rw-r--r--bsps/aarch64/include/dev/irq/arm-gic-arch.h29
1 files changed, 22 insertions, 7 deletions
diff --git a/bsps/aarch64/include/dev/irq/arm-gic-arch.h b/bsps/aarch64/include/dev/irq/arm-gic-arch.h
index 0911320851..5ca2c7314e 100644
--- a/bsps/aarch64/include/dev/irq/arm-gic-arch.h
+++ b/bsps/aarch64/include/dev/irq/arm-gic-arch.h
@@ -3,9 +3,10 @@
/**
* @file
*
- * @ingroup RTEMSBSPsAArch64Shared
+ * @ingroup DevIRQGIC
*
- * @brief AArch64-specific ARM GICv3 handlers.
+ * @brief This header file provides interfaces of the ARM Generic Interrupt
+ * Controller (GIC) support specific to the AArch64 architecture.
*/
/*
@@ -46,12 +47,24 @@
extern "C" {
#endif
-static inline void arm_interrupt_handler_dispatch(rtems_vector_number vector)
+/**
+ * @addtogroup DevIRQGIC
+ *
+ * @{
+ */
+
+static inline uint32_t arm_interrupt_enable_interrupts(void)
{
- uint32_t interrupt_level = _CPU_ISR_Get_level();
- AArch64_interrupt_enable(1);
- bsp_interrupt_handler_dispatch(vector);
- _CPU_ISR_Set_level(interrupt_level);
+ uint32_t status = _CPU_ISR_Get_level();
+ /* Enable interrupts for nesting */
+ _CPU_ISR_Set_level(0);
+ return status;
+}
+
+static inline void arm_interrupt_restore_interrupts(uint32_t status)
+{
+ /* Restore interrupts to previous level */
+ _CPU_ISR_Set_level(status);
}
static inline void arm_interrupt_facility_set_exception_handler(void)
@@ -66,6 +79,8 @@ static inline void arm_interrupt_facility_set_exception_handler(void)
);
}
+/** @} */
+
#ifdef __cplusplus
}
#endif