diff options
Diffstat (limited to '')
| -rw-r--r-- | bsps/aarch64/include/bsp/aarch64-mmu.h | 34 |
1 files changed, 22 insertions, 12 deletions
diff --git a/bsps/aarch64/include/bsp/aarch64-mmu.h b/bsps/aarch64/include/bsp/aarch64-mmu.h index 1287c67016..8c69705230 100644 --- a/bsps/aarch64/include/bsp/aarch64-mmu.h +++ b/bsps/aarch64/include/bsp/aarch64-mmu.h @@ -243,26 +243,29 @@ BSP_START_TEXT_SECTION static inline rtems_status_code aarch64_mmu_map_block( /* check for perfect block match */ if ( block_bottom == addr ) { if ( size >= chunk_size ) { - /* when page_flag is set the last level must be a page descriptor */ - if ( page_flag || ( page_table[index] & MMU_DESC_TYPE_TABLE ) != MMU_DESC_TYPE_TABLE ) { - /* no sub-table, apply block properties */ - page_table[index] = addr | flags | page_flag; - size -= chunk_size; - addr += chunk_size; - continue; + /* level -1 can't contain block descriptors, fall through to subtable */ + if ( level != -1 ) { + /* when page_flag is set the last level must be a page descriptor */ + if ( page_flag || ( page_table[index] & MMU_DESC_TYPE_TABLE ) != MMU_DESC_TYPE_TABLE ) { + /* no sub-table, apply block properties */ + page_table[index] = addr | flags | page_flag; + size -= chunk_size; + addr += chunk_size; + continue; + } } } else { /* block starts on a boundary, but is short */ chunk_size = size; - /* it isn't possible to go beyond page table level 2 */ - if ( page_flag ) { + /* it isn't possible to go beyond page table level 2 */ + if ( page_flag ) { /* no sub-table, apply block properties */ page_table[index] = addr | flags | page_flag; size -= chunk_size; addr += chunk_size; continue; - } + } } } else { uintptr_t block_top = RTEMS_ALIGN_UP( addr, granularity ); @@ -417,7 +420,13 @@ aarch64_mmu_disable( void ) { uint64_t sctlr; - /* Enable MMU and cache */ + /* + * Flush data cache before disabling the MMU. While the MMU is disabled, all + * accesses are treated as uncached device memory. + */ + rtems_cache_flush_entire_data(); + + /* Disable MMU */ sctlr = _AArch64_Read_sctlr_el1(); sctlr &= ~(AARCH64_SCTLR_EL1_M); _AArch64_Write_sctlr_el1( sctlr ); @@ -430,7 +439,8 @@ BSP_START_TEXT_SECTION static inline void aarch64_mmu_setup( void ) _AArch64_Write_tcr_el1( AARCH64_TCR_EL1_T0SZ( 0x10 ) | AARCH64_TCR_EL1_IRGN0( 0x1 ) | AARCH64_TCR_EL1_ORGN0( 0x1 ) | AARCH64_TCR_EL1_SH0( 0x3 ) | - AARCH64_TCR_EL1_TG0( 0x0 ) | AARCH64_TCR_EL1_IPS( 0x5ULL ) + AARCH64_TCR_EL1_TG0( 0x0 ) | AARCH64_TCR_EL1_IPS( 0x5ULL ) | + AARCH64_TCR_EL1_EPD1 ); /* Set MAIR */ |