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-rw-r--r--ChangeLog7
-rw-r--r--README.configure2
-rw-r--r--aclocal/bsp-alias.m41
-rw-r--r--aclocal/check-bsps.m41
-rw-r--r--c/src/ChangeLog3
-rw-r--r--c/src/lib/libbsp/powerpc/ChangeLog7
-rw-r--r--c/src/lib/libbsp/powerpc/acinclude.m42
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/Makefile.am108
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/Makefile.in1233
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/aclocal.m4935
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/bsp_specs15
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/configure.ac36
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/console/config.c131
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/console/console.c340
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/console/console.h38
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.c67
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.h57
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h220
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/include/bspopts.h.in24
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/include/coverhd.h113
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h63
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/irq/ipic.c394
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/irq/irq.h149
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/irq/irq_init.c413
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/network/network.c103
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/preinstall.am79
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/start/start.S371
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c267
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c216
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc8349eamds324
-rw-r--r--c/src/lib/libbsp/powerpc/gen83xx/startup/mpc83xx_regs.c28
-rw-r--r--c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S18
-rw-r--r--c/src/lib/libbsp/powerpc/shared/vectors/vectors.h10
-rw-r--r--c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c5
-rw-r--r--c/src/lib/libbsp/powerpc/virtex/.cvsignore12
-rw-r--r--c/src/lib/libbsp/powerpc/virtex/ChangeLog4
-rw-r--r--c/src/lib/libbsp/powerpc/virtex/Makefile.am24
-rw-r--r--c/src/lib/libbsp/powerpc/virtex/bsp_specs6
-rw-r--r--c/src/lib/libbsp/powerpc/virtex/preinstall.am62
-rw-r--r--c/src/lib/libbsp/powerpc/virtex/startup/linkcmds302
-rw-r--r--c/src/lib/libbsp/powerpc/virtex/startup/linkcmds.dl154
-rw-r--r--c/src/lib/libcpu/powerpc/ChangeLog6
-rw-r--r--c/src/lib/libcpu/powerpc/Makefile.am12
-rw-r--r--c/src/lib/libcpu/powerpc/configure.ac7
-rw-r--r--c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h1128
-rw-r--r--c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.c1930
-rw-r--r--c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.h82
-rw-r--r--c/src/lib/libcpu/powerpc/preinstall.am14
-rw-r--r--c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h3
-rw-r--r--c/src/lib/libcpu/powerpc/shared/src/cache.c95
-rw-r--r--c/src/lib/libcpu/powerpc/shared/src/cache_.h14
-rw-r--r--c/src/libchip/ide/ata.c2
-rw-r--r--c/src/libchip/serial/ns16550.c2
-rw-r--r--cpukit/score/cpu/powerpc/rtems/score/powerpc.h2
-rw-r--r--make/ChangeLog5
-rw-r--r--make/custom/gen83xx.cfg39
-rw-r--r--make/custom/mpc8349eamds.cfg16
57 files changed, 9389 insertions, 312 deletions
diff --git a/ChangeLog b/ChangeLog
index 4e4de4e817..69c5e7b4ec 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,11 @@
+2007-07-09 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
+
+ * aclocal/bsp-alias.m4, aclocal/check-bsps.m4, README.configure:
+ Add gen83xx and mpc8349eamds BSP
+
2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
- * :README.configure: Add virtex BSP
+ * README.configure: Add virtex BSP
2007-06-20 Joel Sherrill <joel.sherrill@oarcorp.com>
diff --git a/README.configure b/README.configure
index 8aa150fa81..abc85e05af 100644
--- a/README.configure
+++ b/README.configure
@@ -203,7 +203,7 @@ powerpc : psim score603e mcp750 mvme2100 mvme2307 mpc8260ads ss555
mvme5500 ep1a pm520_cr825 pm520_ze30 gen405 helas403
mbx821_001 mbx821_002 mbx821_002b mbx860_001b
mbx860_002 mbx860_005b mtx603e brs5l gen5200 ep5200
- virtex
+ virtex gen83xx mpc8349eamds
NOTE: The "motorola_powerpc" BSP is a single BSP which
can be conditionally compiled to support most Motorola
diff --git a/aclocal/bsp-alias.m4 b/aclocal/bsp-alias.m4
index d0b5f1bb08..290be771cf 100644
--- a/aclocal/bsp-alias.m4
+++ b/aclocal/bsp-alias.m4
@@ -26,6 +26,7 @@ AC_DEFUN([_RTEMS_BSP_ALIAS],
brs5l*) $2=gen5200 ;; # MPC5200 based board
pm520*) $2=gen5200 ;; # MPC5200 based board
ep5200*) $2=gen5200 ;; # MPC5200 based board
+ mpc8349eamds) $2=gen83xx ;; # MPC8349 based board
simcpu32) $2=sim68000 ;; # BSVC CPU32 variant
simsh7032) $2=shsim ;; # SH7032 simulator
simsh7045) $2=shsim ;; # SH7045 simulator
diff --git a/aclocal/check-bsps.m4 b/aclocal/check-bsps.m4
index 3a8de4303f..8a867b7de7 100644
--- a/aclocal/check-bsps.m4
+++ b/aclocal/check-bsps.m4
@@ -26,6 +26,7 @@ AC_MSG_CHECKING([for available BSPs])
bsps="$bsps mbx860_005b"
;;
gen5200) bsps="pm520_cr825 pm520_ze30 brs5l";;
+ gen83xx) bsps="mpc8349eamds";;
motorola_powerpc) bsps="mvme2307 mcp750 mtx603e mvme2100";;
pc386) bsps="pc386 pc386dx pc486 pc586 pc686 pck6";;
erc32) bsps="erc32 sis";;
diff --git a/c/src/ChangeLog b/c/src/ChangeLog
index c8eb7fad81..fdc8466b5c 100644
--- a/c/src/ChangeLog
+++ b/c/src/ChangeLog
@@ -1,3 +1,6 @@
+2007-07-09 Thomas Doerfler (Thomas.Doerfler@embedded-brains.de>:
+ * libchip/ide/ata.c: fixed warning
+
2007-06-20 Ray Xu <rayx@gmail.com>
* optman/Makefile.am, optman/preinstall.am: Add stubs for file system,
diff --git a/c/src/lib/libbsp/powerpc/ChangeLog b/c/src/lib/libbsp/powerpc/ChangeLog
index 9f8dc5807b..098d0f8c0f 100644
--- a/c/src/lib/libbsp/powerpc/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/ChangeLog
@@ -1,3 +1,8 @@
+2007-07-09 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
+
+ * acinclude.m4, gen83xx/:
+ added support for MPC83xx controllers and MPC8349EAMDS board
+
2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* acinclude.m4, shared/irq/irq_asm.S, shared/irq/irq.c,
@@ -8,7 +13,7 @@
2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
- * vitex/:
+ * virtex/:
integrated "virtex" BSP to support PPC core implemented in a
Xilinx virtex FPGA
diff --git a/c/src/lib/libbsp/powerpc/acinclude.m4 b/c/src/lib/libbsp/powerpc/acinclude.m4
index 7461b62eb2..7c9ddcfd00 100644
--- a/c/src/lib/libbsp/powerpc/acinclude.m4
+++ b/c/src/lib/libbsp/powerpc/acinclude.m4
@@ -8,6 +8,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
AC_CONFIG_SUBDIRS([gen405]);;
gen5200 )
AC_CONFIG_SUBDIRS([gen5200]);;
+ gen83xx )
+ AC_CONFIG_SUBDIRS([gen83xx]);;
helas403 )
AC_CONFIG_SUBDIRS([helas403]);;
mbx8xx )
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/Makefile.am b/c/src/lib/libbsp/powerpc/gen83xx/Makefile.am
new file mode 100644
index 0000000000..072b9ffdc5
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/Makefile.am
@@ -0,0 +1,108 @@
+##
+## $Id$
+##
+
+ACLOCAL_AMFLAGS = -I ../../../../aclocal
+
+include $(top_srcdir)/../../../../automake/compile.am
+include $(top_srcdir)/../../bsp.am
+
+dist_project_lib_DATA = bsp_specs
+
+include_HEADERS = include/bsp.h
+include_HEADERS += include/tm27.h
+
+nodist_include_HEADERS = include/bspopts.h
+DISTCLEANFILES = include/bspopts.h
+
+noinst_PROGRAMS =
+
+include_bspdir = $(includedir)/bsp
+
+include_HEADERS += include/coverhd.h
+
+nodist_include_HEADERS += ../../shared/tod.h
+
+EXTRA_DIST = start/start.S
+start.$(OBJEXT): start/start.S
+ $(CPPASCOMPILE) -o $@ -c $<
+project_lib_DATA = start.$(OBJEXT)
+
+EXTRA_DIST += ../../powerpc/shared/start/rtems_crti.S
+rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S
+ $(CPPASCOMPILE) -o $@ -c $<
+project_lib_DATA += rtems_crti.$(OBJEXT)
+
+dist_project_lib_DATA += startup/linkcmds.mpc8349eamds
+
+noinst_PROGRAMS += mpc83xx_regs.rel
+mpc83xx_regs_rel_SOURCES = startup/mpc83xx_regs.c
+mpc83xx_regs_rel_CPPFLAGS = $(AM_CPPFLAGS)
+mpc83xx_regs_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+
+noinst_PROGRAMS += startup.rel
+startup_rel_SOURCES = ../../shared/bspclean.c ../../shared/bsplibc.c \
+ ../../shared/bsppost.c startup/bspstart.c ../../shared/bootcard.c \
+ ../../shared/sbrk.c \
+ ../../shared/gnatinstallhandler.c startup/cpuinit.c
+
+startup_rel_CPPFLAGS = $(AM_CPPFLAGS)
+startup_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+
+noinst_PROGRAMS += pclock.rel
+pclock_rel_SOURCES = ../../powerpc/shared/clock/p_clock.c
+pclock_rel_CPPFLAGS = $(AM_CPPFLAGS)
+pclock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+
+include_bsp_HEADERS = ./irq/irq.h\
+ ../../powerpc/shared/vectors/vectors.h
+
+noinst_PROGRAMS += vectors.rel
+vectors_rel_SOURCES = ../../powerpc/shared/vectors/vectors.h \
+ ../../powerpc/shared/vectors/vectors_init.c \
+ ../../powerpc/shared/vectors/vectors.S
+vectors_rel_CPPFLAGS = $(AM_CPPFLAGS)
+vectors_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+
+noinst_PROGRAMS += irq.rel
+irq_rel_SOURCES = ./irq/irq.h \
+ ./irq/irq_init.c \
+ ./irq/ipic.c \
+ ../shared/irq/irq_asm.S
+
+irq_rel_CPPFLAGS = $(AM_CPPFLAGS)
+irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+
+noinst_PROGRAMS += console.rel
+console_rel_SOURCES = console/console.c console/ns16550cfg.c
+console_rel_CPPFLAGS = $(AM_CPPFLAGS)
+console_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+
+noinst_PROGRAMS += network.rel
+network_rel_SOURCES = network/network.c
+network_rel_CPPFLAGS = $(AM_CPPFLAGS)
+network_rel_CPPFLAGS += -D__INSIDE_RTEMS_BSD_TCPIP_STACK__ -D__BSD_VISIBLE
+
+network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+
+noinst_LIBRARIES = libbsp.a
+libbsp_a_SOURCES =
+libbsp_a_LIBADD = startup.rel pclock.rel console.rel \
+ vectors.rel irq.rel mpc83xx_regs.rel
+libbsp_a_LIBADD += network.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
+ ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
+ ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
+ ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc83xx/tsec.rel
+
+EXTRA_DIST += README.mpc8349eamds
+EXTRA_DIST += times.mpc8349eamds
+
+include $(srcdir)/preinstall.am
+include $(top_srcdir)/../../../../automake/local.am
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/Makefile.in b/c/src/lib/libbsp/powerpc/gen83xx/Makefile.in
new file mode 100644
index 0000000000..9512c65d25
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/Makefile.in
@@ -0,0 +1,1233 @@
+# Makefile.in generated by automake 1.10 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+
+
+
+VPATH = @srcdir@
+pkgdatadir = $(datadir)/@PACKAGE@
+pkglibdir = $(libdir)/@PACKAGE@
+pkgincludedir = $(includedir)/@PACKAGE@
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
+install_sh_PROGRAM = $(install_sh) -c
+install_sh_SCRIPT = $(install_sh) -c
+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+build_triplet = @build@
+host_triplet = @host@
+DIST_COMMON = $(am__configure_deps) $(dist_project_lib_DATA) \
+ $(include_HEADERS) $(include_bsp_HEADERS) \
+ $(srcdir)/../../../../../../config.guess \
+ $(srcdir)/../../../../../../config.sub \
+ $(srcdir)/../../../../../../depcomp \
+ $(srcdir)/../../../../../../install-sh \
+ $(srcdir)/../../../../../../missing $(srcdir)/Makefile.am \
+ $(srcdir)/Makefile.in $(srcdir)/preinstall.am \
+ $(top_srcdir)/../../../../automake/compile.am \
+ $(top_srcdir)/../../../../automake/local.am \
+ $(top_srcdir)/../../bsp.am $(top_srcdir)/configure \
+ $(top_srcdir)/include/bspopts.h.in ../../../../../../COPYING \
+ ../../../../../../ChangeLog ../../../../../../INSTALL \
+ ../../../../../../README ../../../../../../compile \
+ ../../../../../../config.guess ../../../../../../config.sub \
+ ../../../../../../depcomp ../../../../../../install-sh \
+ ../../../../../../mdate-sh ../../../../../../missing \
+ ../../../../../../texinfo.tex
+noinst_PROGRAMS = mpc83xx_regs.rel$(EXEEXT) startup.rel$(EXEEXT) \
+ pclock.rel$(EXEEXT) vectors.rel$(EXEEXT) irq.rel$(EXEEXT) \
+ console.rel$(EXEEXT) network.rel$(EXEEXT)
+subdir = .
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
+am__aclocal_m4_deps = \
+ $(top_srcdir)/../../../../aclocal/bsp-configure.m4 \
+ $(top_srcdir)/../../../../aclocal/bspopts.m4 \
+ $(top_srcdir)/../../../../aclocal/canonical-target-name.m4 \
+ $(top_srcdir)/../../../../aclocal/canonicalize-tools.m4 \
+ $(top_srcdir)/../../../../aclocal/check-custom-bsp.m4 \
+ $(top_srcdir)/../../../../aclocal/check-multiprocessing.m4 \
+ $(top_srcdir)/../../../../aclocal/check-networking.m4 \
+ $(top_srcdir)/../../../../aclocal/check-tool.m4 \
+ $(top_srcdir)/../../../../aclocal/enable-multiprocessing.m4 \
+ $(top_srcdir)/../../../../aclocal/enable-networking.m4 \
+ $(top_srcdir)/../../../../aclocal/env-rtemsbsp.m4 \
+ $(top_srcdir)/../../../../aclocal/gcc-isystem.m4 \
+ $(top_srcdir)/../../../../aclocal/gcc-pipe.m4 \
+ $(top_srcdir)/../../../../aclocal/gcc-specs.m4 \
+ $(top_srcdir)/../../../../aclocal/multilib.m4 \
+ $(top_srcdir)/../../../../aclocal/ppc.m4 \
+ $(top_srcdir)/../../../../aclocal/prog-cc.m4 \
+ $(top_srcdir)/../../../../aclocal/prog-ccas.m4 \
+ $(top_srcdir)/../../../../aclocal/project-root.m4 \
+ $(top_srcdir)/../../../../aclocal/rtems-ampolish.m4 \
+ $(top_srcdir)/../../../../aclocal/rtems-top.m4 \
+ $(top_srcdir)/../../../../aclocal/version.m4 \
+ $(top_srcdir)/configure.ac
+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
+ $(ACLOCAL_M4)
+am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
+ configure.lineno config.status.lineno
+mkinstalldirs = $(install_sh) -d
+CONFIG_HEADER = $(top_builddir)/include/bspopts.tmp
+CONFIG_CLEAN_FILES =
+LIBRARIES = $(noinst_LIBRARIES)
+ARFLAGS = cru
+libbsp_a_AR = $(AR) $(ARFLAGS)
+libbsp_a_DEPENDENCIES = startup.rel pclock.rel console.rel vectors.rel \
+ irq.rel mpc83xx_regs.rel network.rel \
+ ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
+ ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
+ ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
+ ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc83xx/tsec.rel
+am_libbsp_a_OBJECTS =
+libbsp_a_OBJECTS = $(am_libbsp_a_OBJECTS)
+PROGRAMS = $(noinst_PROGRAMS)
+am_console_rel_OBJECTS = console_rel-console.$(OBJEXT) \
+ console_rel-ns16550cfg.$(OBJEXT)
+console_rel_OBJECTS = $(am_console_rel_OBJECTS)
+console_rel_LDADD = $(LDADD)
+console_rel_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
+ $(console_rel_LDFLAGS) $(LDFLAGS) -o $@
+am_irq_rel_OBJECTS = irq_rel-irq_init.$(OBJEXT) irq_rel-ipic.$(OBJEXT) \
+ irq_rel-irq_asm.$(OBJEXT)
+irq_rel_OBJECTS = $(am_irq_rel_OBJECTS)
+irq_rel_LDADD = $(LDADD)
+irq_rel_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(irq_rel_LDFLAGS) \
+ $(LDFLAGS) -o $@
+am_mpc83xx_regs_rel_OBJECTS = mpc83xx_regs_rel-mpc83xx_regs.$(OBJEXT)
+mpc83xx_regs_rel_OBJECTS = $(am_mpc83xx_regs_rel_OBJECTS)
+mpc83xx_regs_rel_LDADD = $(LDADD)
+mpc83xx_regs_rel_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
+ $(mpc83xx_regs_rel_LDFLAGS) $(LDFLAGS) -o $@
+am_network_rel_OBJECTS = network_rel-network.$(OBJEXT)
+network_rel_OBJECTS = $(am_network_rel_OBJECTS)
+network_rel_LDADD = $(LDADD)
+network_rel_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
+ $(network_rel_LDFLAGS) $(LDFLAGS) -o $@
+am_pclock_rel_OBJECTS = pclock_rel-p_clock.$(OBJEXT)
+pclock_rel_OBJECTS = $(am_pclock_rel_OBJECTS)
+pclock_rel_LDADD = $(LDADD)
+pclock_rel_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(pclock_rel_LDFLAGS) \
+ $(LDFLAGS) -o $@
+am_startup_rel_OBJECTS = startup_rel-bspclean.$(OBJEXT) \
+ startup_rel-bsplibc.$(OBJEXT) startup_rel-bsppost.$(OBJEXT) \
+ startup_rel-bspstart.$(OBJEXT) startup_rel-bootcard.$(OBJEXT) \
+ startup_rel-sbrk.$(OBJEXT) \
+ startup_rel-gnatinstallhandler.$(OBJEXT) \
+ startup_rel-cpuinit.$(OBJEXT)
+startup_rel_OBJECTS = $(am_startup_rel_OBJECTS)
+startup_rel_LDADD = $(LDADD)
+startup_rel_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
+ $(startup_rel_LDFLAGS) $(LDFLAGS) -o $@
+am_vectors_rel_OBJECTS = vectors_rel-vectors_init.$(OBJEXT) \
+ vectors_rel-vectors.$(OBJEXT)
+vectors_rel_OBJECTS = $(am_vectors_rel_OBJECTS)
+vectors_rel_LDADD = $(LDADD)
+vectors_rel_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
+ $(vectors_rel_LDFLAGS) $(LDFLAGS) -o $@
+DEFAULT_INCLUDES =
+depcomp = $(SHELL) $(top_srcdir)/../../../../../../depcomp
+am__depfiles_maybe = depfiles
+COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
+ $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+CCLD = $(CC)
+LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) -o $@
+SOURCES = $(libbsp_a_SOURCES) $(console_rel_SOURCES) \
+ $(irq_rel_SOURCES) $(mpc83xx_regs_rel_SOURCES) \
+ $(network_rel_SOURCES) $(pclock_rel_SOURCES) \
+ $(startup_rel_SOURCES) $(vectors_rel_SOURCES)
+DIST_SOURCES = $(libbsp_a_SOURCES) $(console_rel_SOURCES) \
+ $(irq_rel_SOURCES) $(mpc83xx_regs_rel_SOURCES) \
+ $(network_rel_SOURCES) $(pclock_rel_SOURCES) \
+ $(startup_rel_SOURCES) $(vectors_rel_SOURCES)
+am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
+am__vpath_adj = case $$p in \
+ $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
+ *) f=$$p;; \
+ esac;
+am__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
+am__installdirs = "$(DESTDIR)$(project_libdir)" \
+ "$(DESTDIR)$(project_libdir)" "$(DESTDIR)$(includedir)" \
+ "$(DESTDIR)$(include_bspdir)" "$(DESTDIR)$(includedir)"
+dist_project_libDATA_INSTALL = $(INSTALL_DATA)
+project_libDATA_INSTALL = $(INSTALL_DATA)
+DATA = $(dist_project_lib_DATA) $(project_lib_DATA)
+includeHEADERS_INSTALL = $(INSTALL_HEADER)
+include_bspHEADERS_INSTALL = $(INSTALL_HEADER)
+nodist_includeHEADERS_INSTALL = $(INSTALL_HEADER)
+HEADERS = $(include_HEADERS) $(include_bsp_HEADERS) \
+ $(nodist_include_HEADERS)
+ETAGS = etags
+CTAGS = ctags
+DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST)
+distdir = $(PACKAGE)-$(VERSION)
+top_distdir = $(distdir)
+am__remove_distdir = \
+ { test ! -d $(distdir) \
+ || { find $(distdir) -type d ! -perm -200 -exec chmod u+w {} ';' \
+ && rm -fr $(distdir); }; }
+DIST_ARCHIVES = $(distdir).tar.gz
+GZIP_ENV = --best
+distuninstallcheck_listfiles = find . -type f -print
+distcleancheck_listfiles = find . -type f -print
+ACLOCAL = @ACLOCAL@
+AMPOLISH3 = @AMPOLISH3@
+AMTAR = @AMTAR@
+AR = @AR@
+AS = @AS@
+AUTOCONF = @AUTOCONF@
+AUTOHEADER = @AUTOHEADER@
+AUTOMAKE = @AUTOMAKE@
+AWK = @AWK@
+CC = @CC@ $(GCCSPECS)
+CCAS = @CCAS@ $(GCCSPECS)
+CCASDEPMODE = @CCASDEPMODE@
+CCASFLAGS = @CCASFLAGS@
+CCDEPMODE = @CCDEPMODE@
+CFLAGS = @CFLAGS@
+CPP = @CPP@ $(GCCSPECS)
+CPPFLAGS = @CPPFLAGS@
+CYGPATH_W = @CYGPATH_W@
+DEFS = @DEFS@
+DEPDIR = @DEPDIR@
+ECHO_C = @ECHO_C@
+ECHO_N = @ECHO_N@
+ECHO_T = @ECHO_T@
+EXEEXT = @EXEEXT@
+GCCSPECS = @GCCSPECS@
+HAS_NETWORKING = @HAS_NETWORKING@
+INSTALL = @INSTALL@
+INSTALL_DATA = @INSTALL_DATA@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_SCRIPT = @INSTALL_SCRIPT@
+INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
+LD = @LD@
+LDFLAGS = @LDFLAGS@
+LIBOBJS = @LIBOBJS@
+LIBS = @LIBS@
+LTLIBOBJS = @LTLIBOBJS@
+MAINT = @MAINT@
+MAKE = @MAKE@
+MAKEINFO = @MAKEINFO@
+MKDIR_P = @MKDIR_P@
+OBJEXT = @OBJEXT@
+PACKAGE = @PACKAGE@
+PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
+PACKAGE_NAME = @PACKAGE_NAME@
+PACKAGE_STRING = @PACKAGE_STRING@
+PACKAGE_TARNAME = @PACKAGE_TARNAME@
+PACKAGE_VERSION = @PACKAGE_VERSION@
+PATH_SEPARATOR = @PATH_SEPARATOR@
+PERL = @PERL@
+PROJECT_INCLUDE = @PROJECT_INCLUDE@
+PROJECT_LIB = @PROJECT_LIB@
+PROJECT_RELEASE = @PROJECT_RELEASE@
+PROJECT_ROOT = @PROJECT_ROOT@
+PROJECT_TOPdir = @PROJECT_TOPdir@
+RANLIB = @RANLIB@
+RTEMS_BSP = @RTEMS_BSP@
+RTEMS_BSP_FAMILY = @RTEMS_BSP_FAMILY@
+RTEMS_CCASFLAGS = @RTEMS_CCASFLAGS@
+RTEMS_CFLAGS = @RTEMS_CFLAGS@
+RTEMS_CPPFLAGS = @RTEMS_CPPFLAGS@
+RTEMS_CPU = @RTEMS_CPU@
+RTEMS_CPU_MODEL = @RTEMS_CPU_MODEL@
+RTEMS_HAS_NETWORKING = @RTEMS_HAS_NETWORKING@
+RTEMS_HOST = @RTEMS_HOST@
+RTEMS_RELLDFLAGS = @RTEMS_RELLDFLAGS@
+RTEMS_TOPdir = @RTEMS_TOPdir@
+SET_MAKE = @SET_MAKE@
+SHELL = @SHELL@
+STRIP = @STRIP@
+VERSION = @VERSION@
+abs_builddir = @abs_builddir@
+abs_srcdir = @abs_srcdir@
+abs_top_builddir = @abs_top_builddir@
+abs_top_srcdir = @abs_top_srcdir@
+ac_ct_CC = @ac_ct_CC@
+am__include = @am__include@
+am__leading_dot = @am__leading_dot@
+am__quote = @am__quote@
+am__tar = @am__tar@
+am__untar = @am__untar@
+bindir = @bindir@
+build = @build@
+build_alias = @build_alias@
+build_cpu = @build_cpu@
+build_os = @build_os@
+build_vendor = @build_vendor@
+builddir = @builddir@
+datadir = @datadir@
+datarootdir = @datarootdir@
+dirstamp = @dirstamp@
+docdir = @docdir@
+dvidir = @dvidir@
+exceptions = @exceptions@
+exec_prefix = @exec_prefix@
+host = @host@
+host_alias = @host_alias@
+host_cpu = @host_cpu@
+host_os = @host_os@
+host_vendor = @host_vendor@
+htmldir = @htmldir@
+includedir = @includedir@
+infodir = @infodir@
+install_sh = @install_sh@
+libdir = @libdir@
+libexecdir = @libexecdir@
+localedir = @localedir@
+localstatedir = @localstatedir@
+mandir = @mandir@
+mkdir_p = @mkdir_p@
+oldincludedir = @oldincludedir@
+pdfdir = @pdfdir@
+prefix = @prefix@
+program_transform_name = @program_transform_name@
+project_includedir = @project_includedir@
+project_libdir = @project_libdir@
+psdir = @psdir@
+sbindir = @sbindir@
+sharedstatedir = @sharedstatedir@
+srcdir = @srcdir@
+sysconfdir = @sysconfdir@
+target_alias = @target_alias@
+top_builddir = @top_builddir@
+top_srcdir = @top_srcdir@
+ACLOCAL_AMFLAGS = -I ../../../../aclocal
+CXX = @CXX@ $(GCCSPECS)
+AM_CPPFLAGS = @RTEMS_CPPFLAGS@
+AM_CFLAGS = @RTEMS_CFLAGS@
+AM_CXXFLAGS = @RTEMS_CFLAGS@
+AM_CCASFLAGS = @RTEMS_CCASFLAGS@
+
+# to be able to use it for compilation of *.S even if automake
+# doesn't generate this variable. (automake-1.8.2+ only generates
+# this rule if *_SOURCES contain *.S.)
+CPPASCOMPILE = $(CCAS) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS)
+dist_project_lib_DATA = bsp_specs startup/linkcmds.mpc8349eamds
+include_HEADERS = include/bsp.h include/tm27.h include/coverhd.h
+nodist_include_HEADERS = include/bspopts.h ../../shared/tod.h
+DISTCLEANFILES = include/bspopts.h $(PREINSTALL_DIRS)
+include_bspdir = $(includedir)/bsp
+EXTRA_DIST = start/start.S ../../powerpc/shared/start/rtems_crti.S \
+ README.mpc8349eamds times.mpc8349eamds
+project_lib_DATA = start.$(OBJEXT) rtems_crti.$(OBJEXT)
+mpc83xx_regs_rel_SOURCES = startup/mpc83xx_regs.c
+mpc83xx_regs_rel_CPPFLAGS = $(AM_CPPFLAGS)
+mpc83xx_regs_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+startup_rel_SOURCES = ../../shared/bspclean.c ../../shared/bsplibc.c \
+ ../../shared/bsppost.c startup/bspstart.c ../../shared/bootcard.c \
+ ../../shared/sbrk.c \
+ ../../shared/gnatinstallhandler.c startup/cpuinit.c
+
+startup_rel_CPPFLAGS = $(AM_CPPFLAGS)
+startup_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+pclock_rel_SOURCES = ../../powerpc/shared/clock/p_clock.c
+pclock_rel_CPPFLAGS = $(AM_CPPFLAGS)
+pclock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+include_bsp_HEADERS = ./irq/irq.h\
+ ../../powerpc/shared/vectors/vectors.h
+
+vectors_rel_SOURCES = ../../powerpc/shared/vectors/vectors.h \
+ ../../powerpc/shared/vectors/vectors_init.c \
+ ../../powerpc/shared/vectors/vectors.S
+
+vectors_rel_CPPFLAGS = $(AM_CPPFLAGS)
+vectors_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+irq_rel_SOURCES = ./irq/irq.h \
+ ./irq/irq_init.c \
+ ./irq/ipic.c \
+ ../shared/irq/irq_asm.S
+
+irq_rel_CPPFLAGS = $(AM_CPPFLAGS)
+irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+console_rel_SOURCES = console/console.c console/ns16550cfg.c
+console_rel_CPPFLAGS = $(AM_CPPFLAGS)
+console_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+network_rel_SOURCES = network/network.c
+network_rel_CPPFLAGS = $(AM_CPPFLAGS) \
+ -D__INSIDE_RTEMS_BSD_TCPIP_STACK__ -D__BSD_VISIBLE
+network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+noinst_LIBRARIES = libbsp.a
+libbsp_a_SOURCES =
+libbsp_a_LIBADD = startup.rel pclock.rel console.rel vectors.rel \
+ irq.rel mpc83xx_regs.rel network.rel \
+ ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
+ ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
+ ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
+ ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
+ ../../../libcpu/@RTEMS_CPU@/mpc83xx/tsec.rel
+PREINSTALL_DIRS = $(PROJECT_LIB)/$(dirstamp) \
+ $(PROJECT_INCLUDE)/$(dirstamp) \
+ $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+TMPINSTALL_FILES = $(PROJECT_LIB)/start.$(OBJEXT) \
+ $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
+CLEANFILES = $(TMPINSTALL_FILES) $(PREINSTALL_FILES)
+PREINSTALL_FILES = $(PROJECT_LIB)/bsp_specs $(PROJECT_INCLUDE)/bsp.h \
+ $(PROJECT_INCLUDE)/tm27.h $(PROJECT_INCLUDE)/bspopts.h \
+ $(PROJECT_INCLUDE)/coverhd.h $(PROJECT_INCLUDE)/tod.h \
+ $(PROJECT_LIB)/linkcmds.mpc8349eamds \
+ $(PROJECT_INCLUDE)/bsp/irq.h $(PROJECT_INCLUDE)/bsp/vectors.h
+PROJECT_TOOLS = $(PROJECT_RELEASE)/build-tools
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .S .c .o .obj
+am--refresh:
+ @:
+$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(top_srcdir)/../../../../automake/compile.am $(top_srcdir)/../../bsp.am $(srcdir)/preinstall.am $(top_srcdir)/../../../../automake/local.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ echo ' cd $(srcdir) && $(AUTOMAKE) --foreign '; \
+ cd $(srcdir) && $(AUTOMAKE) --foreign \
+ && exit 0; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ echo ' $(SHELL) ./config.status'; \
+ $(SHELL) ./config.status;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ $(SHELL) ./config.status --recheck
+
+$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
+ cd $(srcdir) && $(AUTOCONF)
+$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
+ cd $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
+
+include/bspopts.tmp: include/stamp-h1
+ @if test ! -f $@; then \
+ rm -f include/stamp-h1; \
+ $(MAKE) $(AM_MAKEFLAGS) include/stamp-h1; \
+ else :; fi
+
+include/stamp-h1: $(top_srcdir)/include/bspopts.h.in $(top_builddir)/config.status
+ @rm -f include/stamp-h1
+ cd $(top_builddir) && $(SHELL) ./config.status include/bspopts.tmp
+$(top_srcdir)/include/bspopts.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
+ cd $(top_srcdir) && $(AUTOHEADER)
+ rm -f include/stamp-h1
+ touch $@
+
+distclean-hdr:
+ -rm -f include/bspopts.tmp include/stamp-h1
+
+clean-noinstLIBRARIES:
+ -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
+libbsp.a: $(libbsp_a_OBJECTS) $(libbsp_a_DEPENDENCIES)
+ -rm -f libbsp.a
+ $(libbsp_a_AR) libbsp.a $(libbsp_a_OBJECTS) $(libbsp_a_LIBADD)
+ $(RANLIB) libbsp.a
+
+clean-noinstPROGRAMS:
+ -test -z "$(noinst_PROGRAMS)" || rm -f $(noinst_PROGRAMS)
+console.rel$(EXEEXT): $(console_rel_OBJECTS) $(console_rel_DEPENDENCIES)
+ @rm -f console.rel$(EXEEXT)
+ $(console_rel_LINK) $(console_rel_OBJECTS) $(console_rel_LDADD) $(LIBS)
+irq.rel$(EXEEXT): $(irq_rel_OBJECTS) $(irq_rel_DEPENDENCIES)
+ @rm -f irq.rel$(EXEEXT)
+ $(irq_rel_LINK) $(irq_rel_OBJECTS) $(irq_rel_LDADD) $(LIBS)
+mpc83xx_regs.rel$(EXEEXT): $(mpc83xx_regs_rel_OBJECTS) $(mpc83xx_regs_rel_DEPENDENCIES)
+ @rm -f mpc83xx_regs.rel$(EXEEXT)
+ $(mpc83xx_regs_rel_LINK) $(mpc83xx_regs_rel_OBJECTS) $(mpc83xx_regs_rel_LDADD) $(LIBS)
+network.rel$(EXEEXT): $(network_rel_OBJECTS) $(network_rel_DEPENDENCIES)
+ @rm -f network.rel$(EXEEXT)
+ $(network_rel_LINK) $(network_rel_OBJECTS) $(network_rel_LDADD) $(LIBS)
+pclock.rel$(EXEEXT): $(pclock_rel_OBJECTS) $(pclock_rel_DEPENDENCIES)
+ @rm -f pclock.rel$(EXEEXT)
+ $(pclock_rel_LINK) $(pclock_rel_OBJECTS) $(pclock_rel_LDADD) $(LIBS)
+startup.rel$(EXEEXT): $(startup_rel_OBJECTS) $(startup_rel_DEPENDENCIES)
+ @rm -f startup.rel$(EXEEXT)
+ $(startup_rel_LINK) $(startup_rel_OBJECTS) $(startup_rel_LDADD) $(LIBS)
+vectors.rel$(EXEEXT): $(vectors_rel_OBJECTS) $(vectors_rel_DEPENDENCIES)
+ @rm -f vectors.rel$(EXEEXT)
+ $(vectors_rel_LINK) $(vectors_rel_OBJECTS) $(vectors_rel_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/console_rel-console.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/console_rel-ns16550cfg.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/irq_rel-ipic.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/irq_rel-irq_asm.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/irq_rel-irq_init.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mpc83xx_regs_rel-mpc83xx_regs.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/network_rel-network.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pclock_rel-p_clock.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/startup_rel-bootcard.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/startup_rel-bspclean.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/startup_rel-bsplibc.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/startup_rel-bsppost.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/startup_rel-bspstart.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/startup_rel-cpuinit.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/startup_rel-gnatinstallhandler.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/startup_rel-sbrk.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vectors_rel-vectors.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vectors_rel-vectors_init.Po@am__quote@
+
+.S.o:
+@am__fastdepCCAS_TRUE@ $(CPPASCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+@am__fastdepCCAS_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCCAS_FALSE@ $(CPPASCOMPILE) -c -o $@ $<
+
+.S.obj:
+@am__fastdepCCAS_TRUE@ $(CPPASCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+@am__fastdepCCAS_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCCAS_FALSE@ $(CPPASCOMPILE) -c -o $@ `$(CYGPATH_W) '$<'`
+
+irq_rel-irq_asm.o: ../shared/irq/irq_asm.S
+@am__fastdepCCAS_TRUE@ $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(irq_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) -MT irq_rel-irq_asm.o -MD -MP -MF $(DEPDIR)/irq_rel-irq_asm.Tpo -c -o irq_rel-irq_asm.o `test -f '../shared/irq/irq_asm.S' || echo '$(srcdir)/'`../shared/irq/irq_asm.S
+@am__fastdepCCAS_TRUE@ mv -f $(DEPDIR)/irq_rel-irq_asm.Tpo $(DEPDIR)/irq_rel-irq_asm.Po
+@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ source='../shared/irq/irq_asm.S' object='irq_rel-irq_asm.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCCAS_FALSE@ $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(irq_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) -c -o irq_rel-irq_asm.o `test -f '../shared/irq/irq_asm.S' || echo '$(srcdir)/'`../shared/irq/irq_asm.S
+
+irq_rel-irq_asm.obj: ../shared/irq/irq_asm.S
+@am__fastdepCCAS_TRUE@ $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(irq_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) -MT irq_rel-irq_asm.obj -MD -MP -MF $(DEPDIR)/irq_rel-irq_asm.Tpo -c -o irq_rel-irq_asm.obj `if test -f '../shared/irq/irq_asm.S'; then $(CYGPATH_W) '../shared/irq/irq_asm.S'; else $(CYGPATH_W) '$(srcdir)/../shared/irq/irq_asm.S'; fi`
+@am__fastdepCCAS_TRUE@ mv -f $(DEPDIR)/irq_rel-irq_asm.Tpo $(DEPDIR)/irq_rel-irq_asm.Po
+@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ source='../shared/irq/irq_asm.S' object='irq_rel-irq_asm.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCCAS_FALSE@ $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(irq_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) -c -o irq_rel-irq_asm.obj `if test -f '../shared/irq/irq_asm.S'; then $(CYGPATH_W) '../shared/irq/irq_asm.S'; else $(CYGPATH_W) '$(srcdir)/../shared/irq/irq_asm.S'; fi`
+
+vectors_rel-vectors.o: ../../powerpc/shared/vectors/vectors.S
+@am__fastdepCCAS_TRUE@ $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vectors_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) -MT vectors_rel-vectors.o -MD -MP -MF $(DEPDIR)/vectors_rel-vectors.Tpo -c -o vectors_rel-vectors.o `test -f '../../powerpc/shared/vectors/vectors.S' || echo '$(srcdir)/'`../../powerpc/shared/vectors/vectors.S
+@am__fastdepCCAS_TRUE@ mv -f $(DEPDIR)/vectors_rel-vectors.Tpo $(DEPDIR)/vectors_rel-vectors.Po
+@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ source='../../powerpc/shared/vectors/vectors.S' object='vectors_rel-vectors.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCCAS_FALSE@ $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vectors_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) -c -o vectors_rel-vectors.o `test -f '../../powerpc/shared/vectors/vectors.S' || echo '$(srcdir)/'`../../powerpc/shared/vectors/vectors.S
+
+vectors_rel-vectors.obj: ../../powerpc/shared/vectors/vectors.S
+@am__fastdepCCAS_TRUE@ $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vectors_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) -MT vectors_rel-vectors.obj -MD -MP -MF $(DEPDIR)/vectors_rel-vectors.Tpo -c -o vectors_rel-vectors.obj `if test -f '../../powerpc/shared/vectors/vectors.S'; then $(CYGPATH_W) '../../powerpc/shared/vectors/vectors.S'; else $(CYGPATH_W) '$(srcdir)/../../powerpc/shared/vectors/vectors.S'; fi`
+@am__fastdepCCAS_TRUE@ mv -f $(DEPDIR)/vectors_rel-vectors.Tpo $(DEPDIR)/vectors_rel-vectors.Po
+@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ source='../../powerpc/shared/vectors/vectors.S' object='vectors_rel-vectors.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCCAS_FALSE@ $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vectors_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS) -c -o vectors_rel-vectors.obj `if test -f '../../powerpc/shared/vectors/vectors.S'; then $(CYGPATH_W) '../../powerpc/shared/vectors/vectors.S'; else $(CYGPATH_W) '$(srcdir)/../../powerpc/shared/vectors/vectors.S'; fi`
+
+.c.o:
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(COMPILE) -c $<
+
+.c.obj:
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+console_rel-console.o: console/console.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(console_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT console_rel-console.o -MD -MP -MF $(DEPDIR)/console_rel-console.Tpo -c -o console_rel-console.o `test -f 'console/console.c' || echo '$(srcdir)/'`console/console.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/console_rel-console.Tpo $(DEPDIR)/console_rel-console.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='console/console.c' object='console_rel-console.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(console_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o console_rel-console.o `test -f 'console/console.c' || echo '$(srcdir)/'`console/console.c
+
+console_rel-console.obj: console/console.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(console_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT console_rel-console.obj -MD -MP -MF $(DEPDIR)/console_rel-console.Tpo -c -o console_rel-console.obj `if test -f 'console/console.c'; then $(CYGPATH_W) 'console/console.c'; else $(CYGPATH_W) '$(srcdir)/console/console.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/console_rel-console.Tpo $(DEPDIR)/console_rel-console.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='console/console.c' object='console_rel-console.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(console_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o console_rel-console.obj `if test -f 'console/console.c'; then $(CYGPATH_W) 'console/console.c'; else $(CYGPATH_W) '$(srcdir)/console/console.c'; fi`
+
+console_rel-ns16550cfg.o: console/ns16550cfg.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(console_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT console_rel-ns16550cfg.o -MD -MP -MF $(DEPDIR)/console_rel-ns16550cfg.Tpo -c -o console_rel-ns16550cfg.o `test -f 'console/ns16550cfg.c' || echo '$(srcdir)/'`console/ns16550cfg.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/console_rel-ns16550cfg.Tpo $(DEPDIR)/console_rel-ns16550cfg.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='console/ns16550cfg.c' object='console_rel-ns16550cfg.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(console_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o console_rel-ns16550cfg.o `test -f 'console/ns16550cfg.c' || echo '$(srcdir)/'`console/ns16550cfg.c
+
+console_rel-ns16550cfg.obj: console/ns16550cfg.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(console_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT console_rel-ns16550cfg.obj -MD -MP -MF $(DEPDIR)/console_rel-ns16550cfg.Tpo -c -o console_rel-ns16550cfg.obj `if test -f 'console/ns16550cfg.c'; then $(CYGPATH_W) 'console/ns16550cfg.c'; else $(CYGPATH_W) '$(srcdir)/console/ns16550cfg.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/console_rel-ns16550cfg.Tpo $(DEPDIR)/console_rel-ns16550cfg.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='console/ns16550cfg.c' object='console_rel-ns16550cfg.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(console_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o console_rel-ns16550cfg.obj `if test -f 'console/ns16550cfg.c'; then $(CYGPATH_W) 'console/ns16550cfg.c'; else $(CYGPATH_W) '$(srcdir)/console/ns16550cfg.c'; fi`
+
+irq_rel-irq_init.o: ./irq/irq_init.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(irq_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT irq_rel-irq_init.o -MD -MP -MF $(DEPDIR)/irq_rel-irq_init.Tpo -c -o irq_rel-irq_init.o `test -f './irq/irq_init.c' || echo '$(srcdir)/'`./irq/irq_init.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/irq_rel-irq_init.Tpo $(DEPDIR)/irq_rel-irq_init.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='./irq/irq_init.c' object='irq_rel-irq_init.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(irq_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o irq_rel-irq_init.o `test -f './irq/irq_init.c' || echo '$(srcdir)/'`./irq/irq_init.c
+
+irq_rel-irq_init.obj: ./irq/irq_init.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(irq_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT irq_rel-irq_init.obj -MD -MP -MF $(DEPDIR)/irq_rel-irq_init.Tpo -c -o irq_rel-irq_init.obj `if test -f './irq/irq_init.c'; then $(CYGPATH_W) './irq/irq_init.c'; else $(CYGPATH_W) '$(srcdir)/./irq/irq_init.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/irq_rel-irq_init.Tpo $(DEPDIR)/irq_rel-irq_init.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='./irq/irq_init.c' object='irq_rel-irq_init.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(irq_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o irq_rel-irq_init.obj `if test -f './irq/irq_init.c'; then $(CYGPATH_W) './irq/irq_init.c'; else $(CYGPATH_W) '$(srcdir)/./irq/irq_init.c'; fi`
+
+irq_rel-ipic.o: ./irq/ipic.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(irq_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT irq_rel-ipic.o -MD -MP -MF $(DEPDIR)/irq_rel-ipic.Tpo -c -o irq_rel-ipic.o `test -f './irq/ipic.c' || echo '$(srcdir)/'`./irq/ipic.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/irq_rel-ipic.Tpo $(DEPDIR)/irq_rel-ipic.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='./irq/ipic.c' object='irq_rel-ipic.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(irq_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o irq_rel-ipic.o `test -f './irq/ipic.c' || echo '$(srcdir)/'`./irq/ipic.c
+
+irq_rel-ipic.obj: ./irq/ipic.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(irq_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT irq_rel-ipic.obj -MD -MP -MF $(DEPDIR)/irq_rel-ipic.Tpo -c -o irq_rel-ipic.obj `if test -f './irq/ipic.c'; then $(CYGPATH_W) './irq/ipic.c'; else $(CYGPATH_W) '$(srcdir)/./irq/ipic.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/irq_rel-ipic.Tpo $(DEPDIR)/irq_rel-ipic.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='./irq/ipic.c' object='irq_rel-ipic.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(irq_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o irq_rel-ipic.obj `if test -f './irq/ipic.c'; then $(CYGPATH_W) './irq/ipic.c'; else $(CYGPATH_W) '$(srcdir)/./irq/ipic.c'; fi`
+
+mpc83xx_regs_rel-mpc83xx_regs.o: startup/mpc83xx_regs.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(mpc83xx_regs_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT mpc83xx_regs_rel-mpc83xx_regs.o -MD -MP -MF $(DEPDIR)/mpc83xx_regs_rel-mpc83xx_regs.Tpo -c -o mpc83xx_regs_rel-mpc83xx_regs.o `test -f 'startup/mpc83xx_regs.c' || echo '$(srcdir)/'`startup/mpc83xx_regs.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/mpc83xx_regs_rel-mpc83xx_regs.Tpo $(DEPDIR)/mpc83xx_regs_rel-mpc83xx_regs.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='startup/mpc83xx_regs.c' object='mpc83xx_regs_rel-mpc83xx_regs.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(mpc83xx_regs_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o mpc83xx_regs_rel-mpc83xx_regs.o `test -f 'startup/mpc83xx_regs.c' || echo '$(srcdir)/'`startup/mpc83xx_regs.c
+
+mpc83xx_regs_rel-mpc83xx_regs.obj: startup/mpc83xx_regs.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(mpc83xx_regs_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT mpc83xx_regs_rel-mpc83xx_regs.obj -MD -MP -MF $(DEPDIR)/mpc83xx_regs_rel-mpc83xx_regs.Tpo -c -o mpc83xx_regs_rel-mpc83xx_regs.obj `if test -f 'startup/mpc83xx_regs.c'; then $(CYGPATH_W) 'startup/mpc83xx_regs.c'; else $(CYGPATH_W) '$(srcdir)/startup/mpc83xx_regs.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/mpc83xx_regs_rel-mpc83xx_regs.Tpo $(DEPDIR)/mpc83xx_regs_rel-mpc83xx_regs.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='startup/mpc83xx_regs.c' object='mpc83xx_regs_rel-mpc83xx_regs.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(mpc83xx_regs_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o mpc83xx_regs_rel-mpc83xx_regs.obj `if test -f 'startup/mpc83xx_regs.c'; then $(CYGPATH_W) 'startup/mpc83xx_regs.c'; else $(CYGPATH_W) '$(srcdir)/startup/mpc83xx_regs.c'; fi`
+
+network_rel-network.o: network/network.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(network_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT network_rel-network.o -MD -MP -MF $(DEPDIR)/network_rel-network.Tpo -c -o network_rel-network.o `test -f 'network/network.c' || echo '$(srcdir)/'`network/network.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/network_rel-network.Tpo $(DEPDIR)/network_rel-network.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='network/network.c' object='network_rel-network.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(network_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o network_rel-network.o `test -f 'network/network.c' || echo '$(srcdir)/'`network/network.c
+
+network_rel-network.obj: network/network.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(network_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT network_rel-network.obj -MD -MP -MF $(DEPDIR)/network_rel-network.Tpo -c -o network_rel-network.obj `if test -f 'network/network.c'; then $(CYGPATH_W) 'network/network.c'; else $(CYGPATH_W) '$(srcdir)/network/network.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/network_rel-network.Tpo $(DEPDIR)/network_rel-network.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='network/network.c' object='network_rel-network.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(network_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o network_rel-network.obj `if test -f 'network/network.c'; then $(CYGPATH_W) 'network/network.c'; else $(CYGPATH_W) '$(srcdir)/network/network.c'; fi`
+
+pclock_rel-p_clock.o: ../../powerpc/shared/clock/p_clock.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(pclock_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT pclock_rel-p_clock.o -MD -MP -MF $(DEPDIR)/pclock_rel-p_clock.Tpo -c -o pclock_rel-p_clock.o `test -f '../../powerpc/shared/clock/p_clock.c' || echo '$(srcdir)/'`../../powerpc/shared/clock/p_clock.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/pclock_rel-p_clock.Tpo $(DEPDIR)/pclock_rel-p_clock.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../powerpc/shared/clock/p_clock.c' object='pclock_rel-p_clock.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(pclock_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o pclock_rel-p_clock.o `test -f '../../powerpc/shared/clock/p_clock.c' || echo '$(srcdir)/'`../../powerpc/shared/clock/p_clock.c
+
+pclock_rel-p_clock.obj: ../../powerpc/shared/clock/p_clock.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(pclock_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT pclock_rel-p_clock.obj -MD -MP -MF $(DEPDIR)/pclock_rel-p_clock.Tpo -c -o pclock_rel-p_clock.obj `if test -f '../../powerpc/shared/clock/p_clock.c'; then $(CYGPATH_W) '../../powerpc/shared/clock/p_clock.c'; else $(CYGPATH_W) '$(srcdir)/../../powerpc/shared/clock/p_clock.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/pclock_rel-p_clock.Tpo $(DEPDIR)/pclock_rel-p_clock.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../powerpc/shared/clock/p_clock.c' object='pclock_rel-p_clock.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(pclock_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o pclock_rel-p_clock.obj `if test -f '../../powerpc/shared/clock/p_clock.c'; then $(CYGPATH_W) '../../powerpc/shared/clock/p_clock.c'; else $(CYGPATH_W) '$(srcdir)/../../powerpc/shared/clock/p_clock.c'; fi`
+
+startup_rel-bspclean.o: ../../shared/bspclean.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-bspclean.o -MD -MP -MF $(DEPDIR)/startup_rel-bspclean.Tpo -c -o startup_rel-bspclean.o `test -f '../../shared/bspclean.c' || echo '$(srcdir)/'`../../shared/bspclean.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-bspclean.Tpo $(DEPDIR)/startup_rel-bspclean.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../shared/bspclean.c' object='startup_rel-bspclean.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-bspclean.o `test -f '../../shared/bspclean.c' || echo '$(srcdir)/'`../../shared/bspclean.c
+
+startup_rel-bspclean.obj: ../../shared/bspclean.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-bspclean.obj -MD -MP -MF $(DEPDIR)/startup_rel-bspclean.Tpo -c -o startup_rel-bspclean.obj `if test -f '../../shared/bspclean.c'; then $(CYGPATH_W) '../../shared/bspclean.c'; else $(CYGPATH_W) '$(srcdir)/../../shared/bspclean.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-bspclean.Tpo $(DEPDIR)/startup_rel-bspclean.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../shared/bspclean.c' object='startup_rel-bspclean.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-bspclean.obj `if test -f '../../shared/bspclean.c'; then $(CYGPATH_W) '../../shared/bspclean.c'; else $(CYGPATH_W) '$(srcdir)/../../shared/bspclean.c'; fi`
+
+startup_rel-bsplibc.o: ../../shared/bsplibc.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-bsplibc.o -MD -MP -MF $(DEPDIR)/startup_rel-bsplibc.Tpo -c -o startup_rel-bsplibc.o `test -f '../../shared/bsplibc.c' || echo '$(srcdir)/'`../../shared/bsplibc.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-bsplibc.Tpo $(DEPDIR)/startup_rel-bsplibc.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../shared/bsplibc.c' object='startup_rel-bsplibc.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-bsplibc.o `test -f '../../shared/bsplibc.c' || echo '$(srcdir)/'`../../shared/bsplibc.c
+
+startup_rel-bsplibc.obj: ../../shared/bsplibc.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-bsplibc.obj -MD -MP -MF $(DEPDIR)/startup_rel-bsplibc.Tpo -c -o startup_rel-bsplibc.obj `if test -f '../../shared/bsplibc.c'; then $(CYGPATH_W) '../../shared/bsplibc.c'; else $(CYGPATH_W) '$(srcdir)/../../shared/bsplibc.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-bsplibc.Tpo $(DEPDIR)/startup_rel-bsplibc.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../shared/bsplibc.c' object='startup_rel-bsplibc.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-bsplibc.obj `if test -f '../../shared/bsplibc.c'; then $(CYGPATH_W) '../../shared/bsplibc.c'; else $(CYGPATH_W) '$(srcdir)/../../shared/bsplibc.c'; fi`
+
+startup_rel-bsppost.o: ../../shared/bsppost.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-bsppost.o -MD -MP -MF $(DEPDIR)/startup_rel-bsppost.Tpo -c -o startup_rel-bsppost.o `test -f '../../shared/bsppost.c' || echo '$(srcdir)/'`../../shared/bsppost.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-bsppost.Tpo $(DEPDIR)/startup_rel-bsppost.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../shared/bsppost.c' object='startup_rel-bsppost.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-bsppost.o `test -f '../../shared/bsppost.c' || echo '$(srcdir)/'`../../shared/bsppost.c
+
+startup_rel-bsppost.obj: ../../shared/bsppost.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-bsppost.obj -MD -MP -MF $(DEPDIR)/startup_rel-bsppost.Tpo -c -o startup_rel-bsppost.obj `if test -f '../../shared/bsppost.c'; then $(CYGPATH_W) '../../shared/bsppost.c'; else $(CYGPATH_W) '$(srcdir)/../../shared/bsppost.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-bsppost.Tpo $(DEPDIR)/startup_rel-bsppost.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../shared/bsppost.c' object='startup_rel-bsppost.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-bsppost.obj `if test -f '../../shared/bsppost.c'; then $(CYGPATH_W) '../../shared/bsppost.c'; else $(CYGPATH_W) '$(srcdir)/../../shared/bsppost.c'; fi`
+
+startup_rel-bspstart.o: startup/bspstart.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-bspstart.o -MD -MP -MF $(DEPDIR)/startup_rel-bspstart.Tpo -c -o startup_rel-bspstart.o `test -f 'startup/bspstart.c' || echo '$(srcdir)/'`startup/bspstart.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-bspstart.Tpo $(DEPDIR)/startup_rel-bspstart.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='startup/bspstart.c' object='startup_rel-bspstart.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-bspstart.o `test -f 'startup/bspstart.c' || echo '$(srcdir)/'`startup/bspstart.c
+
+startup_rel-bspstart.obj: startup/bspstart.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-bspstart.obj -MD -MP -MF $(DEPDIR)/startup_rel-bspstart.Tpo -c -o startup_rel-bspstart.obj `if test -f 'startup/bspstart.c'; then $(CYGPATH_W) 'startup/bspstart.c'; else $(CYGPATH_W) '$(srcdir)/startup/bspstart.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-bspstart.Tpo $(DEPDIR)/startup_rel-bspstart.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='startup/bspstart.c' object='startup_rel-bspstart.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-bspstart.obj `if test -f 'startup/bspstart.c'; then $(CYGPATH_W) 'startup/bspstart.c'; else $(CYGPATH_W) '$(srcdir)/startup/bspstart.c'; fi`
+
+startup_rel-bootcard.o: ../../shared/bootcard.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-bootcard.o -MD -MP -MF $(DEPDIR)/startup_rel-bootcard.Tpo -c -o startup_rel-bootcard.o `test -f '../../shared/bootcard.c' || echo '$(srcdir)/'`../../shared/bootcard.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-bootcard.Tpo $(DEPDIR)/startup_rel-bootcard.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../shared/bootcard.c' object='startup_rel-bootcard.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-bootcard.o `test -f '../../shared/bootcard.c' || echo '$(srcdir)/'`../../shared/bootcard.c
+
+startup_rel-bootcard.obj: ../../shared/bootcard.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-bootcard.obj -MD -MP -MF $(DEPDIR)/startup_rel-bootcard.Tpo -c -o startup_rel-bootcard.obj `if test -f '../../shared/bootcard.c'; then $(CYGPATH_W) '../../shared/bootcard.c'; else $(CYGPATH_W) '$(srcdir)/../../shared/bootcard.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-bootcard.Tpo $(DEPDIR)/startup_rel-bootcard.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../shared/bootcard.c' object='startup_rel-bootcard.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-bootcard.obj `if test -f '../../shared/bootcard.c'; then $(CYGPATH_W) '../../shared/bootcard.c'; else $(CYGPATH_W) '$(srcdir)/../../shared/bootcard.c'; fi`
+
+startup_rel-sbrk.o: ../../shared/sbrk.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-sbrk.o -MD -MP -MF $(DEPDIR)/startup_rel-sbrk.Tpo -c -o startup_rel-sbrk.o `test -f '../../shared/sbrk.c' || echo '$(srcdir)/'`../../shared/sbrk.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-sbrk.Tpo $(DEPDIR)/startup_rel-sbrk.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../shared/sbrk.c' object='startup_rel-sbrk.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-sbrk.o `test -f '../../shared/sbrk.c' || echo '$(srcdir)/'`../../shared/sbrk.c
+
+startup_rel-sbrk.obj: ../../shared/sbrk.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-sbrk.obj -MD -MP -MF $(DEPDIR)/startup_rel-sbrk.Tpo -c -o startup_rel-sbrk.obj `if test -f '../../shared/sbrk.c'; then $(CYGPATH_W) '../../shared/sbrk.c'; else $(CYGPATH_W) '$(srcdir)/../../shared/sbrk.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-sbrk.Tpo $(DEPDIR)/startup_rel-sbrk.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../shared/sbrk.c' object='startup_rel-sbrk.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-sbrk.obj `if test -f '../../shared/sbrk.c'; then $(CYGPATH_W) '../../shared/sbrk.c'; else $(CYGPATH_W) '$(srcdir)/../../shared/sbrk.c'; fi`
+
+startup_rel-gnatinstallhandler.o: ../../shared/gnatinstallhandler.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-gnatinstallhandler.o -MD -MP -MF $(DEPDIR)/startup_rel-gnatinstallhandler.Tpo -c -o startup_rel-gnatinstallhandler.o `test -f '../../shared/gnatinstallhandler.c' || echo '$(srcdir)/'`../../shared/gnatinstallhandler.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-gnatinstallhandler.Tpo $(DEPDIR)/startup_rel-gnatinstallhandler.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../shared/gnatinstallhandler.c' object='startup_rel-gnatinstallhandler.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-gnatinstallhandler.o `test -f '../../shared/gnatinstallhandler.c' || echo '$(srcdir)/'`../../shared/gnatinstallhandler.c
+
+startup_rel-gnatinstallhandler.obj: ../../shared/gnatinstallhandler.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-gnatinstallhandler.obj -MD -MP -MF $(DEPDIR)/startup_rel-gnatinstallhandler.Tpo -c -o startup_rel-gnatinstallhandler.obj `if test -f '../../shared/gnatinstallhandler.c'; then $(CYGPATH_W) '../../shared/gnatinstallhandler.c'; else $(CYGPATH_W) '$(srcdir)/../../shared/gnatinstallhandler.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-gnatinstallhandler.Tpo $(DEPDIR)/startup_rel-gnatinstallhandler.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../shared/gnatinstallhandler.c' object='startup_rel-gnatinstallhandler.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-gnatinstallhandler.obj `if test -f '../../shared/gnatinstallhandler.c'; then $(CYGPATH_W) '../../shared/gnatinstallhandler.c'; else $(CYGPATH_W) '$(srcdir)/../../shared/gnatinstallhandler.c'; fi`
+
+startup_rel-cpuinit.o: startup/cpuinit.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-cpuinit.o -MD -MP -MF $(DEPDIR)/startup_rel-cpuinit.Tpo -c -o startup_rel-cpuinit.o `test -f 'startup/cpuinit.c' || echo '$(srcdir)/'`startup/cpuinit.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-cpuinit.Tpo $(DEPDIR)/startup_rel-cpuinit.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='startup/cpuinit.c' object='startup_rel-cpuinit.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-cpuinit.o `test -f 'startup/cpuinit.c' || echo '$(srcdir)/'`startup/cpuinit.c
+
+startup_rel-cpuinit.obj: startup/cpuinit.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT startup_rel-cpuinit.obj -MD -MP -MF $(DEPDIR)/startup_rel-cpuinit.Tpo -c -o startup_rel-cpuinit.obj `if test -f 'startup/cpuinit.c'; then $(CYGPATH_W) 'startup/cpuinit.c'; else $(CYGPATH_W) '$(srcdir)/startup/cpuinit.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/startup_rel-cpuinit.Tpo $(DEPDIR)/startup_rel-cpuinit.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='startup/cpuinit.c' object='startup_rel-cpuinit.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(startup_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o startup_rel-cpuinit.obj `if test -f 'startup/cpuinit.c'; then $(CYGPATH_W) 'startup/cpuinit.c'; else $(CYGPATH_W) '$(srcdir)/startup/cpuinit.c'; fi`
+
+vectors_rel-vectors_init.o: ../../powerpc/shared/vectors/vectors_init.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vectors_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT vectors_rel-vectors_init.o -MD -MP -MF $(DEPDIR)/vectors_rel-vectors_init.Tpo -c -o vectors_rel-vectors_init.o `test -f '../../powerpc/shared/vectors/vectors_init.c' || echo '$(srcdir)/'`../../powerpc/shared/vectors/vectors_init.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/vectors_rel-vectors_init.Tpo $(DEPDIR)/vectors_rel-vectors_init.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../powerpc/shared/vectors/vectors_init.c' object='vectors_rel-vectors_init.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vectors_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o vectors_rel-vectors_init.o `test -f '../../powerpc/shared/vectors/vectors_init.c' || echo '$(srcdir)/'`../../powerpc/shared/vectors/vectors_init.c
+
+vectors_rel-vectors_init.obj: ../../powerpc/shared/vectors/vectors_init.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vectors_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT vectors_rel-vectors_init.obj -MD -MP -MF $(DEPDIR)/vectors_rel-vectors_init.Tpo -c -o vectors_rel-vectors_init.obj `if test -f '../../powerpc/shared/vectors/vectors_init.c'; then $(CYGPATH_W) '../../powerpc/shared/vectors/vectors_init.c'; else $(CYGPATH_W) '$(srcdir)/../../powerpc/shared/vectors/vectors_init.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/vectors_rel-vectors_init.Tpo $(DEPDIR)/vectors_rel-vectors_init.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='../../powerpc/shared/vectors/vectors_init.c' object='vectors_rel-vectors_init.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vectors_rel_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o vectors_rel-vectors_init.obj `if test -f '../../powerpc/shared/vectors/vectors_init.c'; then $(CYGPATH_W) '../../powerpc/shared/vectors/vectors_init.c'; else $(CYGPATH_W) '$(srcdir)/../../powerpc/shared/vectors/vectors_init.c'; fi`
+install-dist_project_libDATA: $(dist_project_lib_DATA)
+ @$(NORMAL_INSTALL)
+ test -z "$(project_libdir)" || $(MKDIR_P) "$(DESTDIR)$(project_libdir)"
+ @list='$(dist_project_lib_DATA)'; for p in $$list; do \
+ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
+ f=$(am__strip_dir) \
+ echo " $(dist_project_libDATA_INSTALL) '$$d$$p' '$(DESTDIR)$(project_libdir)/$$f'"; \
+ $(dist_project_libDATA_INSTALL) "$$d$$p" "$(DESTDIR)$(project_libdir)/$$f"; \
+ done
+
+uninstall-dist_project_libDATA:
+ @$(NORMAL_UNINSTALL)
+ @list='$(dist_project_lib_DATA)'; for p in $$list; do \
+ f=$(am__strip_dir) \
+ echo " rm -f '$(DESTDIR)$(project_libdir)/$$f'"; \
+ rm -f "$(DESTDIR)$(project_libdir)/$$f"; \
+ done
+install-project_libDATA: $(project_lib_DATA)
+ @$(NORMAL_INSTALL)
+ test -z "$(project_libdir)" || $(MKDIR_P) "$(DESTDIR)$(project_libdir)"
+ @list='$(project_lib_DATA)'; for p in $$list; do \
+ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
+ f=$(am__strip_dir) \
+ echo " $(project_libDATA_INSTALL) '$$d$$p' '$(DESTDIR)$(project_libdir)/$$f'"; \
+ $(project_libDATA_INSTALL) "$$d$$p" "$(DESTDIR)$(project_libdir)/$$f"; \
+ done
+
+uninstall-project_libDATA:
+ @$(NORMAL_UNINSTALL)
+ @list='$(project_lib_DATA)'; for p in $$list; do \
+ f=$(am__strip_dir) \
+ echo " rm -f '$(DESTDIR)$(project_libdir)/$$f'"; \
+ rm -f "$(DESTDIR)$(project_libdir)/$$f"; \
+ done
+install-includeHEADERS: $(include_HEADERS)
+ @$(NORMAL_INSTALL)
+ test -z "$(includedir)" || $(MKDIR_P) "$(DESTDIR)$(includedir)"
+ @list='$(include_HEADERS)'; for p in $$list; do \
+ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
+ f=$(am__strip_dir) \
+ echo " $(includeHEADERS_INSTALL) '$$d$$p' '$(DESTDIR)$(includedir)/$$f'"; \
+ $(includeHEADERS_INSTALL) "$$d$$p" "$(DESTDIR)$(includedir)/$$f"; \
+ done
+
+uninstall-includeHEADERS:
+ @$(NORMAL_UNINSTALL)
+ @list='$(include_HEADERS)'; for p in $$list; do \
+ f=$(am__strip_dir) \
+ echo " rm -f '$(DESTDIR)$(includedir)/$$f'"; \
+ rm -f "$(DESTDIR)$(includedir)/$$f"; \
+ done
+install-include_bspHEADERS: $(include_bsp_HEADERS)
+ @$(NORMAL_INSTALL)
+ test -z "$(include_bspdir)" || $(MKDIR_P) "$(DESTDIR)$(include_bspdir)"
+ @list='$(include_bsp_HEADERS)'; for p in $$list; do \
+ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
+ f=$(am__strip_dir) \
+ echo " $(include_bspHEADERS_INSTALL) '$$d$$p' '$(DESTDIR)$(include_bspdir)/$$f'"; \
+ $(include_bspHEADERS_INSTALL) "$$d$$p" "$(DESTDIR)$(include_bspdir)/$$f"; \
+ done
+
+uninstall-include_bspHEADERS:
+ @$(NORMAL_UNINSTALL)
+ @list='$(include_bsp_HEADERS)'; for p in $$list; do \
+ f=$(am__strip_dir) \
+ echo " rm -f '$(DESTDIR)$(include_bspdir)/$$f'"; \
+ rm -f "$(DESTDIR)$(include_bspdir)/$$f"; \
+ done
+install-nodist_includeHEADERS: $(nodist_include_HEADERS)
+ @$(NORMAL_INSTALL)
+ test -z "$(includedir)" || $(MKDIR_P) "$(DESTDIR)$(includedir)"
+ @list='$(nodist_include_HEADERS)'; for p in $$list; do \
+ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
+ f=$(am__strip_dir) \
+ echo " $(nodist_includeHEADERS_INSTALL) '$$d$$p' '$(DESTDIR)$(includedir)/$$f'"; \
+ $(nodist_includeHEADERS_INSTALL) "$$d$$p" "$(DESTDIR)$(includedir)/$$f"; \
+ done
+
+uninstall-nodist_includeHEADERS:
+ @$(NORMAL_UNINSTALL)
+ @list='$(nodist_include_HEADERS)'; for p in $$list; do \
+ f=$(am__strip_dir) \
+ echo " rm -f '$(DESTDIR)$(includedir)/$$f'"; \
+ rm -f "$(DESTDIR)$(includedir)/$$f"; \
+ done
+
+ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) ' { files[$$0] = 1; } \
+ END { for (i in files) print i; }'`; \
+ mkid -fID $$unique
+tags: TAGS
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) ' { files[$$0] = 1; } \
+ END { for (i in files) print i; }'`; \
+ if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
+ test -n "$$unique" || unique=$$empty_fix; \
+ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+ $$tags $$unique; \
+ fi
+ctags: CTAGS
+CTAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) ' { files[$$0] = 1; } \
+ END { for (i in files) print i; }'`; \
+ test -z "$(CTAGS_ARGS)$$tags$$unique" \
+ || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+ $$tags $$unique
+
+GTAGS:
+ here=`$(am__cd) $(top_builddir) && pwd` \
+ && cd $(top_srcdir) \
+ && gtags -i $(GTAGS_ARGS) $$here
+
+distclean-tags:
+ -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
+
+distdir: $(DISTFILES)
+ $(am__remove_distdir)
+ test -d $(distdir) || mkdir $(distdir)
+ @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ list='$(DISTFILES)'; \
+ dist_files=`for file in $$list; do echo $$file; done | \
+ sed -e "s|^$$srcdirstrip/||;t" \
+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+ case $$dist_files in \
+ */*) $(MKDIR_P) `echo "$$dist_files" | \
+ sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+ sort -u` ;; \
+ esac; \
+ for file in $$dist_files; do \
+ if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
+ if test -d $$d/$$file; then \
+ dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \
+ if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
+ cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
+ fi; \
+ cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
+ else \
+ test -f $(distdir)/$$file \
+ || cp -p $$d/$$file $(distdir)/$$file \
+ || exit 1; \
+ fi; \
+ done
+ -find $(distdir) -type d ! -perm -777 -exec chmod a+rwx {} \; -o \
+ ! -type d ! -perm -444 -links 1 -exec chmod a+r {} \; -o \
+ ! -type d ! -perm -400 -exec chmod a+r {} \; -o \
+ ! -type d ! -perm -444 -exec $(install_sh) -c -m a+r {} {} \; \
+ || chmod -R a+r $(distdir)
+dist-gzip: distdir
+ tardir=$(distdir) && $(am__tar) | GZIP=$(GZIP_ENV) gzip -c >$(distdir).tar.gz
+ $(am__remove_distdir)
+
+dist-bzip2: distdir
+ tardir=$(distdir) && $(am__tar) | bzip2 -9 -c >$(distdir).tar.bz2
+ $(am__remove_distdir)
+
+dist-tarZ: distdir
+ tardir=$(distdir) && $(am__tar) | compress -c >$(distdir).tar.Z
+ $(am__remove_distdir)
+
+dist-shar: distdir
+ shar $(distdir) | GZIP=$(GZIP_ENV) gzip -c >$(distdir).shar.gz
+ $(am__remove_distdir)
+
+dist-zip: distdir
+ -rm -f $(distdir).zip
+ zip -rq $(distdir).zip $(distdir)
+ $(am__remove_distdir)
+
+dist dist-all: distdir
+ tardir=$(distdir) && $(am__tar) | GZIP=$(GZIP_ENV) gzip -c >$(distdir).tar.gz
+ $(am__remove_distdir)
+
+# This target untars the dist file and tries a VPATH configuration. Then
+# it guarantees that the distribution is self-contained by making another
+# tarfile.
+distcheck: dist
+ case '$(DIST_ARCHIVES)' in \
+ *.tar.gz*) \
+ GZIP=$(GZIP_ENV) gunzip -c $(distdir).tar.gz | $(am__untar) ;;\
+ *.tar.bz2*) \
+ bunzip2 -c $(distdir).tar.bz2 | $(am__untar) ;;\
+ *.tar.Z*) \
+ uncompress -c $(distdir).tar.Z | $(am__untar) ;;\
+ *.shar.gz*) \
+ GZIP=$(GZIP_ENV) gunzip -c $(distdir).shar.gz | unshar ;;\
+ *.zip*) \
+ unzip $(distdir).zip ;;\
+ esac
+ chmod -R a-w $(distdir); chmod a+w $(distdir)
+ mkdir $(distdir)/_build
+ mkdir $(distdir)/_inst
+ chmod a-w $(distdir)
+ dc_install_base=`$(am__cd) $(distdir)/_inst && pwd | sed -e 's,^[^:\\/]:[\\/],/,'` \
+ && dc_destdir="$${TMPDIR-/tmp}/am-dc-$$$$/" \
+ && cd $(distdir)/_build \
+ && ../configure --srcdir=.. --prefix="$$dc_install_base" \
+ $(DISTCHECK_CONFIGURE_FLAGS) \
+ && $(MAKE) $(AM_MAKEFLAGS) \
+ && $(MAKE) $(AM_MAKEFLAGS) dvi \
+ && $(MAKE) $(AM_MAKEFLAGS) check \
+ && $(MAKE) $(AM_MAKEFLAGS) install \
+ && $(MAKE) $(AM_MAKEFLAGS) installcheck \
+ && $(MAKE) $(AM_MAKEFLAGS) uninstall \
+ && $(MAKE) $(AM_MAKEFLAGS) distuninstallcheck_dir="$$dc_install_base" \
+ distuninstallcheck \
+ && chmod -R a-w "$$dc_install_base" \
+ && ({ \
+ (cd ../.. && umask 077 && mkdir "$$dc_destdir") \
+ && $(MAKE) $(AM_MAKEFLAGS) DESTDIR="$$dc_destdir" install \
+ && $(MAKE) $(AM_MAKEFLAGS) DESTDIR="$$dc_destdir" uninstall \
+ && $(MAKE) $(AM_MAKEFLAGS) DESTDIR="$$dc_destdir" \
+ distuninstallcheck_dir="$$dc_destdir" distuninstallcheck; \
+ } || { rm -rf "$$dc_destdir"; exit 1; }) \
+ && rm -rf "$$dc_destdir" \
+ && $(MAKE) $(AM_MAKEFLAGS) dist \
+ && rm -rf $(DIST_ARCHIVES) \
+ && $(MAKE) $(AM_MAKEFLAGS) distcleancheck
+ $(am__remove_distdir)
+ @(echo "$(distdir) archives ready for distribution: "; \
+ list='$(DIST_ARCHIVES)'; for i in $$list; do echo $$i; done) | \
+ sed -e 1h -e 1s/./=/g -e 1p -e 1x -e '$$p' -e '$$x'
+distuninstallcheck:
+ @cd $(distuninstallcheck_dir) \
+ && test `$(distuninstallcheck_listfiles) | wc -l` -le 1 \
+ || { echo "ERROR: files left after uninstall:" ; \
+ if test -n "$(DESTDIR)"; then \
+ echo " (check DESTDIR support)"; \
+ fi ; \
+ $(distuninstallcheck_listfiles) ; \
+ exit 1; } >&2
+distcleancheck: distclean
+ @if test '$(srcdir)' = . ; then \
+ echo "ERROR: distcleancheck can only run from a VPATH build" ; \
+ exit 1 ; \
+ fi
+ @test `$(distcleancheck_listfiles) | wc -l` -eq 0 \
+ || { echo "ERROR: files left in build directory after distclean:" ; \
+ $(distcleancheck_listfiles) ; \
+ exit 1; } >&2
+check-am: all-am
+check: check-am
+all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) all-local
+installdirs:
+ for dir in "$(DESTDIR)$(project_libdir)" "$(DESTDIR)$(project_libdir)" "$(DESTDIR)$(includedir)" "$(DESTDIR)$(include_bspdir)" "$(DESTDIR)$(includedir)"; do \
+ test -z "$$dir" || $(MKDIR_P) "$$dir"; \
+ done
+install: install-am
+install-exec: install-exec-am
+install-data: install-data-am
+uninstall: uninstall-am
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+
+installcheck: installcheck-am
+install-strip:
+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+ -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+ -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
+
+maintainer-clean-generic:
+ @echo "This command is intended for maintainers to use"
+ @echo "it deletes files that may require special tools to rebuild."
+clean: clean-am
+
+clean-am: clean-generic clean-noinstLIBRARIES clean-noinstPROGRAMS \
+ mostlyclean-am
+
+distclean: distclean-am
+ -rm -f $(am__CONFIG_DISTCLEAN_FILES)
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+distclean-am: clean-am distclean-compile distclean-generic \
+ distclean-hdr distclean-tags
+
+dvi: dvi-am
+
+dvi-am:
+
+html: html-am
+
+info: info-am
+
+info-am:
+
+install-data-am: install-dist_project_libDATA install-includeHEADERS \
+ install-include_bspHEADERS install-nodist_includeHEADERS \
+ install-project_libDATA
+
+install-dvi: install-dvi-am
+
+install-exec-am:
+
+install-html: install-html-am
+
+install-info: install-info-am
+
+install-man:
+
+install-pdf: install-pdf-am
+
+install-ps: install-ps-am
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-am
+ -rm -f $(am__CONFIG_DISTCLEAN_FILES)
+ -rm -rf $(top_srcdir)/autom4te.cache
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
+
+mostlyclean: mostlyclean-am
+
+mostlyclean-am: mostlyclean-compile mostlyclean-generic
+
+pdf: pdf-am
+
+pdf-am:
+
+ps: ps-am
+
+ps-am:
+
+uninstall-am: uninstall-dist_project_libDATA uninstall-includeHEADERS \
+ uninstall-include_bspHEADERS uninstall-nodist_includeHEADERS \
+ uninstall-project_libDATA
+
+.MAKE: install-am install-strip
+
+.PHONY: CTAGS GTAGS all all-am all-local am--refresh check check-am \
+ clean clean-generic clean-noinstLIBRARIES clean-noinstPROGRAMS \
+ ctags dist dist-all dist-bzip2 dist-gzip dist-shar dist-tarZ \
+ dist-zip distcheck distclean distclean-compile \
+ distclean-generic distclean-hdr distclean-tags distcleancheck \
+ distdir distuninstallcheck dvi dvi-am html html-am info \
+ info-am install install-am install-data install-data-am \
+ install-dist_project_libDATA install-dvi install-dvi-am \
+ install-exec install-exec-am install-html install-html-am \
+ install-includeHEADERS install-include_bspHEADERS install-info \
+ install-info-am install-man install-nodist_includeHEADERS \
+ install-pdf install-pdf-am install-project_libDATA install-ps \
+ install-ps-am install-strip installcheck installcheck-am \
+ installdirs maintainer-clean maintainer-clean-generic \
+ mostlyclean mostlyclean-compile mostlyclean-generic pdf pdf-am \
+ ps ps-am tags uninstall uninstall-am \
+ uninstall-dist_project_libDATA uninstall-includeHEADERS \
+ uninstall-include_bspHEADERS uninstall-nodist_includeHEADERS \
+ uninstall-project_libDATA
+
+start.$(OBJEXT): start/start.S
+ $(CPPASCOMPILE) -o $@ -c $<
+rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S
+ $(CPPASCOMPILE) -o $@ -c $<
+
+@AMPOLISH3_TRUE@$(srcdir)/preinstall.am: Makefile.am
+@AMPOLISH3_TRUE@ $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
+
+all-local: $(TMPINSTALL_FILES)
+
+all-am: $(PREINSTALL_FILES)
+
+$(PROJECT_LIB)/$(dirstamp):
+ @$(MKDIR_P) $(PROJECT_LIB)
+ @: > $(PROJECT_LIB)/$(dirstamp)
+
+$(PROJECT_INCLUDE)/$(dirstamp):
+ @$(MKDIR_P) $(PROJECT_INCLUDE)
+ @: > $(PROJECT_INCLUDE)/$(dirstamp)
+
+$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
+
+$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
+
+$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
+
+$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
+
+$(PROJECT_INCLUDE)/bsp/$(dirstamp):
+ @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
+ @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+
+$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
+
+$(PROJECT_INCLUDE)/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tod.h
+
+$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
+
+$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
+
+$(PROJECT_LIB)/linkcmds.mpc8349eamds: startup/linkcmds.mpc8349eamds $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc8349eamds
+
+$(PROJECT_INCLUDE)/bsp/irq.h: ./irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
+
+$(PROJECT_INCLUDE)/bsp/vectors.h: ../../powerpc/shared/vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
+
+preinstall-am: $(PREINSTALL_FILES)
+preinstall: preinstall-am
+.PHONY: preinstall preinstall-am
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/aclocal.m4 b/c/src/lib/libbsp/powerpc/gen83xx/aclocal.m4
new file mode 100644
index 0000000000..07a036ad98
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/aclocal.m4
@@ -0,0 +1,935 @@
+# generated automatically by aclocal 1.10 -*- Autoconf -*-
+
+# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
+# 2005, 2006 Free Software Foundation, Inc.
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+m4_if(m4_PACKAGE_VERSION, [2.61],,
+[m4_fatal([this file was generated for autoconf 2.61.
+You have another version of autoconf. If you want to use that,
+you should regenerate the build system entirely.], [63])])
+
+# Copyright (C) 2002, 2003, 2005, 2006 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# AM_AUTOMAKE_VERSION(VERSION)
+# ----------------------------
+# Automake X.Y traces this macro to ensure aclocal.m4 has been
+# generated from the m4 files accompanying Automake X.Y.
+# (This private macro should not be called outside this file.)
+AC_DEFUN([AM_AUTOMAKE_VERSION],
+[am__api_version='1.10'
+dnl Some users find AM_AUTOMAKE_VERSION and mistake it for a way to
+dnl require some minimum version. Point them to the right macro.
+m4_if([$1], [1.10], [],
+ [AC_FATAL([Do not call $0, use AM_INIT_AUTOMAKE([$1]).])])dnl
+])
+
+# _AM_AUTOCONF_VERSION(VERSION)
+# -----------------------------
+# aclocal traces this macro to find the Autoconf version.
+# This is a private macro too. Using m4_define simplifies
+# the logic in aclocal, which can simply ignore this definition.
+m4_define([_AM_AUTOCONF_VERSION], [])
+
+# AM_SET_CURRENT_AUTOMAKE_VERSION
+# -------------------------------
+# Call AM_AUTOMAKE_VERSION and AM_AUTOMAKE_VERSION so they can be traced.
+# This function is AC_REQUIREd by AC_INIT_AUTOMAKE.
+AC_DEFUN([AM_SET_CURRENT_AUTOMAKE_VERSION],
+[AM_AUTOMAKE_VERSION([1.10])dnl
+_AM_AUTOCONF_VERSION(m4_PACKAGE_VERSION)])
+
+# Figure out how to run the assembler. -*- Autoconf -*-
+
+# Copyright (C) 2001, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 5
+
+# AM_PROG_AS
+# ----------
+AC_DEFUN([AM_PROG_AS],
+[# By default we simply use the C compiler to build assembly code.
+AC_REQUIRE([AC_PROG_CC])
+test "${CCAS+set}" = set || CCAS=$CC
+test "${CCASFLAGS+set}" = set || CCASFLAGS=$CFLAGS
+AC_ARG_VAR([CCAS], [assembler compiler command (defaults to CC)])
+AC_ARG_VAR([CCASFLAGS], [assembler compiler flags (defaults to CFLAGS)])
+_AM_IF_OPTION([no-dependencies],, [_AM_DEPENDENCIES([CCAS])])dnl
+])
+
+# AM_AUX_DIR_EXPAND -*- Autoconf -*-
+
+# Copyright (C) 2001, 2003, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# For projects using AC_CONFIG_AUX_DIR([foo]), Autoconf sets
+# $ac_aux_dir to `$srcdir/foo'. In other projects, it is set to
+# `$srcdir', `$srcdir/..', or `$srcdir/../..'.
+#
+# Of course, Automake must honor this variable whenever it calls a
+# tool from the auxiliary directory. The problem is that $srcdir (and
+# therefore $ac_aux_dir as well) can be either absolute or relative,
+# depending on how configure is run. This is pretty annoying, since
+# it makes $ac_aux_dir quite unusable in subdirectories: in the top
+# source directory, any form will work fine, but in subdirectories a
+# relative path needs to be adjusted first.
+#
+# $ac_aux_dir/missing
+# fails when called from a subdirectory if $ac_aux_dir is relative
+# $top_srcdir/$ac_aux_dir/missing
+# fails if $ac_aux_dir is absolute,
+# fails when called from a subdirectory in a VPATH build with
+# a relative $ac_aux_dir
+#
+# The reason of the latter failure is that $top_srcdir and $ac_aux_dir
+# are both prefixed by $srcdir. In an in-source build this is usually
+# harmless because $srcdir is `.', but things will broke when you
+# start a VPATH build or use an absolute $srcdir.
+#
+# So we could use something similar to $top_srcdir/$ac_aux_dir/missing,
+# iff we strip the leading $srcdir from $ac_aux_dir. That would be:
+# am_aux_dir='\$(top_srcdir)/'`expr "$ac_aux_dir" : "$srcdir//*\(.*\)"`
+# and then we would define $MISSING as
+# MISSING="\${SHELL} $am_aux_dir/missing"
+# This will work as long as MISSING is not called from configure, because
+# unfortunately $(top_srcdir) has no meaning in configure.
+# However there are other variables, like CC, which are often used in
+# configure, and could therefore not use this "fixed" $ac_aux_dir.
+#
+# Another solution, used here, is to always expand $ac_aux_dir to an
+# absolute PATH. The drawback is that using absolute paths prevent a
+# configured tree to be moved without reconfiguration.
+
+AC_DEFUN([AM_AUX_DIR_EXPAND],
+[dnl Rely on autoconf to set up CDPATH properly.
+AC_PREREQ([2.50])dnl
+# expand $ac_aux_dir to an absolute path
+am_aux_dir=`cd $ac_aux_dir && pwd`
+])
+
+# AM_CONDITIONAL -*- Autoconf -*-
+
+# Copyright (C) 1997, 2000, 2001, 2003, 2004, 2005, 2006
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 8
+
+# AM_CONDITIONAL(NAME, SHELL-CONDITION)
+# -------------------------------------
+# Define a conditional.
+AC_DEFUN([AM_CONDITIONAL],
+[AC_PREREQ(2.52)dnl
+ ifelse([$1], [TRUE], [AC_FATAL([$0: invalid condition: $1])],
+ [$1], [FALSE], [AC_FATAL([$0: invalid condition: $1])])dnl
+AC_SUBST([$1_TRUE])dnl
+AC_SUBST([$1_FALSE])dnl
+_AM_SUBST_NOTMAKE([$1_TRUE])dnl
+_AM_SUBST_NOTMAKE([$1_FALSE])dnl
+if $2; then
+ $1_TRUE=
+ $1_FALSE='#'
+else
+ $1_TRUE='#'
+ $1_FALSE=
+fi
+AC_CONFIG_COMMANDS_PRE(
+[if test -z "${$1_TRUE}" && test -z "${$1_FALSE}"; then
+ AC_MSG_ERROR([[conditional "$1" was never defined.
+Usually this means the macro was only invoked conditionally.]])
+fi])])
+
+# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 9
+
+# There are a few dirty hacks below to avoid letting `AC_PROG_CC' be
+# written in clear, in which case automake, when reading aclocal.m4,
+# will think it sees a *use*, and therefore will trigger all it's
+# C support machinery. Also note that it means that autoscan, seeing
+# CC etc. in the Makefile, will ask for an AC_PROG_CC use...
+
+
+# _AM_DEPENDENCIES(NAME)
+# ----------------------
+# See how the compiler implements dependency checking.
+# NAME is "CC", "CXX", "GCJ", or "OBJC".
+# We try a few techniques and use that to set a single cache variable.
+#
+# We don't AC_REQUIRE the corresponding AC_PROG_CC since the latter was
+# modified to invoke _AM_DEPENDENCIES(CC); we would have a circular
+# dependency, and given that the user is not expected to run this macro,
+# just rely on AC_PROG_CC.
+AC_DEFUN([_AM_DEPENDENCIES],
+[AC_REQUIRE([AM_SET_DEPDIR])dnl
+AC_REQUIRE([AM_OUTPUT_DEPENDENCY_COMMANDS])dnl
+AC_REQUIRE([AM_MAKE_INCLUDE])dnl
+AC_REQUIRE([AM_DEP_TRACK])dnl
+
+ifelse([$1], CC, [depcc="$CC" am_compiler_list=],
+ [$1], CXX, [depcc="$CXX" am_compiler_list=],
+ [$1], OBJC, [depcc="$OBJC" am_compiler_list='gcc3 gcc'],
+ [$1], UPC, [depcc="$UPC" am_compiler_list=],
+ [$1], GCJ, [depcc="$GCJ" am_compiler_list='gcc3 gcc'],
+ [depcc="$$1" am_compiler_list=])
+
+AC_CACHE_CHECK([dependency style of $depcc],
+ [am_cv_$1_dependencies_compiler_type],
+[if test -z "$AMDEP_TRUE" && test -f "$am_depcomp"; then
+ # We make a subdir and do the tests there. Otherwise we can end up
+ # making bogus files that we don't know about and never remove. For
+ # instance it was reported that on HP-UX the gcc test will end up
+ # making a dummy file named `D' -- because `-MD' means `put the output
+ # in D'.
+ mkdir conftest.dir
+ # Copy depcomp to subdir because otherwise we won't find it if we're
+ # using a relative directory.
+ cp "$am_depcomp" conftest.dir
+ cd conftest.dir
+ # We will build objects and dependencies in a subdirectory because
+ # it helps to detect inapplicable dependency modes. For instance
+ # both Tru64's cc and ICC support -MD to output dependencies as a
+ # side effect of compilation, but ICC will put the dependencies in
+ # the current directory while Tru64 will put them in the object
+ # directory.
+ mkdir sub
+
+ am_cv_$1_dependencies_compiler_type=none
+ if test "$am_compiler_list" = ""; then
+ am_compiler_list=`sed -n ['s/^#*\([a-zA-Z0-9]*\))$/\1/p'] < ./depcomp`
+ fi
+ for depmode in $am_compiler_list; do
+ # Setup a source with many dependencies, because some compilers
+ # like to wrap large dependency lists on column 80 (with \), and
+ # we should not choose a depcomp mode which is confused by this.
+ #
+ # We need to recreate these files for each test, as the compiler may
+ # overwrite some of them when testing with obscure command lines.
+ # This happens at least with the AIX C compiler.
+ : > sub/conftest.c
+ for i in 1 2 3 4 5 6; do
+ echo '#include "conftst'$i'.h"' >> sub/conftest.c
+ # Using `: > sub/conftst$i.h' creates only sub/conftst1.h with
+ # Solaris 8's {/usr,}/bin/sh.
+ touch sub/conftst$i.h
+ done
+ echo "${am__include} ${am__quote}sub/conftest.Po${am__quote}" > confmf
+
+ case $depmode in
+ nosideeffect)
+ # after this tag, mechanisms are not by side-effect, so they'll
+ # only be used when explicitly requested
+ if test "x$enable_dependency_tracking" = xyes; then
+ continue
+ else
+ break
+ fi
+ ;;
+ none) break ;;
+ esac
+ # We check with `-c' and `-o' for the sake of the "dashmstdout"
+ # mode. It turns out that the SunPro C++ compiler does not properly
+ # handle `-M -o', and we need to detect this.
+ if depmode=$depmode \
+ source=sub/conftest.c object=sub/conftest.${OBJEXT-o} \
+ depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \
+ $SHELL ./depcomp $depcc -c -o sub/conftest.${OBJEXT-o} sub/conftest.c \
+ >/dev/null 2>conftest.err &&
+ grep sub/conftst1.h sub/conftest.Po > /dev/null 2>&1 &&
+ grep sub/conftst6.h sub/conftest.Po > /dev/null 2>&1 &&
+ grep sub/conftest.${OBJEXT-o} sub/conftest.Po > /dev/null 2>&1 &&
+ ${MAKE-make} -s -f confmf > /dev/null 2>&1; then
+ # icc doesn't choke on unknown options, it will just issue warnings
+ # or remarks (even with -Werror). So we grep stderr for any message
+ # that says an option was ignored or not supported.
+ # When given -MP, icc 7.0 and 7.1 complain thusly:
+ # icc: Command line warning: ignoring option '-M'; no argument required
+ # The diagnosis changed in icc 8.0:
+ # icc: Command line remark: option '-MP' not supported
+ if (grep 'ignoring option' conftest.err ||
+ grep 'not supported' conftest.err) >/dev/null 2>&1; then :; else
+ am_cv_$1_dependencies_compiler_type=$depmode
+ break
+ fi
+ fi
+ done
+
+ cd ..
+ rm -rf conftest.dir
+else
+ am_cv_$1_dependencies_compiler_type=none
+fi
+])
+AC_SUBST([$1DEPMODE], [depmode=$am_cv_$1_dependencies_compiler_type])
+AM_CONDITIONAL([am__fastdep$1], [
+ test "x$enable_dependency_tracking" != xno \
+ && test "$am_cv_$1_dependencies_compiler_type" = gcc3])
+])
+
+
+# AM_SET_DEPDIR
+# -------------
+# Choose a directory name for dependency files.
+# This macro is AC_REQUIREd in _AM_DEPENDENCIES
+AC_DEFUN([AM_SET_DEPDIR],
+[AC_REQUIRE([AM_SET_LEADING_DOT])dnl
+AC_SUBST([DEPDIR], ["${am__leading_dot}deps"])dnl
+])
+
+
+# AM_DEP_TRACK
+# ------------
+AC_DEFUN([AM_DEP_TRACK],
+[AC_ARG_ENABLE(dependency-tracking,
+[ --disable-dependency-tracking speeds up one-time build
+ --enable-dependency-tracking do not reject slow dependency extractors])
+if test "x$enable_dependency_tracking" != xno; then
+ am_depcomp="$ac_aux_dir/depcomp"
+ AMDEPBACKSLASH='\'
+fi
+AM_CONDITIONAL([AMDEP], [test "x$enable_dependency_tracking" != xno])
+AC_SUBST([AMDEPBACKSLASH])dnl
+_AM_SUBST_NOTMAKE([AMDEPBACKSLASH])dnl
+])
+
+# Generate code to set up dependency tracking. -*- Autoconf -*-
+
+# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+#serial 3
+
+# _AM_OUTPUT_DEPENDENCY_COMMANDS
+# ------------------------------
+AC_DEFUN([_AM_OUTPUT_DEPENDENCY_COMMANDS],
+[for mf in $CONFIG_FILES; do
+ # Strip MF so we end up with the name of the file.
+ mf=`echo "$mf" | sed -e 's/:.*$//'`
+ # Check whether this is an Automake generated Makefile or not.
+ # We used to match only the files named `Makefile.in', but
+ # some people rename them; so instead we look at the file content.
+ # Grep'ing the first line is not enough: some people post-process
+ # each Makefile.in and add a new line on top of each file to say so.
+ # Grep'ing the whole file is not good either: AIX grep has a line
+ # limit of 2048, but all sed's we know have understand at least 4000.
+ if sed 10q "$mf" | grep '^#.*generated by automake' > /dev/null 2>&1; then
+ dirpart=`AS_DIRNAME("$mf")`
+ else
+ continue
+ fi
+ # Extract the definition of DEPDIR, am__include, and am__quote
+ # from the Makefile without running `make'.
+ DEPDIR=`sed -n 's/^DEPDIR = //p' < "$mf"`
+ test -z "$DEPDIR" && continue
+ am__include=`sed -n 's/^am__include = //p' < "$mf"`
+ test -z "am__include" && continue
+ am__quote=`sed -n 's/^am__quote = //p' < "$mf"`
+ # When using ansi2knr, U may be empty or an underscore; expand it
+ U=`sed -n 's/^U = //p' < "$mf"`
+ # Find all dependency output files, they are included files with
+ # $(DEPDIR) in their names. We invoke sed twice because it is the
+ # simplest approach to changing $(DEPDIR) to its actual value in the
+ # expansion.
+ for file in `sed -n "
+ s/^$am__include $am__quote\(.*(DEPDIR).*\)$am__quote"'$/\1/p' <"$mf" | \
+ sed -e 's/\$(DEPDIR)/'"$DEPDIR"'/g' -e 's/\$U/'"$U"'/g'`; do
+ # Make sure the directory exists.
+ test -f "$dirpart/$file" && continue
+ fdir=`AS_DIRNAME(["$file"])`
+ AS_MKDIR_P([$dirpart/$fdir])
+ # echo "creating $dirpart/$file"
+ echo '# dummy' > "$dirpart/$file"
+ done
+done
+])# _AM_OUTPUT_DEPENDENCY_COMMANDS
+
+
+# AM_OUTPUT_DEPENDENCY_COMMANDS
+# -----------------------------
+# This macro should only be invoked once -- use via AC_REQUIRE.
+#
+# This code is only required when automatic dependency tracking
+# is enabled. FIXME. This creates each `.P' file that we will
+# need in order to bootstrap the dependency handling code.
+AC_DEFUN([AM_OUTPUT_DEPENDENCY_COMMANDS],
+[AC_CONFIG_COMMANDS([depfiles],
+ [test x"$AMDEP_TRUE" != x"" || _AM_OUTPUT_DEPENDENCY_COMMANDS],
+ [AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac_aux_dir"])
+])
+
+# Do all the work for Automake. -*- Autoconf -*-
+
+# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
+# 2005, 2006 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 12
+
+# This macro actually does too much. Some checks are only needed if
+# your package does certain things. But this isn't really a big deal.
+
+# AM_INIT_AUTOMAKE(PACKAGE, VERSION, [NO-DEFINE])
+# AM_INIT_AUTOMAKE([OPTIONS])
+# -----------------------------------------------
+# The call with PACKAGE and VERSION arguments is the old style
+# call (pre autoconf-2.50), which is being phased out. PACKAGE
+# and VERSION should now be passed to AC_INIT and removed from
+# the call to AM_INIT_AUTOMAKE.
+# We support both call styles for the transition. After
+# the next Automake release, Autoconf can make the AC_INIT
+# arguments mandatory, and then we can depend on a new Autoconf
+# release and drop the old call support.
+AC_DEFUN([AM_INIT_AUTOMAKE],
+[AC_PREREQ([2.60])dnl
+dnl Autoconf wants to disallow AM_ names. We explicitly allow
+dnl the ones we care about.
+m4_pattern_allow([^AM_[A-Z]+FLAGS$])dnl
+AC_REQUIRE([AM_SET_CURRENT_AUTOMAKE_VERSION])dnl
+AC_REQUIRE([AC_PROG_INSTALL])dnl
+if test "`cd $srcdir && pwd`" != "`pwd`"; then
+ # Use -I$(srcdir) only when $(srcdir) != ., so that make's output
+ # is not polluted with repeated "-I."
+ AC_SUBST([am__isrc], [' -I$(srcdir)'])_AM_SUBST_NOTMAKE([am__isrc])dnl
+ # test to see if srcdir already configured
+ if test -f $srcdir/config.status; then
+ AC_MSG_ERROR([source directory already configured; run "make distclean" there first])
+ fi
+fi
+
+# test whether we have cygpath
+if test -z "$CYGPATH_W"; then
+ if (cygpath --version) >/dev/null 2>/dev/null; then
+ CYGPATH_W='cygpath -w'
+ else
+ CYGPATH_W=echo
+ fi
+fi
+AC_SUBST([CYGPATH_W])
+
+# Define the identity of the package.
+dnl Distinguish between old-style and new-style calls.
+m4_ifval([$2],
+[m4_ifval([$3], [_AM_SET_OPTION([no-define])])dnl
+ AC_SUBST([PACKAGE], [$1])dnl
+ AC_SUBST([VERSION], [$2])],
+[_AM_SET_OPTIONS([$1])dnl
+dnl Diagnose old-style AC_INIT with new-style AM_AUTOMAKE_INIT.
+m4_if(m4_ifdef([AC_PACKAGE_NAME], 1)m4_ifdef([AC_PACKAGE_VERSION], 1), 11,,
+ [m4_fatal([AC_INIT should be called with package and version arguments])])dnl
+ AC_SUBST([PACKAGE], ['AC_PACKAGE_TARNAME'])dnl
+ AC_SUBST([VERSION], ['AC_PACKAGE_VERSION'])])dnl
+
+_AM_IF_OPTION([no-define],,
+[AC_DEFINE_UNQUOTED(PACKAGE, "$PACKAGE", [Name of package])
+ AC_DEFINE_UNQUOTED(VERSION, "$VERSION", [Version number of package])])dnl
+
+# Some tools Automake needs.
+AC_REQUIRE([AM_SANITY_CHECK])dnl
+AC_REQUIRE([AC_ARG_PROGRAM])dnl
+AM_MISSING_PROG(ACLOCAL, aclocal-${am__api_version})
+AM_MISSING_PROG(AUTOCONF, autoconf)
+AM_MISSING_PROG(AUTOMAKE, automake-${am__api_version})
+AM_MISSING_PROG(AUTOHEADER, autoheader)
+AM_MISSING_PROG(MAKEINFO, makeinfo)
+AM_PROG_INSTALL_SH
+AM_PROG_INSTALL_STRIP
+AC_REQUIRE([AM_PROG_MKDIR_P])dnl
+# We need awk for the "check" target. The system "awk" is bad on
+# some platforms.
+AC_REQUIRE([AC_PROG_AWK])dnl
+AC_REQUIRE([AC_PROG_MAKE_SET])dnl
+AC_REQUIRE([AM_SET_LEADING_DOT])dnl
+_AM_IF_OPTION([tar-ustar], [_AM_PROG_TAR([ustar])],
+ [_AM_IF_OPTION([tar-pax], [_AM_PROG_TAR([pax])],
+ [_AM_PROG_TAR([v7])])])
+_AM_IF_OPTION([no-dependencies],,
+[AC_PROVIDE_IFELSE([AC_PROG_CC],
+ [_AM_DEPENDENCIES(CC)],
+ [define([AC_PROG_CC],
+ defn([AC_PROG_CC])[_AM_DEPENDENCIES(CC)])])dnl
+AC_PROVIDE_IFELSE([AC_PROG_CXX],
+ [_AM_DEPENDENCIES(CXX)],
+ [define([AC_PROG_CXX],
+ defn([AC_PROG_CXX])[_AM_DEPENDENCIES(CXX)])])dnl
+AC_PROVIDE_IFELSE([AC_PROG_OBJC],
+ [_AM_DEPENDENCIES(OBJC)],
+ [define([AC_PROG_OBJC],
+ defn([AC_PROG_OBJC])[_AM_DEPENDENCIES(OBJC)])])dnl
+])
+])
+
+
+# When config.status generates a header, we must update the stamp-h file.
+# This file resides in the same directory as the config header
+# that is generated. The stamp files are numbered to have different names.
+
+# Autoconf calls _AC_AM_CONFIG_HEADER_HOOK (when defined) in the
+# loop where config.status creates the headers, so we can generate
+# our stamp files there.
+AC_DEFUN([_AC_AM_CONFIG_HEADER_HOOK],
+[# Compute $1's index in $config_headers.
+_am_stamp_count=1
+for _am_header in $config_headers :; do
+ case $_am_header in
+ $1 | $1:* )
+ break ;;
+ * )
+ _am_stamp_count=`expr $_am_stamp_count + 1` ;;
+ esac
+done
+echo "timestamp for $1" >`AS_DIRNAME([$1])`/stamp-h[]$_am_stamp_count])
+
+# Copyright (C) 2001, 2003, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# AM_PROG_INSTALL_SH
+# ------------------
+# Define $install_sh.
+AC_DEFUN([AM_PROG_INSTALL_SH],
+[AC_REQUIRE([AM_AUX_DIR_EXPAND])dnl
+install_sh=${install_sh-"\$(SHELL) $am_aux_dir/install-sh"}
+AC_SUBST(install_sh)])
+
+# Copyright (C) 2003, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 2
+
+# Check whether the underlying file-system supports filenames
+# with a leading dot. For instance MS-DOS doesn't.
+AC_DEFUN([AM_SET_LEADING_DOT],
+[rm -rf .tst 2>/dev/null
+mkdir .tst 2>/dev/null
+if test -d .tst; then
+ am__leading_dot=.
+else
+ am__leading_dot=_
+fi
+rmdir .tst 2>/dev/null
+AC_SUBST([am__leading_dot])])
+
+# Add --enable-maintainer-mode option to configure. -*- Autoconf -*-
+# From Jim Meyering
+
+# Copyright (C) 1996, 1998, 2000, 2001, 2002, 2003, 2004, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 4
+
+AC_DEFUN([AM_MAINTAINER_MODE],
+[AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles])
+ dnl maintainer-mode is disabled by default
+ AC_ARG_ENABLE(maintainer-mode,
+[ --enable-maintainer-mode enable make rules and dependencies not useful
+ (and sometimes confusing) to the casual installer],
+ USE_MAINTAINER_MODE=$enableval,
+ USE_MAINTAINER_MODE=no)
+ AC_MSG_RESULT([$USE_MAINTAINER_MODE])
+ AM_CONDITIONAL(MAINTAINER_MODE, [test $USE_MAINTAINER_MODE = yes])
+ MAINT=$MAINTAINER_MODE_TRUE
+ AC_SUBST(MAINT)dnl
+]
+)
+
+AU_DEFUN([jm_MAINTAINER_MODE], [AM_MAINTAINER_MODE])
+
+# Check to see how 'make' treats includes. -*- Autoconf -*-
+
+# Copyright (C) 2001, 2002, 2003, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 3
+
+# AM_MAKE_INCLUDE()
+# -----------------
+# Check to see how make treats includes.
+AC_DEFUN([AM_MAKE_INCLUDE],
+[am_make=${MAKE-make}
+cat > confinc << 'END'
+am__doit:
+ @echo done
+.PHONY: am__doit
+END
+# If we don't find an include directive, just comment out the code.
+AC_MSG_CHECKING([for style of include used by $am_make])
+am__include="#"
+am__quote=
+_am_result=none
+# First try GNU make style include.
+echo "include confinc" > confmf
+# We grep out `Entering directory' and `Leaving directory'
+# messages which can occur if `w' ends up in MAKEFLAGS.
+# In particular we don't look at `^make:' because GNU make might
+# be invoked under some other name (usually "gmake"), in which
+# case it prints its new name instead of `make'.
+if test "`$am_make -s -f confmf 2> /dev/null | grep -v 'ing directory'`" = "done"; then
+ am__include=include
+ am__quote=
+ _am_result=GNU
+fi
+# Now try BSD make style include.
+if test "$am__include" = "#"; then
+ echo '.include "confinc"' > confmf
+ if test "`$am_make -s -f confmf 2> /dev/null`" = "done"; then
+ am__include=.include
+ am__quote="\""
+ _am_result=BSD
+ fi
+fi
+AC_SUBST([am__include])
+AC_SUBST([am__quote])
+AC_MSG_RESULT([$_am_result])
+rm -f confinc confmf
+])
+
+# Fake the existence of programs that GNU maintainers use. -*- Autoconf -*-
+
+# Copyright (C) 1997, 1999, 2000, 2001, 2003, 2004, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 5
+
+# AM_MISSING_PROG(NAME, PROGRAM)
+# ------------------------------
+AC_DEFUN([AM_MISSING_PROG],
+[AC_REQUIRE([AM_MISSING_HAS_RUN])
+$1=${$1-"${am_missing_run}$2"}
+AC_SUBST($1)])
+
+
+# AM_MISSING_HAS_RUN
+# ------------------
+# Define MISSING if not defined so far and test if it supports --run.
+# If it does, set am_missing_run to use it, otherwise, to nothing.
+AC_DEFUN([AM_MISSING_HAS_RUN],
+[AC_REQUIRE([AM_AUX_DIR_EXPAND])dnl
+AC_REQUIRE_AUX_FILE([missing])dnl
+test x"${MISSING+set}" = xset || MISSING="\${SHELL} $am_aux_dir/missing"
+# Use eval to expand $SHELL
+if eval "$MISSING --run true"; then
+ am_missing_run="$MISSING --run "
+else
+ am_missing_run=
+ AC_MSG_WARN([`missing' script is too old or missing])
+fi
+])
+
+# Copyright (C) 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# AM_PROG_MKDIR_P
+# ---------------
+# Check for `mkdir -p'.
+AC_DEFUN([AM_PROG_MKDIR_P],
+[AC_PREREQ([2.60])dnl
+AC_REQUIRE([AC_PROG_MKDIR_P])dnl
+dnl Automake 1.8 to 1.9.6 used to define mkdir_p. We now use MKDIR_P,
+dnl while keeping a definition of mkdir_p for backward compatibility.
+dnl @MKDIR_P@ is magic: AC_OUTPUT adjusts its value for each Makefile.
+dnl However we cannot define mkdir_p as $(MKDIR_P) for the sake of
+dnl Makefile.ins that do not define MKDIR_P, so we do our own
+dnl adjustment using top_builddir (which is defined more often than
+dnl MKDIR_P).
+AC_SUBST([mkdir_p], ["$MKDIR_P"])dnl
+case $mkdir_p in
+ [[\\/$]]* | ?:[[\\/]]*) ;;
+ */*) mkdir_p="\$(top_builddir)/$mkdir_p" ;;
+esac
+])
+
+# Helper functions for option handling. -*- Autoconf -*-
+
+# Copyright (C) 2001, 2002, 2003, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 3
+
+# _AM_MANGLE_OPTION(NAME)
+# -----------------------
+AC_DEFUN([_AM_MANGLE_OPTION],
+[[_AM_OPTION_]m4_bpatsubst($1, [[^a-zA-Z0-9_]], [_])])
+
+# _AM_SET_OPTION(NAME)
+# ------------------------------
+# Set option NAME. Presently that only means defining a flag for this option.
+AC_DEFUN([_AM_SET_OPTION],
+[m4_define(_AM_MANGLE_OPTION([$1]), 1)])
+
+# _AM_SET_OPTIONS(OPTIONS)
+# ----------------------------------
+# OPTIONS is a space-separated list of Automake options.
+AC_DEFUN([_AM_SET_OPTIONS],
+[AC_FOREACH([_AM_Option], [$1], [_AM_SET_OPTION(_AM_Option)])])
+
+# _AM_IF_OPTION(OPTION, IF-SET, [IF-NOT-SET])
+# -------------------------------------------
+# Execute IF-SET if OPTION is set, IF-NOT-SET otherwise.
+AC_DEFUN([_AM_IF_OPTION],
+[m4_ifset(_AM_MANGLE_OPTION([$1]), [$2], [$3])])
+
+# Check to make sure that the build environment is sane. -*- Autoconf -*-
+
+# Copyright (C) 1996, 1997, 2000, 2001, 2003, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 4
+
+# AM_SANITY_CHECK
+# ---------------
+AC_DEFUN([AM_SANITY_CHECK],
+[AC_MSG_CHECKING([whether build environment is sane])
+# Just in case
+sleep 1
+echo timestamp > conftest.file
+# Do `set' in a subshell so we don't clobber the current shell's
+# arguments. Must try -L first in case configure is actually a
+# symlink; some systems play weird games with the mod time of symlinks
+# (eg FreeBSD returns the mod time of the symlink's containing
+# directory).
+if (
+ set X `ls -Lt $srcdir/configure conftest.file 2> /dev/null`
+ if test "$[*]" = "X"; then
+ # -L didn't work.
+ set X `ls -t $srcdir/configure conftest.file`
+ fi
+ rm -f conftest.file
+ if test "$[*]" != "X $srcdir/configure conftest.file" \
+ && test "$[*]" != "X conftest.file $srcdir/configure"; then
+
+ # If neither matched, then we have a broken ls. This can happen
+ # if, for instance, CONFIG_SHELL is bash and it inherits a
+ # broken ls alias from the environment. This has actually
+ # happened. Such a system could not be considered "sane".
+ AC_MSG_ERROR([ls -t appears to fail. Make sure there is not a broken
+alias in your environment])
+ fi
+
+ test "$[2]" = conftest.file
+ )
+then
+ # Ok.
+ :
+else
+ AC_MSG_ERROR([newly created file is older than distributed files!
+Check your system clock])
+fi
+AC_MSG_RESULT(yes)])
+
+# Copyright (C) 2001, 2003, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# AM_PROG_INSTALL_STRIP
+# ---------------------
+# One issue with vendor `install' (even GNU) is that you can't
+# specify the program used to strip binaries. This is especially
+# annoying in cross-compiling environments, where the build's strip
+# is unlikely to handle the host's binaries.
+# Fortunately install-sh will honor a STRIPPROG variable, so we
+# always use install-sh in `make install-strip', and initialize
+# STRIPPROG with the value of the STRIP variable (set by the user).
+AC_DEFUN([AM_PROG_INSTALL_STRIP],
+[AC_REQUIRE([AM_PROG_INSTALL_SH])dnl
+# Installed binaries are usually stripped using `strip' when the user
+# run `make install-strip'. However `strip' might not be the right
+# tool to use in cross-compilation environments, therefore Automake
+# will honor the `STRIP' environment variable to overrule this program.
+dnl Don't test for $cross_compiling = yes, because it might be `maybe'.
+if test "$cross_compiling" != no; then
+ AC_CHECK_TOOL([STRIP], [strip], :)
+fi
+INSTALL_STRIP_PROGRAM="\$(install_sh) -c -s"
+AC_SUBST([INSTALL_STRIP_PROGRAM])])
+
+# Copyright (C) 2006 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# _AM_SUBST_NOTMAKE(VARIABLE)
+# ---------------------------
+# Prevent Automake from outputing VARIABLE = @VARIABLE@ in Makefile.in.
+# This macro is traced by Automake.
+AC_DEFUN([_AM_SUBST_NOTMAKE])
+
+# Check how to create a tarball. -*- Autoconf -*-
+
+# Copyright (C) 2004, 2005 Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 2
+
+# _AM_PROG_TAR(FORMAT)
+# --------------------
+# Check how to create a tarball in format FORMAT.
+# FORMAT should be one of `v7', `ustar', or `pax'.
+#
+# Substitute a variable $(am__tar) that is a command
+# writing to stdout a FORMAT-tarball containing the directory
+# $tardir.
+# tardir=directory && $(am__tar) > result.tar
+#
+# Substitute a variable $(am__untar) that extract such
+# a tarball read from stdin.
+# $(am__untar) < result.tar
+AC_DEFUN([_AM_PROG_TAR],
+[# Always define AMTAR for backward compatibility.
+AM_MISSING_PROG([AMTAR], [tar])
+m4_if([$1], [v7],
+ [am__tar='${AMTAR} chof - "$$tardir"'; am__untar='${AMTAR} xf -'],
+ [m4_case([$1], [ustar],, [pax],,
+ [m4_fatal([Unknown tar format])])
+AC_MSG_CHECKING([how to create a $1 tar archive])
+# Loop over all known methods to create a tar archive until one works.
+_am_tools='gnutar m4_if([$1], [ustar], [plaintar]) pax cpio none'
+_am_tools=${am_cv_prog_tar_$1-$_am_tools}
+# Do not fold the above two line into one, because Tru64 sh and
+# Solaris sh will not grok spaces in the rhs of `-'.
+for _am_tool in $_am_tools
+do
+ case $_am_tool in
+ gnutar)
+ for _am_tar in tar gnutar gtar;
+ do
+ AM_RUN_LOG([$_am_tar --version]) && break
+ done
+ am__tar="$_am_tar --format=m4_if([$1], [pax], [posix], [$1]) -chf - "'"$$tardir"'
+ am__tar_="$_am_tar --format=m4_if([$1], [pax], [posix], [$1]) -chf - "'"$tardir"'
+ am__untar="$_am_tar -xf -"
+ ;;
+ plaintar)
+ # Must skip GNU tar: if it does not support --format= it doesn't create
+ # ustar tarball either.
+ (tar --version) >/dev/null 2>&1 && continue
+ am__tar='tar chf - "$$tardir"'
+ am__tar_='tar chf - "$tardir"'
+ am__untar='tar xf -'
+ ;;
+ pax)
+ am__tar='pax -L -x $1 -w "$$tardir"'
+ am__tar_='pax -L -x $1 -w "$tardir"'
+ am__untar='pax -r'
+ ;;
+ cpio)
+ am__tar='find "$$tardir" -print | cpio -o -H $1 -L'
+ am__tar_='find "$tardir" -print | cpio -o -H $1 -L'
+ am__untar='cpio -i -H $1 -d'
+ ;;
+ none)
+ am__tar=false
+ am__tar_=false
+ am__untar=false
+ ;;
+ esac
+
+ # If the value was cached, stop now. We just wanted to have am__tar
+ # and am__untar set.
+ test -n "${am_cv_prog_tar_$1}" && break
+
+ # tar/untar a dummy directory, and stop if the command works
+ rm -rf conftest.dir
+ mkdir conftest.dir
+ echo GrepMe > conftest.dir/file
+ AM_RUN_LOG([tardir=conftest.dir && eval $am__tar_ >conftest.tar])
+ rm -rf conftest.dir
+ if test -s conftest.tar; then
+ AM_RUN_LOG([$am__untar <conftest.tar])
+ grep GrepMe conftest.dir/file >/dev/null 2>&1 && break
+ fi
+done
+rm -rf conftest.dir
+
+AC_CACHE_VAL([am_cv_prog_tar_$1], [am_cv_prog_tar_$1=$_am_tool])
+AC_MSG_RESULT([$am_cv_prog_tar_$1])])
+AC_SUBST([am__tar])
+AC_SUBST([am__untar])
+]) # _AM_PROG_TAR
+
+m4_include([../../../../aclocal/bsp-configure.m4])
+m4_include([../../../../aclocal/bspopts.m4])
+m4_include([../../../../aclocal/canonical-target-name.m4])
+m4_include([../../../../aclocal/canonicalize-tools.m4])
+m4_include([../../../../aclocal/check-custom-bsp.m4])
+m4_include([../../../../aclocal/check-multiprocessing.m4])
+m4_include([../../../../aclocal/check-networking.m4])
+m4_include([../../../../aclocal/check-tool.m4])
+m4_include([../../../../aclocal/enable-multiprocessing.m4])
+m4_include([../../../../aclocal/enable-networking.m4])
+m4_include([../../../../aclocal/env-rtemsbsp.m4])
+m4_include([../../../../aclocal/gcc-isystem.m4])
+m4_include([../../../../aclocal/gcc-pipe.m4])
+m4_include([../../../../aclocal/gcc-specs.m4])
+m4_include([../../../../aclocal/multilib.m4])
+m4_include([../../../../aclocal/ppc.m4])
+m4_include([../../../../aclocal/prog-cc.m4])
+m4_include([../../../../aclocal/prog-ccas.m4])
+m4_include([../../../../aclocal/project-root.m4])
+m4_include([../../../../aclocal/rtems-ampolish.m4])
+m4_include([../../../../aclocal/rtems-top.m4])
+m4_include([../../../../aclocal/version.m4])
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/bsp_specs b/c/src/lib/libbsp/powerpc/gen83xx/bsp_specs
new file mode 100644
index 0000000000..d6d0da2360
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/bsp_specs
@@ -0,0 +1,15 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+%rename link old_link
+
+*startfile:
+%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s \
+%{!qrtems_debug: start.o%s} \
+%{qrtems_debug: start_g.o%s}}}
+
+*endfile:
+%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s ecrtn.o%s}
+
+*link:
+%{!qrtems: %(old_link)} %{qrtems: -dc -dp -u __vectors -N -u start -e start}
+
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/configure.ac b/c/src/lib/libbsp/powerpc/gen83xx/configure.ac
new file mode 100644
index 0000000000..1932321d47
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/configure.ac
@@ -0,0 +1,36 @@
+## Process this file with autoconf to produce a configure script.
+##
+## $Id$
+
+AC_PREREQ(2.60)
+AC_INIT([rtems-c-src-lib-libbsp-powerpc-gen5200],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
+AC_CONFIG_SRCDIR([bsp_specs])
+RTEMS_TOP(../../../../../..)
+
+RTEMS_CANONICAL_TARGET_CPU
+AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.10])
+RTEMS_BSP_CONFIGURE
+
+RTEMS_PROG_CC_FOR_TARGET([-ansi -fasm])
+RTEMS_CANONICALIZE_TOOLS
+RTEMS_PROG_CCAS
+
+RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1])
+RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE],
+[If defined, the data cache will be enabled after address translation
+ is turned on.])
+
+RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1])
+RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE],
+[If defined, the instruction cache will be enabled after address translation
+ is turned on.])
+
+RTEMS_CHECK_NETWORKING
+AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
+
+# Explicitly list all Makefiles here
+AC_CONFIG_FILES([Makefile])
+
+RTEMS_PPC_EXCEPTIONS
+
+AC_OUTPUT
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/console/config.c b/c/src/lib/libbsp/powerpc/gen83xx/console/config.c
new file mode 100644
index 0000000000..91e7b4ee56
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/console/config.c
@@ -0,0 +1,131 @@
+/*===============================================================*\
+| Project: RTEMS generic MPC83xx BSP |
++-----------------------------------------------------------------+
+| This file has been adapted from the ep1a BSP to MPC83xx by |
+| Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> |
+| Copyright (c) 2007 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
+| |
+| See the other copyright notice below for the original parts. |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file contains the console driver configuration tables |
+\*===============================================================*/
+/* derived from: */
+/*
+ * This file contains the TTY driver table for the EP1A
+ *
+ * COPYRIGHT (c) 1989-1999.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+ */
+
+#include <libchip/serial.h>
+#include "ns16550cfg.h"
+#include <bsp.h>
+#include <libcpu/io.h>
+#include <mpc83xx/mpc83xx.h>
+
+/*
+ * Based on BSP configuration information decide whether to do polling IO
+ * or interrupt driven IO.
+ */
+
+#define NS16550_FUNCTIONS &ns16550_fns_polled
+
+/*
+ * The following table configures the console drivers used in this BSP.
+ *
+ * The first entry which, when probed, is available, will be named /dev/console,
+ * all others being given the name indicated.
+ *
+ * Each field is interpreted thus:
+ *
+ * sDeviceName This is the name of the device.
+ * pDeviceFns This is a pointer to the set of driver routines to use.
+ * pDeviceFlow This is a pointer to the set of flow control routines to
+ * use. Serial device drivers will typically supply RTSCTS
+ * and DTRCTS handshake routines for DCE to DCE communication,
+ * however for DCE to DTE communication, no such routines
+ * should be necessary as RTS will be driven automatically
+ * when the transmitter is active.
+ * ulMargin The high water mark in the input buffer is set to the buffer
+ * size less ulMargin. Once this level is reached, the driver's
+ * flow control routine used to stop the remote transmitter will
+ * be called. This figure should be greater than or equal to
+ * the number of stages of FIFO between the transmitter and
+ * receiver.
+ * ulHysteresis After the high water mark specified by ulMargin has been
+ * reached, the driver's routine to re-start the remote
+ * transmitter will be called once the level in the input
+ * buffer has fallen by ulHysteresis bytes.
+ * pDeviceParams This contains either device specific data or a pointer to a
+ * device specific structure containing additional information
+ * not provided in this table.
+ * ulCtrlPort1 This is the primary control port number for the device. This
+ * may be used to specify different instances of the same device
+ * type.
+ * ulCtrlPort2 This is the secondary control port number, of use when a given
+ * device has more than one available channel.
+ * ulDataPort This is the port number for the data port of the device
+ * ulIntVector This encodes the interrupt vector of the device.
+ *
+ */
+console_tbl Console_Port_Tbl[] = {
+ /*
+ * NS16550 Chips provide first ttyS0/1 Ports.
+ */
+ {
+ "/dev/ttyS0", /* sDeviceName */
+ SERIAL_NS16550, /* deviceType */
+ NS16550_FUNCTIONS, /* pDeviceFns */
+ NULL, /* deviceProbe */
+ &ns16550_flow_RTSCTS, /* pDeviceFlow */
+ 16, /* ulMargin */
+ 8, /* ulHysteresis */
+ (void *)9600, /* baud rate */ /* pDeviceParams */
+ (uint32_t)&(mpc83xx.duart[0]), /* ulCtrlPort1e */
+ 0, /* ulCtrlPort2 */
+ (uint32_t)&(mpc83xx.duart[0]), /* ulDataPort */
+ Read_ns16550_register, /* getRegister */
+ Write_ns16550_register, /* setRegister */
+ NULL, /* getData */
+ NULL, /* setData */
+ BSP_CSB_CLK_FRQ, /* ulClock */
+ 0 /* ulIntVector */
+ },
+ {
+ "/dev/ttyS1", /* sDeviceName */
+ SERIAL_NS16550, /* deviceType */
+ NS16550_FUNCTIONS, /* pDeviceFns */
+ NULL, /* deviceProbe */
+ &ns16550_flow_RTSCTS, /* pDeviceFlow */
+ 16, /* ulMargin */
+ 8, /* ulHysteresis */
+ (void *)9600, /* baud rate */ /* pDeviceParams */
+ (uint32_t)&(mpc83xx.duart[1]), /* ulCtrlPort1-Filled in at runtime */
+ 0, /* ulCtrlPort2 */
+ (uint32_t)&(mpc83xx.duart[1]), /* ulDataPort-Filled in at runtime*/
+ Read_ns16550_register, /* getRegister */
+ Write_ns16550_register, /* setRegister */
+ NULL, /* getData */
+ NULL, /* setData */
+ BSP_CSB_CLK_FRQ, /* ulClock */
+ 0 /* ulIntVector */
+ }
+};
+
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/console/console.c b/c/src/lib/libbsp/powerpc/gen83xx/console/console.c
new file mode 100644
index 0000000000..8fadc46d3e
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/console/console.c
@@ -0,0 +1,340 @@
+/*===============================================================*\
+| Project: RTEMS generic MPC83xx BSP |
++-----------------------------------------------------------------+
+| This file has been adapted from the ep1a BSP to MPC83xx by |
+| Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> |
+| Copyright (c) 2007 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
+| |
+| See the other copyright notice below for the original parts. |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file contains the console driver |
+\*===============================================================*/
+/* derived from: */
+/*
+ * This file contains the TTY driver for the ep1a
+ *
+ * This driver uses the termios pseudo driver.
+ *
+ * COPYRIGHT (c) 1989-1999.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+ */
+
+#include <bsp.h>
+#include <rtems/libio.h>
+#include <stdlib.h>
+#include <assert.h>
+#include <termios.h>
+
+#include "console.h"
+#include <rtems/bspIo.h>
+
+/*
+ * Load configuration table
+ */
+#include "config.c"
+
+#define NUM_CONSOLE_PORTS (sizeof(Console_Port_Tbl)/sizeof(console_tbl))
+
+console_data Console_Port_Data[NUM_CONSOLE_PORTS];
+unsigned long Console_Port_Count;
+rtems_device_minor_number Console_Port_Minor;
+rtems_boolean Console_Is_Initialized = FALSE;
+/* PAGE
+ *
+ * console_open
+ *
+ * open a port as a termios console.
+ *
+ */
+rtems_device_driver console_open(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ rtems_status_code status;
+ rtems_libio_open_close_args_t *args = arg;
+ rtems_termios_callbacks Callbacks;
+ console_fns *c;
+
+ /*
+ * Verify the port number is valid.
+ */
+ if(minor>Console_Port_Count)
+ {
+ return RTEMS_INVALID_NUMBER;
+ }
+
+ /*
+ * open the port as a termios console driver.
+ */
+ c = Console_Port_Tbl[minor].pDeviceFns;
+ Callbacks.firstOpen = c->deviceFirstOpen;
+ Callbacks.lastClose = c->deviceLastClose;
+ Callbacks.pollRead = c->deviceRead;
+ Callbacks.write = c->deviceWrite;
+ Callbacks.setAttributes = c->deviceSetAttributes;
+ Callbacks.stopRemoteTx =
+ Console_Port_Tbl[minor].pDeviceFlow->deviceStopRemoteTx;
+ Callbacks.startRemoteTx =
+ Console_Port_Tbl[minor].pDeviceFlow->deviceStartRemoteTx;
+ Callbacks.outputUsesInterrupts = c->deviceOutputUsesInterrupts;
+ status = rtems_termios_open ( major, minor, arg, &Callbacks);
+ Console_Port_Data[minor].termios_data = args->iop->data1;
+
+ return status;
+}
+
+rtems_device_driver console_close(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ rtems_libio_open_close_args_t *args = arg;
+
+ if((args->iop->flags&LIBIO_FLAGS_READ) &&
+ Console_Port_Tbl[minor].pDeviceFlow &&
+ Console_Port_Tbl[minor].pDeviceFlow->deviceStopRemoteTx)
+ {
+ Console_Port_Tbl[minor].pDeviceFlow->deviceStopRemoteTx(minor);
+ }
+
+ return rtems_termios_close (arg);
+}
+
+rtems_device_driver console_read(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ return rtems_termios_read (arg);
+}
+
+rtems_device_driver console_write(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ return rtems_termios_write (arg);
+}
+
+rtems_device_driver console_control(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ return rtems_termios_ioctl (arg);
+}
+
+/* PAGE
+ *
+ * console_initialize
+ *
+ * Routine called to initialize the console device driver.
+ */
+rtems_device_driver console_initialize(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void *arg
+)
+{
+ rtems_status_code status;
+
+ /*
+ * initialize the termio interface.
+ */
+ rtems_termios_initialize();
+
+ Console_Port_Count=NUM_CONSOLE_PORTS;
+
+ for(minor=0;
+ minor<Console_Port_Count;
+ minor++)
+ {
+ /*
+ * First perform the configuration dependant probe, then the
+ * device dependant probe
+ */
+ if((!Console_Port_Tbl[minor].deviceProbe ||
+ Console_Port_Tbl[minor].deviceProbe(minor)) &&
+ Console_Port_Tbl[minor].pDeviceFns->deviceProbe(minor))
+ {
+ /*
+ * Use this device for the console
+ */
+ break;
+ }
+ }
+ if(minor==Console_Port_Count)
+ {
+ /*
+ * Failed to find a working device
+ */
+ rtems_fatal_error_occurred(RTEMS_IO_ERROR);
+ }
+
+ Console_Port_Minor=minor;
+
+ /*
+ * Register Device Names
+ */
+
+ status = rtems_io_register_name("/dev/console",
+ major,
+ Console_Port_Minor );
+ if (status != RTEMS_SUCCESSFUL)
+ {
+ rtems_fatal_error_occurred(status);
+ }
+ if ( Console_Port_Tbl[Console_Port_Minor].pDeviceFns->deviceInitialize ) {
+ Console_Port_Tbl[Console_Port_Minor]
+ .pDeviceFns->deviceInitialize(Console_Port_Minor);
+ Console_Is_Initialized = TRUE;
+ }
+
+ for(minor++;minor<Console_Port_Count;minor++)
+ {
+ /*
+ * First perform the configuration dependant probe, then the
+ * device dependant probe
+ */
+ if((!Console_Port_Tbl[minor].deviceProbe ||
+ Console_Port_Tbl[minor].deviceProbe(minor)) &&
+ Console_Port_Tbl[minor].pDeviceFns->deviceProbe(minor))
+ {
+ status = rtems_io_register_name(
+ Console_Port_Tbl[minor].sDeviceName,
+ major,
+ minor );
+ if (status != RTEMS_SUCCESSFUL)
+ {
+ rtems_fatal_error_occurred(status);
+ }
+
+ /*
+ * Initialize the hardware device.
+ */
+ if ( Console_Port_Tbl[minor].pDeviceFns->deviceInitialize )
+ Console_Port_Tbl[minor].pDeviceFns->deviceInitialize( minor);
+ }
+ }
+
+ return RTEMS_SUCCESSFUL;
+}
+
+/* PAGE
+ *
+ * DEBUG_puts
+ *
+ * This should be safe in the event of an error. It attempts to ensure
+ * that no TX empty interrupts occur while it is doing polled IO. Then
+ * it restores the state of that external interrupt.
+ *
+ * Input parameters:
+ * string - pointer to debug output string
+ *
+ * Output parameters: NONE
+ *
+ * Return values: NONE
+ */
+
+void DEBUG_puts(
+ char *string
+)
+{
+ char *s;
+ uint32_t Irql;
+
+ rtems_interrupt_disable(Irql);
+
+ for ( s = string ; *s ; s++ )
+ {
+ Console_Port_Tbl[Console_Port_Minor].pDeviceFns->
+ deviceWritePolled(Console_Port_Minor, *s);
+ }
+
+ rtems_interrupt_enable(Irql);
+}
+
+/* PAGE
+ *
+ * DEBUG_puth
+ *
+ * This should be safe in the event of an error. It attempts to ensure
+ * that no TX empty interrupts occur while it is doing polled IO. Then
+ * it restores the state of that external interrupt.
+ *
+ * Input parameters:
+ * ulHexNum - value to display
+ *
+ * Output parameters: NONE
+ *
+ * Return values: NONE
+ */
+void
+DEBUG_puth(
+ uint32_t ulHexNum
+ )
+{
+ unsigned long i,d;
+ uint32_t Irql;
+
+ rtems_interrupt_disable(Irql);
+
+ Console_Port_Tbl[Console_Port_Minor].pDeviceFns->
+ deviceWritePolled(Console_Port_Minor, '0');
+ Console_Port_Tbl[Console_Port_Minor].pDeviceFns->
+ deviceWritePolled(Console_Port_Minor, 'x');
+
+ for(i=32;i;)
+ {
+ i-=4;
+ d=(ulHexNum>>i)&0xf;
+ Console_Port_Tbl[Console_Port_Minor].pDeviceFns->
+ deviceWritePolled(Console_Port_Minor,
+ (d<=9) ? d+'0' : d+'a'-0xa);
+ }
+
+ rtems_interrupt_enable(Irql);
+}
+
+
+/* const char arg to be compatible with BSP_output_char decl. */
+void
+debug_putc_onlcr(const char c)
+{
+ uint32_t Irql;
+ if (Console_Is_Initialized) {
+ rtems_interrupt_disable(Irql);
+
+ Console_Port_Tbl[Console_Port_Minor].pDeviceFns->
+ deviceWritePolled(Console_Port_Minor,c);
+
+ rtems_interrupt_enable(Irql);
+ }
+}
+
+BSP_output_char_function_type BSP_output_char = debug_putc_onlcr;
+/* const char arg to be compatible with BSP_output_char decl. */
+
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/console/console.h b/c/src/lib/libbsp/powerpc/gen83xx/console/console.h
new file mode 100644
index 0000000000..1ea45595bd
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/console/console.h
@@ -0,0 +1,38 @@
+/*
+ * This file contains the TTY driver table definition for the PPCn_60x
+ *
+ * This driver uses the termios pseudo driver.
+ *
+ * COPYRIGHT (c) 1998 by Radstone Technology
+ *
+ *
+ * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
+ * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
+ * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
+ *
+ * You are hereby granted permission to use, copy, modify, and distribute
+ * this file, provided that this notice, plus the above copyright notice
+ * and disclaimer, appears in all copies. Radstone Technology will provide
+ * no support for this code.
+ *
+ *
+ * COPYRIGHT (c) 1989-1999.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+*/
+
+#include <rtems/ringbuf.h>
+#include <libchip/serial.h>
+#include <libchip/ns16550.h>
+
+extern console_tbl Console_Port_Tbl[];
+extern console_data Console_Port_Data[];
+extern unsigned long Console_Port_Count;
+
+boolean Console_Port_Tbl_Init_ppc8245(int minor);
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.c b/c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.c
new file mode 100644
index 0000000000..2a2ab64138
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.c
@@ -0,0 +1,67 @@
+/*===============================================================*\
+| Project: RTEMS generic MPC83xx BSP |
++-----------------------------------------------------------------+
+| This file has been adapted from the ep1a BSP to MPC83xx by |
+| Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> |
+| Copyright (c) 2007 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
+| |
+| See the other copyright notice below for the original parts. |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file contains the DUART access routines |
+\*===============================================================*/
+/* derived from: */
+/*
+ * This include file contains all console driver definations for the nc16550
+ *
+ * COPYRIGHT (c) 1989-1999.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include "console.h"
+
+typedef struct uart_reg
+{
+ volatile unsigned char reg;
+} uartReg;
+
+uint8_t Read_ns16550_register(
+ uint32_t ulCtrlPort,
+ uint8_t ucRegNum
+)
+{
+ struct uart_reg *p = (struct uart_reg *)ulCtrlPort;
+ uint8_t ucData;
+ ucData = p[ucRegNum].reg;
+ asm volatile("sync");
+ return ucData;
+}
+
+void Write_ns16550_register(
+ uint32_t ulCtrlPort,
+ uint8_t ucRegNum,
+ uint8_t ucData
+)
+{
+ struct uart_reg *p = (struct uart_reg *)ulCtrlPort;
+ p[ucRegNum].reg = ucData;
+ asm volatile("sync");
+}
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.h b/c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.h
new file mode 100644
index 0000000000..4f4c9955cf
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.h
@@ -0,0 +1,57 @@
+/* nc16550cfg.h
+ *
+ * This include file contains all console driver definations for the nc16550
+ *
+ * COPYRIGHT (c) 1998 by Radstone Technology
+ *
+ *
+ * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
+ * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
+ * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
+ *
+ * You are hereby granted permission to use, copy, modify, and distribute
+ * this file, provided that this notice, plus the above copyright notice
+ * and disclaimer, appears in all copies. Radstone Technology will provide
+ * no support for this code.
+ *
+ * COPYRIGHT (c) 1989-1999.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+ */
+
+#ifndef __NS16550_CONFIG_H
+#define __NS16550_CONFIG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Board specific register access routines
+ */
+
+uint8_t Read_ns16550_register(
+ uint32_t ulCtrlPort,
+ uint8_t ucRegNum
+);
+
+void Write_ns16550_register(
+ uint32_t ulCtrlPort,
+ uint8_t ucRegNum,
+ uint8_t ucData
+);
+
+extern console_fns ns16550_fns_8245;
+extern console_fns ns16550_fns_polled_8245;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h b/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h
new file mode 100644
index 0000000000..edd2c8a728
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h
@@ -0,0 +1,220 @@
+/*===============================================================*\
+| Project: RTEMS generic MPC83xx BSP |
++-----------------------------------------------------------------+
+| Copyright (c) 2007 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file contains board specific definitions |
+\*===============================================================*/
+
+#ifndef __GEN83xx_BSP_h
+#define __GEN83xx_BSP_h
+
+/*
+ * distinguish board characteristics
+ */
+/*
+ * for Freescale MPC8349 EAMDS
+ */
+#if defined(MPC8349EAMDS)
+/*
+ * two DUART channels supported
+ */
+#define GEN83xx_DUART_AVAIL_MASK 0x03
+
+/* we need the low level initialization in start.S*/
+#define NEED_LOW_LEVEL_INIT
+/*
+ * clocking infos
+ */
+#define BSP_CLKIN_FRQ 66000000L
+#define BSP_SYSPLL_MF 4 /* FIXME: derive from clock register */
+
+/*
+ * address range definitions
+ */
+/* ROM definitions (2 MB) */
+#define ROM_START 0xFFE00000
+#define ROM_SIZE 0x00200000
+#define ROM_END (ROM_START+ROM_SIZE-1)
+#define BOOT_START ROM_START
+#define BOOT_END ROM_END
+
+/* SDRAM definitions (256 MB) */
+#define RAM_START 0x00000000
+#define RAM_SIZE 0x10000000
+#define RAM_END (RAM_START+RAM_SIZE-1)
+
+/* working internal memory map base address */
+#define IMMRBAR 0xE0000000
+
+/*
+ * working values for various registers, used in start/start.S
+ */
+/*
+ * Local Access Windows
+ * FIXME: decode bit settings
+ */
+#define LBLAWBAR0_VAL 0xFE000000
+#define LBLAWAR0_VAL 0x80000016
+#define LBLAWBAR1_VAL 0xF8000000
+#define LBLAWAR1_VAL 0x8000000E
+#define LBLAWBAR2_VAL 0xF0000000
+#define LBLAWAR2_VAL 0x80000019
+#define DDRLAWBAR0_VAL 0x00000000
+#define DDRLAWAR0_VAL 0x8000001B
+/*
+ * Local Bus (Memory) Controller
+ * FIXME: decode bit settings
+ */
+#define BR0_VAL 0xFE001001
+#define OR0_VAL 0xFF806FF7
+#define BR1_VAL 0xF8000801
+#define OR1_VAL 0xFFFFE8F0
+#define BR2_VAL 0xF0001861
+#define OR2_VAL 0xFC006901
+/*
+ * SDRAM registers
+ * FIXME: decode bit settings
+ */
+#define MRPTR_VAL 0x20000000
+#define LSRT_VAL 0x32000000
+#define LSDMR_VAL 0x4062D733
+#define LCRR_VAL 0x80000004
+
+/*
+ * DDR-SDRAM registers
+ * FIXME: decode bit settings
+ */
+#define CS2_BNDS_VAL 0x00000007
+#define CS3_BNDS_VAL 0x0008000F
+#define CS2_CONFIG_VAL 0x80000101
+#define CS3_CONFIG_VAL 0x80000101
+#define TIMING_CFG_1_VAL 0x36333321
+#define TIMING_CFG_2_VAL 0x00000800
+#define DDR_SDRAM_CFG_VAL 0xC2000000
+#define DDR_SDRAM_MODE_VAL 0x00000022
+#define DDR_SDRAM_INTTVL_VAL 0x045B0100
+#define DDR_SDRAM_CLK_CNTL_VAL 0x00000000
+
+#else
+#error "board type not defined"
+#endif
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "bspopts.h"
+
+#include <rtems.h>
+#include <rtems/console.h>
+#include <rtems/clockdrv.h>
+#include <bsp/irq.h>
+#include <bsp/vectors.h>
+
+/*
+ * Network driver configuration
+ */
+struct rtems_bsdnet_ifconfig;
+extern int rtems_mpc83xx_tsec_driver_attach_detach (struct rtems_bsdnet_ifconfig *config, int attaching);
+#define RTEMS_BSP_NETWORK_DRIVER_NAME "tsec1"
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mpc83xx_tsec_driver_attach_detach
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+/*
+ * We need to decide how much memory will be non-cacheable. This
+ * will mainly be memory that will be used in DMA (network and serial
+ * buffers).
+ */
+/*
+ * Stuff for Time Test 27
+ */
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+/*
+ * Device Driver Table Entries
+ */
+
+/*
+ * NOTE: Use the standard Console driver entry
+ */
+#define BSP_UART1_MINOR 0
+#define BSP_UART2_MINOR 1
+
+/*
+ * NOTE: Use the standard Clock driver entry
+ */
+
+/*
+ * indicate, that BSP has no IDE driver
+ */
+#undef RTEMS_BSP_HAS_IDE_DRIVER
+
+/*
+ * How many libio files we want
+ */
+#define BSP_LIBIO_MAX_FDS 20
+
+/* misc macros */
+#define BSP_ARRAY_CNT(arr) (sizeof(arr)/sizeof(arr[0]))
+
+/* functions */
+
+void bsp_cleanup(void);
+
+/* console modes (only termios) */
+#ifdef PRINTK_MINOR
+#undef PRINTK_MINOR
+#endif
+#define PRINTK_MINOR BSP_UART1_MINOR
+
+#define SINGLE_CHAR_MODE
+#define UARTS_USE_TERMIOS_INT 1
+
+/*
+ * Convert decrement value to tenths of microsecnds (used by
+ * shared timer driver).
+ *
+ * + CPU has a csb_clock bus,
+ * + There are 4 bus cycles per click
+ * + We return value in 1/10 microsecond units.
+ * Modified following equation to integer equation to remove
+ * floating point math.
+ * (int) ((float)(_value) / ((XLB_CLOCK/1000000 * 0.1) / 4.0))
+ */
+#define BSP_CSB_CLK_FRQ (BSP_CLKIN_FRQ * BSP_SYSPLL_MF)
+#define BSP_Convert_decrementer( _value ) \
+ (int) (((_value) * 4000) / (BSP_CSB_CLK_FRQ/10000))
+
+/*
+ * Network driver configuration
+ */
+struct rtems_bsdnet_ifconfig;
+extern int BSP_tsec_attach(struct rtems_bsdnet_ifconfig *config,int attaching);
+#define RTEMS_BSP_NETWORK_DRIVER_NAME "tsec1"
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH BSP_tsec_attach
+
+#define RTEMS_BSP_NETWORK_DRIVER_NAME2 "tsec2"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ASM */
+
+#endif /* GEN83xx */
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/bspopts.h.in b/c/src/lib/libbsp/powerpc/gen83xx/include/bspopts.h.in
new file mode 100644
index 0000000000..c24d8acab5
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/include/bspopts.h.in
@@ -0,0 +1,24 @@
+/* include/bspopts.h.in. Generated from configure.ac by autoheader. */
+
+/* If defined, the data cache will be enabled after address translation is
+ turned on. */
+#undef DATA_CACHE_ENABLE
+
+/* If defined, the instruction cache will be enabled after address translation
+ is turned on. */
+#undef INSTRUCTION_CACHE_ENABLE
+
+/* Define to the address where bug reports for this package should be sent. */
+#undef PACKAGE_BUGREPORT
+
+/* Define to the full name of this package. */
+#undef PACKAGE_NAME
+
+/* Define to the full name and version of this package. */
+#undef PACKAGE_STRING
+
+/* Define to the one symbol short name of this package. */
+#undef PACKAGE_TARNAME
+
+/* Define to the version of this package. */
+#undef PACKAGE_VERSION
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/coverhd.h b/c/src/lib/libbsp/powerpc/gen83xx/include/coverhd.h
new file mode 100644
index 0000000000..0ca6b55d64
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/include/coverhd.h
@@ -0,0 +1,113 @@
+/* coverhd.h
+ *
+ * This include file has defines to represent the overhead associated
+ * with calling a particular directive from C. These are used in the
+ * Timing Test Suite to ignore the overhead required to pass arguments
+ * to directives. On some CPUs and/or target boards, this overhead
+ * is significant and makes it difficult to distinguish internal
+ * RTEMS execution time from that used to call the directive.
+ * This file should be updated after running the C overhead timing
+ * test. Once this update has been performed, the RTEMS Time Test
+ * Suite should be rebuilt to account for these overhead times in the
+ * timing results.
+ *
+ * NOTE: If these are all zero, then the times reported include
+ * all calling overhead including passing of arguments.
+ *
+ * COPYRIGHT (c) 1989-1999.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * coverhd.h,v 1.2 2003/09/04 18:52:27 joel Exp
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0
+#define CALLING_OVERHEAD_TASK_CREATE 0
+#define CALLING_OVERHEAD_TASK_IDENT 0
+#define CALLING_OVERHEAD_TASK_START 0
+#define CALLING_OVERHEAD_TASK_RESTART 0
+#define CALLING_OVERHEAD_TASK_DELETE 0
+#define CALLING_OVERHEAD_TASK_SUSPEND 0
+#define CALLING_OVERHEAD_TASK_RESUME 0
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0
+#define CALLING_OVERHEAD_TASK_MODE 0
+#define CALLING_OVERHEAD_TASK_GET_NOTE 0
+#define CALLING_OVERHEAD_TASK_SET_NOTE 0
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN 2
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0
+#define CALLING_OVERHEAD_INTERRUPT_CATCH 0
+#define CALLING_OVERHEAD_CLOCK_GET 2
+#define CALLING_OVERHEAD_CLOCK_SET 2
+#define CALLING_OVERHEAD_CLOCK_TICK 0
+
+#define CALLING_OVERHEAD_TIMER_CREATE 0
+#define CALLING_OVERHEAD_TIMER_IDENT 0
+#define CALLING_OVERHEAD_TIMER_DELETE 0
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 0
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 2
+#define CALLING_OVERHEAD_TIMER_RESET 0
+#define CALLING_OVERHEAD_TIMER_CANCEL 0
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE 0
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0
+
+#define CALLING_OVERHEAD_EVENT_SEND 0
+#define CALLING_OVERHEAD_EVENT_RECEIVE 0
+#define CALLING_OVERHEAD_SIGNAL_CATCH 0
+#define CALLING_OVERHEAD_SIGNAL_SEND 0
+#define CALLING_OVERHEAD_PARTITION_CREATE 0
+#define CALLING_OVERHEAD_PARTITION_IDENT 0
+#define CALLING_OVERHEAD_PARTITION_DELETE 0
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0
+#define CALLING_OVERHEAD_REGION_CREATE 0
+#define CALLING_OVERHEAD_REGION_IDENT 0
+#define CALLING_OVERHEAD_REGION_DELETE 0
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT 0
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0
+#define CALLING_OVERHEAD_PORT_CREATE 0
+#define CALLING_OVERHEAD_PORT_IDENT 0
+#define CALLING_OVERHEAD_PORT_DELETE 0
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
+
+#define CALLING_OVERHEAD_IO_INITIALIZE 0
+#define CALLING_OVERHEAD_IO_OPEN 0
+#define CALLING_OVERHEAD_IO_CLOSE 0
+#define CALLING_OVERHEAD_IO_READ 0
+#define CALLING_OVERHEAD_IO_WRITE 0
+#define CALLING_OVERHEAD_IO_CONTROL 0
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h b/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h
new file mode 100644
index 0000000000..2c85c3156e
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h
@@ -0,0 +1,63 @@
+/*
+ * tm27.h
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * tm27.h,v 1.2 2004/04/23 04:47:38 ralf Exp
+ */
+
+#ifndef _RTEMS_TMTEST27
+#error "This is an RTEMS internal file you must not include directly."
+#endif
+
+#ifndef __tm27_h
+#define __tm27_h
+
+#include <bsp/irq.h>
+
+/*
+ * Stuff for Time Test 27
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 1
+
+void nullFunc() {}
+
+static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
+ 0,
+ (rtems_irq_enable)nullFunc,
+ (rtems_irq_disable)nullFunc,
+ (rtems_irq_is_enabled) nullFunc};
+void Install_tm27_vector(void (*_handler)())
+{
+ clockIrqData.hdl = _handler;
+ if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
+ printk("Error installing clock interrupt handler!\n");
+ rtems_fatal_error_occurred(1);
+ }
+}
+
+#define Cause_tm27_intr() \
+ do { \
+ uint32_t _clicks = 8; \
+ asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
+ } while (0)
+
+#define Clear_tm27_intr() \
+ do { \
+ uint32_t _clicks = 0xffffffff; \
+ asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
+ } while (0)
+
+#define Lower_tm27_intr() \
+ do { \
+ uint32_t _msr = 0; \
+ _ISR_Set_level( 0 ); \
+ asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
+ _msr |= 0x8002; \
+ asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
+ } while (0)
+
+#endif
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/irq/ipic.c b/c/src/lib/libbsp/powerpc/gen83xx/irq/ipic.c
new file mode 100644
index 0000000000..8433c32a67
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/irq/ipic.c
@@ -0,0 +1,394 @@
+/*===============================================================*\
+| Project: RTEMS generic MPC83xx BSP |
++-----------------------------------------------------------------+
+| Copyright (c) 2007 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file integrates the IPIC irq controller |
+\*===============================================================*/
+
+#include <mpc83xx/mpc83xx.h>
+#include <rtems.h>
+#include <rtems/bspIo.h>
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <rtems/powerpc/powerpc.h>
+
+typedef struct {
+ volatile uint32_t *pend_reg;
+ volatile uint32_t *mask_reg;
+ const uint32_t bit_num;
+} BSP_isrc_rsc_t;
+
+const BSP_isrc_rsc_t BSP_ipic_isrc_rsc[] = {
+ /* vector 0 */
+ {&mpc83xx.ipic.sersr,&mpc83xx.ipic.sermr,31},
+ {NULL,NULL,0},
+ {NULL,NULL,0},
+ {NULL,NULL,0},
+ {NULL,NULL,0},
+ {NULL,NULL,0},
+ {NULL,NULL,0},
+ {NULL,NULL,0},
+ /* vector 8 */
+ {NULL,NULL,0}, /* reserved vector 8 */
+ /* vector 9: UART1 SIxxR_H, Bit 24 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0],24},
+ /* vector 10: UART2 SIxxR_H, Bit 25 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0],25},
+ /* vector 11: SEC SIxxR_H, Bit 26 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0],26},
+ {NULL,NULL,0}, /* reserved vector 12 */
+ {NULL,NULL,0}, /* reserved vector 13 */
+ /* vector 14: I2C1 SIxxR_H, Bit 29 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0],29},
+ /* vector 15: I2C2 SIxxR_H, Bit 30 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0],30},
+ /* vector 16: SPI SIxxR_H, Bit 31 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0],31},
+ /* vector 17: IRQ1 SExxR , Bit 1 */
+ {&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 1},
+ /* vector 18: IRQ2 SExxR , Bit 2 */
+ {&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 2},
+ /* vector 19: IRQ3 SExxR , Bit 3 */
+ {&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 3},
+ /* vector 20: IRQ4 SExxR , Bit 4 */
+ {&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 4},
+ /* vector 21: IRQ5 SExxR , Bit 5 */
+ {&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 5},
+ /* vector 22: IRQ6 SExxR , Bit 6 */
+ {&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 6},
+ /* vector 23: IRQ7 SExxR , Bit 7 */
+ {&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 7},
+ {NULL,NULL,0}, /* reserved vector 24 */
+ {NULL,NULL,0}, /* reserved vector 25 */
+ {NULL,NULL,0}, /* reserved vector 26 */
+ {NULL,NULL,0}, /* reserved vector 27 */
+ {NULL,NULL,0}, /* reserved vector 28 */
+ {NULL,NULL,0}, /* reserved vector 29 */
+ {NULL,NULL,0}, /* reserved vector 30 */
+ {NULL,NULL,0}, /* reserved vector 31 */
+ /* vector 32: TSEC1 Tx SIxxR_H , Bit 0 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 0},
+ /* vector 33: TSEC1 Rx SIxxR_H , Bit 1 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 1},
+ /* vector 34: TSEC1 Err SIxxR_H , Bit 2 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 2},
+ /* vector 35: TSEC2 Tx SIxxR_H , Bit 3 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 3},
+ /* vector 36: TSEC2 Rx SIxxR_H , Bit 4 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 4},
+ /* vector 37: TSEC2 Err SIxxR_H , Bit 5 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 5},
+ /* vector 38: USB DR SIxxR_H , Bit 6 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 6},
+ /* vector 39: USB MPH SIxxR_H , Bit 7 */
+ {&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 7},
+ {NULL,NULL,0}, /* reserved vector 40 */
+ {NULL,NULL,0}, /* reserved vector 41 */
+ {NULL,NULL,0}, /* reserved vector 42 */
+ {NULL,NULL,0}, /* reserved vector 43 */
+ {NULL,NULL,0}, /* reserved vector 44 */
+ {NULL,NULL,0}, /* reserved vector 45 */
+ {NULL,NULL,0}, /* reserved vector 46 */
+ {NULL,NULL,0}, /* reserved vector 47 */
+ /* vector 48: IRQ0 SExxR , Bit 0 */
+ {&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 0},
+ {NULL,NULL,0}, /* reserved vector 49 */
+ {NULL,NULL,0}, /* reserved vector 50 */
+ {NULL,NULL,0}, /* reserved vector 51 */
+ {NULL,NULL,0}, /* reserved vector 52 */
+ {NULL,NULL,0}, /* reserved vector 53 */
+ {NULL,NULL,0}, /* reserved vector 54 */
+ {NULL,NULL,0}, /* reserved vector 55 */
+ {NULL,NULL,0}, /* reserved vector 56 */
+ {NULL,NULL,0}, /* reserved vector 57 */
+ {NULL,NULL,0}, /* reserved vector 58 */
+ {NULL,NULL,0}, /* reserved vector 59 */
+ {NULL,NULL,0}, /* reserved vector 60 */
+ {NULL,NULL,0}, /* reserved vector 61 */
+ {NULL,NULL,0}, /* reserved vector 62 */
+ {NULL,NULL,0}, /* reserved vector 63 */
+ /* vector 64: RTC SEC SIxxR_L , Bit 0 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 0},
+ /* vector 65: PIT SIxxR_L , Bit 1 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 1},
+ /* vector 66: PCI1 SIxxR_L , Bit 2 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 2},
+ /* vector 67: PCI2 SIxxR_L , Bit 3 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 3},
+ /* vector 68: RTC ALR SIxxR_L , Bit 4 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 4},
+ /* vector 69: MU SIxxR_L , Bit 5 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 5},
+ /* vector 70: SBA SIxxR_L , Bit 6 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 6},
+ /* vector 71: DMA SIxxR_L , Bit 7 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 7},
+ /* vector 72: GTM4 SIxxR_L , Bit 8 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 8},
+ /* vector 73: GTM8 SIxxR_L , Bit 9 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 9},
+ /* vector 74: GPIO1 SIxxR_L , Bit 10 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],10},
+ /* vector 75: GPIO2 SIxxR_L , Bit 11 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],11},
+ /* vector 76: DDR SIxxR_L , Bit 12 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],12},
+ /* vector 77: LBC SIxxR_L , Bit 13 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],13},
+ /* vector 78: GTM2 SIxxR_L , Bit 14 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],14},
+ /* vector 79: GTM6 SIxxR_L , Bit 15 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],15},
+ /* vector 80: PMC SIxxR_L , Bit 16 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],16},
+ {NULL,NULL,0}, /* reserved vector 81 */
+ {NULL,NULL,0}, /* reserved vector 82 */
+ {NULL,NULL,0}, /* reserved vector 63 */
+ /* vector 84: GTM3 SIxxR_L , Bit 20 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],20},
+ /* vector 85: GTM7 SIxxR_L , Bit 21 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],21},
+ {NULL,NULL,0}, /* reserved vector 81 */
+ {NULL,NULL,0}, /* reserved vector 82 */
+ {NULL,NULL,0}, /* reserved vector 63 */
+ {NULL,NULL,0}, /* reserved vector 63 */
+ /* vector 90: GTM1 SIxxR_L , Bit 26 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],26},
+ /* vector 91: GTM5 SIxxR_L , Bit 27 */
+ {&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],27}
+};
+
+/*
+ * data structure to handle all mask registers in the IPIC
+ */
+typedef struct {
+ uint32_t simsr_mask[2];
+ uint32_t semsr_mask;
+ uint32_t sermr_mask;
+} BSP_ipic_mask_t;
+
+/*
+ * this array will be filled with mask values needed
+ * to temporarily disable all IRQ soures with lower or same
+ * priority of the current source (whose vector is the array index)
+ */
+BSP_ipic_mask_t BSP_ipic_prio2mask[BSP_ARRAY_CNT(BSP_ipic_isrc_rsc)];
+
+
+/*
+ * functions to enable/disable a source at the ipic
+ */
+void BSP_irq_enable_at_ipic (rtems_irq_number irqnum)
+{
+ uint32_t vecnum = irqnum - BSP_IPIC_IRQ_LOWEST_OFFSET;
+ const BSP_isrc_rsc_t *rsc_ptr;
+
+ if ((vecnum >= 0)
+ && (vecnum < BSP_ARRAY_CNT(BSP_ipic_isrc_rsc))) {
+ rsc_ptr = &BSP_ipic_isrc_rsc[vecnum];
+ if (rsc_ptr->mask_reg != NULL) {
+ *(rsc_ptr->mask_reg) |= 1 << (31-rsc_ptr->bit_num);
+ }
+ }
+}
+
+void BSP_irq_disable_at_ipic (rtems_irq_number irqnum)
+{
+ uint32_t vecnum = irqnum - BSP_IPIC_IRQ_LOWEST_OFFSET;
+ const BSP_isrc_rsc_t *rsc_ptr;
+
+ if ((vecnum >= 0)
+ && (vecnum < BSP_ARRAY_CNT(BSP_ipic_isrc_rsc))) {
+ rsc_ptr = &BSP_ipic_isrc_rsc[vecnum];
+ if (rsc_ptr->mask_reg != NULL) {
+ *(rsc_ptr->mask_reg) &= ~(1 << (31-rsc_ptr->bit_num));
+ }
+ }
+}
+
+
+/*
+ * IRQ Handler: this is called from the primary exception dispatcher
+ */
+rtems_status_code BSP_irq_handle_at_ipic(uint32_t excNum)
+{
+ rtems_status_code rc = RTEMS_SUCCESSFUL;
+ rtems_irq_connect_data *tbl_entry;
+ int32_t vecnum;
+ uint32_t msr_value;
+ uint32_t msr_save;
+ uint32_t msr_enable = 0;
+ BSP_ipic_mask_t mask_save;
+ const BSP_ipic_mask_t *mask_ptr;
+ /*
+ * get vector
+ */
+ switch(excNum) {
+ case ASM_EXT_VECTOR:
+ vecnum = MPC83xx_VCR_TO_VEC(mpc83xx.ipic.sivcr);
+ msr_enable = PPC_MSR_EE;
+ break;
+ case ASM_SYSMGMT_VECTOR:
+ vecnum = MPC83xx_VCR_TO_VEC(mpc83xx.ipic.smvcr);
+ msr_enable = PPC_MSR_EE;
+ break;
+#if defined(ASM_CRIT_VECTOR)
+ case ASM_CRIT_VECTOR:
+ vecnum = MPC83xx_VCR_TO_VEC(mpc83xx.ipic.scvcr);
+ break;
+#endif
+ default:
+ vecnum = -1;
+ }
+ /*
+ * check vector number
+ */
+ if ((vecnum >= 0)
+ && (vecnum < BSP_ARRAY_CNT(BSP_ipic_isrc_rsc))) {
+ /*
+ * save current mask registers
+ */
+ mask_save.simsr_mask[0] = mpc83xx.ipic.simsr[0];
+ mask_save.simsr_mask[1] = mpc83xx.ipic.simsr[1];
+ mask_save.semsr_mask = mpc83xx.ipic.semsr ;
+ mask_save.sermr_mask = mpc83xx.ipic.sermr ;
+ /*
+ * mask all lower prio interrupts
+ */
+ mask_ptr = &BSP_ipic_prio2mask[vecnum];
+ mpc83xx.ipic.simsr[0] &= mask_ptr->simsr_mask[0];
+ mpc83xx.ipic.simsr[1] &= mask_ptr->simsr_mask[1];
+ mpc83xx.ipic.semsr &= mask_ptr->semsr_mask ;
+ mpc83xx.ipic.sermr &= mask_ptr->sermr_mask ;
+ /*
+ * reenable msr_ee
+ */
+ _CPU_MSR_GET(msr_value);
+ msr_save = msr_value;
+ msr_value |= msr_enable;
+ _CPU_MSR_SET(msr_value);
+ /*
+ * call handler
+ */
+ tbl_entry = &BSP_rtems_irq_tbl[vecnum+BSP_IPIC_IRQ_LOWEST_OFFSET];
+ if (tbl_entry->hdl != NULL) {
+ (tbl_entry->hdl) (tbl_entry->handle);
+ } else {
+ printk("IPIC: Spurious interrupt; excNum=0x%x, vector=0x%02x\n\r",
+ excNum,vecnum);
+ }
+ /*
+ * disable msr_enable
+ */
+ _CPU_MSR_SET(msr_save);
+ /*
+ * restore initial masks
+ */
+ mpc83xx.ipic.simsr[0] = mask_save.simsr_mask[0];
+ mpc83xx.ipic.simsr[1] = mask_save.simsr_mask[1];
+ mpc83xx.ipic.semsr = mask_save.semsr_mask ;
+ mpc83xx.ipic.sermr = mask_save.sermr_mask ;
+ }
+ return rc;
+}
+
+
+/*
+ * fill the array BSP_ipic_prio2mask to allow masking of lower prio sources
+ * to implement nested interrupts
+ */
+rtems_status_code BSP_ipic_calc_prio2mask(void)
+{
+ rtems_status_code rc = RTEMS_SUCCESSFUL;
+ /*
+ * FIXME: fill the array
+ */
+ return rc;
+}
+
+/*
+ * activate the interrupt controller
+ */
+rtems_status_code BSP_ipic_intc_init(void)
+{
+ uint32_t msr_value;
+ rtems_status_code rc = RTEMS_SUCCESSFUL;
+
+ /*
+ * mask off all interrupts
+ */
+ mpc83xx.ipic.simsr[0] = 0;
+ mpc83xx.ipic.simsr[1] = 0;
+ mpc83xx.ipic.semsr = 0;
+ mpc83xx.ipic.sermr = 0;
+ /*
+ * set desired configuration as defined in bspopts.h
+ * normally, the default values should be fine
+ */
+#if defined(BSP_SICFR_VAL) /* defined in bspopts.h ? */
+ mpc83xx.ipic.sicfr = BSP_SICFR_VAL;
+#endif
+
+ /*
+ * set desired priorities as defined in bspopts.h
+ * normally, the default values should be fine
+ */
+#if defined(BSP_SIPRR0_VAL) /* defined in bspopts.h ? */
+ mpc83xx.ipic.siprr[0] = BSP_SIPRR0_VAL;
+#endif
+
+#if defined(BSP_SIPRR1_VAL) /* defined in bspopts.h ? */
+ mpc83xx.ipic.siprr[1] = BSP_SIPRR1_VAL;
+#endif
+
+#if defined(BSP_SIPRR2_VAL) /* defined in bspopts.h ? */
+ mpc83xx.ipic.siprr[2] = BSP_SIPRR2_VAL;
+#endif
+
+#if defined(BSP_SIPRR3_VAL) /* defined in bspopts.h ? */
+ mpc83xx.ipic.siprr[3] = BSP_SIPRR3_VAL;
+#endif
+
+#if defined(BSP_SMPRR0_VAL) /* defined in bspopts.h ? */
+ mpc83xx.ipic.smprr[0] = BSP_SMPRR0_VAL;
+#endif
+
+#if defined(BSP_SMPRR1_VAL) /* defined in bspopts.h ? */
+ mpc83xx.ipic.smprr[1] = BSP_SMPRR1_VAL;
+#endif
+
+#if defined(BSP_SECNR_VAL) /* defined in bspopts.h ? */
+ mpc83xx.ipic.secnr = BSP_SECNR_VAL;
+#endif
+
+ /*
+ * calculate priority masks
+ */
+ rc = BSP_ipic_calc_prio2mask();
+ if (rc == RTEMS_SUCCESSFUL) {
+ /*
+ * enable (non-critical) exceptions
+ */
+
+ _CPU_MSR_GET(msr_value);
+ msr_value |= PPC_MSR_EE;
+ _CPU_MSR_SET(msr_value);
+
+ /* install exit handler to close ipic when program atexit called */
+ /* atexit(ipic_intc_exit); */
+ }
+ return rc;
+}
+
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.h b/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.h
new file mode 100644
index 0000000000..b9d3cfe49e
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.h
@@ -0,0 +1,149 @@
+/*===============================================================*\
+| Project: RTEMS generic MPC83xx BSP |
++-----------------------------------------------------------------+
+| Copyright (c) 2007 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file declares constants of the interrupt controller |
+\*===============================================================*/
+#ifndef GEN83xx_IRQ_IRQ_H
+#define GEN83xx_IRQ_IRQ_H
+
+#include <rtems.h>
+#include <rtems/irq.h>
+
+/*
+ * the following definitions specify the indices used
+ * to interface the interrupt handler API
+ */
+
+/*
+ * Base index for the module specific irq handlers
+ */
+#define BSP_ASM_IRQ_VECTOR_BASE 0x0
+#define BSP_IPIC_VECTOR_BASE BSP_ASM_IRQ_VECTOR_BASE
+
+/*
+ * Peripheral IRQ handlers related definitions
+ */
+#define BSP_IPIC_PER_IRQ_NUMBER 128
+#define BSP_IPIC_IRQ_LOWEST_OFFSET BSP_IPIC_VECTOR_BASE /* 0 */
+#define BSP_IPIC_IRQ_MAX_OFFSET (BSP_IPIC_IRQ_LOWEST_OFFSET\
+ +BSP_IPIC_PER_IRQ_NUMBER-1)
+
+#define BSP_IS_IPIC_IRQ(irqnum) \
+ (((irqnum) >= BSP_IPIC_IRQ_LOWEST_OFFSET) && \
+ ((irqnum) <= BSP_IPIC_IRQ_MAX_OFFSET))
+/*
+ * Processor IRQ handlers related definitions
+ */
+#define BSP_PROCESSOR_IRQ_NUMBER 1
+#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_IPIC_IRQ_MAX_OFFSET+1)
+#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET\
+ +BSP_PROCESSOR_IRQ_NUMBER-1)
+
+#define BSP_IS_PROCESSOR_IRQ(irqnum) \
+ (((irqnum) >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET) && \
+ ((irqnum) <= BSP_PROCESSOR_IRQ_MAX_OFFSET))
+/*
+ * Summary
+ */
+#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET+1)
+#define BSP_LOWEST_OFFSET BSP_IPIC_IRQ_LOWEST_OFFSET
+#define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET
+
+#define BSP_IS_VALID_IRQ(irqnum) \
+ (BSP_IS_PROCESSOR_IRQ(irqnum) \
+ || BSP_IS_IPIC_IRQ(irqnum))
+
+#ifndef ASM
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * index table for the module specific handlers, a few entries are only placeholders
+ */
+ typedef enum {
+ BSP_IPIC_IRQ_FIRST = BSP_IPIC_IRQ_LOWEST_OFFSET,
+ BSP_IPIC_IRQ_ERROR = BSP_IPIC_IRQ_LOWEST_OFFSET + 0,
+ /* reserved irqs 1- 8 */
+ BSP_IPIC_IRQ_UART1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 9,
+ BSP_IPIC_IRQ_UART2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 10,
+ BSP_IPIC_IRQ_SEC = BSP_IPIC_IRQ_LOWEST_OFFSET + 11,
+ /* reserved irqs 12-13 */
+ BSP_IPIC_IRQ_I2C1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 14,
+ BSP_IPIC_IRQ_I2C2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 15,
+ BSP_IPIC_IRQ_SPI = BSP_IPIC_IRQ_LOWEST_OFFSET + 16,
+ BSP_IPIC_IRQ_IRQ1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 17,
+ BSP_IPIC_IRQ_IRQ2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 18,
+ BSP_IPIC_IRQ_IRQ3 = BSP_IPIC_IRQ_LOWEST_OFFSET + 19,
+ BSP_IPIC_IRQ_IRQ4 = BSP_IPIC_IRQ_LOWEST_OFFSET + 20,
+ BSP_IPIC_IRQ_IRQ5 = BSP_IPIC_IRQ_LOWEST_OFFSET + 21,
+ BSP_IPIC_IRQ_IRQ6 = BSP_IPIC_IRQ_LOWEST_OFFSET + 22,
+ BSP_IPIC_IRQ_IRQ7 = BSP_IPIC_IRQ_LOWEST_OFFSET + 23,
+ /* reserved irqs 24-31 */
+ BSP_IPIC_IRQ_TSEC1_TX = BSP_IPIC_IRQ_LOWEST_OFFSET + 32,
+ BSP_IPIC_IRQ_TSEC1_RX = BSP_IPIC_IRQ_LOWEST_OFFSET + 33,
+ BSP_IPIC_IRQ_TSEC1_ERR = BSP_IPIC_IRQ_LOWEST_OFFSET + 34,
+ BSP_IPIC_IRQ_TSEC2_TX = BSP_IPIC_IRQ_LOWEST_OFFSET + 35,
+ BSP_IPIC_IRQ_TSEC2_RX = BSP_IPIC_IRQ_LOWEST_OFFSET + 36,
+ BSP_IPIC_IRQ_TSEC2_ERR = BSP_IPIC_IRQ_LOWEST_OFFSET + 37,
+ BSP_IPIC_IRQ_USB_DR = BSP_IPIC_IRQ_LOWEST_OFFSET + 38,
+ BSP_IPIC_IRQ_USB_MPH = BSP_IPIC_IRQ_LOWEST_OFFSET + 39,
+ /* reserved irqs 40-47 */
+ BSP_IPIC_IRQ_IRQ0 = BSP_IPIC_IRQ_LOWEST_OFFSET + 48,
+ /* reserved irqs 49-63 */
+ BSP_IPIC_IRQ_RTC_SEC = BSP_IPIC_IRQ_LOWEST_OFFSET + 64,
+ BSP_IPIC_IRQ_PIT = BSP_IPIC_IRQ_LOWEST_OFFSET + 65,
+ BSP_IPIC_IRQ_PCI1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 66,
+ BSP_IPIC_IRQ_PCI2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 67,
+ BSP_IPIC_IRQ_RTC_ALR = BSP_IPIC_IRQ_LOWEST_OFFSET + 68,
+ BSP_IPIC_IRQ_MU = BSP_IPIC_IRQ_LOWEST_OFFSET + 69,
+ BSP_IPIC_IRQ_SBA = BSP_IPIC_IRQ_LOWEST_OFFSET + 70,
+ BSP_IPIC_IRQ_DMA = BSP_IPIC_IRQ_LOWEST_OFFSET + 71,
+ BSP_IPIC_IRQ_GTM4 = BSP_IPIC_IRQ_LOWEST_OFFSET + 72,
+ BSP_IPIC_IRQ_GTM8 = BSP_IPIC_IRQ_LOWEST_OFFSET + 73,
+ BSP_IPIC_IRQ_GPIO1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 74,
+ BSP_IPIC_IRQ_GPIO2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 75,
+ BSP_IPIC_IRQ_DDR = BSP_IPIC_IRQ_LOWEST_OFFSET + 76,
+ BSP_IPIC_IRQ_LBC = BSP_IPIC_IRQ_LOWEST_OFFSET + 77,
+ BSP_IPIC_IRQ_GTM2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 78,
+ BSP_IPIC_IRQ_GTM6 = BSP_IPIC_IRQ_LOWEST_OFFSET + 79,
+ BSP_IPIC_IRQ_PMC = BSP_IPIC_IRQ_LOWEST_OFFSET + 80,
+ /* reserved irqs 81-83 */
+ BSP_IPIC_IRQ_GTM3 = BSP_IPIC_IRQ_LOWEST_OFFSET + 84,
+ BSP_IPIC_IRQ_GTM7 = BSP_IPIC_IRQ_LOWEST_OFFSET + 85,
+ /* reserved irqs 86-89 */
+ BSP_IPIC_IRQ_GTM1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 90,
+ BSP_IPIC_IRQ_GTM5 = BSP_IPIC_IRQ_LOWEST_OFFSET + 91,
+ /* reserved irqs 92-127 */
+
+ BSP_IPIC_IRQ_LAST = BSP_IPIC_IRQ_MAX_OFFSET,
+ BSP_DECREMENTER = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 0
+ } rtems_irq_symbolic_name;
+
+ extern rtems_irq_connect_data *BSP_rtems_irq_tbl;
+ void BSP_rtems_irq_mng_init(unsigned cpuId);
+
+ /* ipic.c */
+ rtems_status_code BSP_irq_handle_at_ipic(uint32_t excNum);
+ void BSP_irq_enable_at_ipic (rtems_irq_number irqnum);
+ void BSP_irq_disable_at_ipic (rtems_irq_number irqnum);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* ASM */
+
+#endif /* GEN83XX_IRQ_IRQ_H */
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/irq/irq_init.c b/c/src/lib/libbsp/powerpc/gen83xx/irq/irq_init.c
new file mode 100644
index 0000000000..c930f7bcbf
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/irq/irq_init.c
@@ -0,0 +1,413 @@
+/*===============================================================*\
+| Project: RTEMS generic MPC83xx BSP |
++-----------------------------------------------------------------+
+| Copyright (c) 2007 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file contains the irq controller init code |
++-----------------------------------------------------------------+
+| derived from the virtex BSP |
+\*===============================================================*/
+#include <libcpu/spr.h>
+#include <bsp/irq.h>
+#include <bsp.h>
+#include <libcpu/raw_exception.h>
+#include <rtems/bspIo.h>
+#include <rtems/powerpc/powerpc.h>
+#include <bsp/vectors.h>
+
+static rtems_irq_connect_data rtemsIrqTbl[BSP_IRQ_NUMBER];
+rtems_irq_connect_data *BSP_rtems_irq_tbl;
+rtems_irq_global_settings* BSP_rtems_irq_config;
+
+/***********************************************************
+ * dummy functions for on/off/isOn calls
+ * these functions just do nothing fulfill the semantic
+ * requirements to enable/disable a certain interrupt or exception
+ */
+void BSP_irq_nop_func(const rtems_irq_connect_data *unused)
+{
+ /*
+ * nothing to do
+ */
+}
+
+void BSP_irq_nop_hdl(void *hdl)
+{
+ /*
+ * nothing to do
+ */
+}
+
+int BSP_irq_true_func(const rtems_irq_connect_data *unused)
+{
+ /*
+ * nothing to do
+ */
+ return TRUE;
+}
+
+/***********************************************************
+ * interrupt handler and its enable/disable functions
+ ***********************************************************/
+
+/***********************************************************
+ * functions to enable/disable/query external/critical interrupts
+ */
+void BSP_irqexc_on_fnc(rtems_irq_connect_data *conn_data)
+{
+ uint32_t msr_value;
+ /*
+ * get current MSR value
+ */
+ _CPU_MSR_GET(msr_value);
+
+
+ msr_value |= PPC_MSR_EE;
+ _CPU_MSR_SET(msr_value);
+}
+
+void BSP_irqexc_off_fnc(rtems_irq_connect_data *unused)
+{
+ /*
+ * nothing to do
+ */
+}
+
+/***********************************************************
+ * High level IRQ handler called from shared_raw_irq_code_entry
+ */
+void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
+{
+ uint32_t msr_value,new_msr;
+
+ /*
+ * Handle interrupt
+ */
+ switch(excNum) {
+ case ASM_DEC_VECTOR:
+ _CPU_MSR_GET(msr_value);
+ new_msr = msr_value | MSR_EE;
+ _CPU_MSR_SET(new_msr);
+
+ BSP_rtems_irq_tbl[BSP_DECREMENTER].hdl
+ (BSP_rtems_irq_tbl[BSP_DECREMENTER].handle);
+
+ _CPU_MSR_SET(msr_value);
+
+ break;
+#if 0 /* Critical interrupts not yet supported */
+ case ASM_CRIT_VECTOR:
+#endif
+ case ASM_SYSMGMT_VECTOR:
+ case ASM_EXT_VECTOR:
+ BSP_irq_handle_at_ipic(excNum);
+ break;
+ }
+}
+
+void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
+{
+ /*
+ * Process pending signals that have not already been
+ * processed by _Thread_Displatch. This happens quite
+ * unfrequently : the ISR must have posted an action
+ * to the current running thread.
+ */
+ if ( _Thread_Do_post_task_switch_extension ||
+ _Thread_Executing->do_post_task_switch_extension ) {
+ _Thread_Executing->do_post_task_switch_extension = FALSE;
+ _API_extensions_Run_postswitch();
+ }
+}
+
+/***********************************************************
+ * functions to set/get/remove interrupt handlers
+ ***********************************************************/
+int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
+{
+ unsigned int level;
+ /*
+ * check for valid irq name
+ * if invalid, print error and return 0
+ */
+ if (!BSP_IS_VALID_IRQ(irq->name)) {
+ printk("Invalid interrupt vector %d\n",irq->name);
+ return 0;
+ }
+
+ /*
+ * disable interrupts
+ */
+ _CPU_ISR_Disable(level);
+ /*
+ * check, that default handler is installed now
+ */
+ if (rtemsIrqTbl[irq->name].hdl != BSP_rtems_irq_config->defaultEntry.hdl) {
+ _CPU_ISR_Enable(level);
+ printk("IRQ vector %d already connected\n",irq->name);
+ return 0;
+ }
+ /*
+ * store new handler data
+ */
+ rtemsIrqTbl[irq->name] = *irq;
+
+ /*
+ * enable irq at interrupt controller
+ */
+ if (BSP_IS_IPIC_IRQ(irq->name)) {
+ BSP_irq_enable_at_ipic(irq->name);
+ }
+ /*
+ * call "on" function to enable interrupt at device
+ */
+ irq->on(irq);
+ /*
+ * reenable interrupts
+ */
+ _CPU_ISR_Enable(level);
+
+ return 1;
+}
+
+int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* irq)
+{
+ unsigned int level;
+
+ /*
+ * check for valid IRQ name
+ */
+ if (!BSP_IS_VALID_IRQ(irq->name)) {
+ return 0;
+ }
+ _CPU_ISR_Disable(level);
+ /*
+ * return current IRQ entry
+ */
+ *irq = rtemsIrqTbl[irq->name];
+ _CPU_ISR_Enable(level);
+ return 1;
+}
+
+int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
+{
+ unsigned int level;
+
+ /*
+ * check for valid IRQ name
+ */
+ if (!BSP_IS_VALID_IRQ(irq->name)) {
+ return 0;
+ }
+ _CPU_ISR_Disable(level);
+ /*
+ * check, that specified handler is really connected now
+ */
+ if (rtemsIrqTbl[irq->name].hdl != irq->hdl) {
+ _CPU_ISR_Enable(level);
+ return 0;
+ }
+ /*
+ * disable interrupt at interrupt controller
+ */
+ if (BSP_IS_IPIC_IRQ(irq->name)) {
+ BSP_irq_disable_at_ipic(irq->name);
+ }
+ /*
+ * disable interrupt at source
+ */
+ irq->off(irq);
+ /*
+ * restore default interrupt handler
+ */
+ rtemsIrqTbl[irq->name] = BSP_rtems_irq_config->defaultEntry;
+
+ /*
+ * reenable interrupts
+ */
+ _CPU_ISR_Enable(level);
+
+ return 1;
+}
+
+/***********************************************************
+ * functions to set/get the basic interrupt management setup
+ ***********************************************************/
+/*
+ * (Re) get info on current RTEMS interrupt management.
+ */
+int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** ret_ptr)
+{
+ *ret_ptr = BSP_rtems_irq_config;
+ return 0;
+}
+
+
+/*
+ * set management stuff
+ */
+int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
+{
+ int i;
+ unsigned int level;
+
+ _CPU_ISR_Disable(level);
+ /*
+ * store given configuration
+ */
+ BSP_rtems_irq_config = config;
+ BSP_rtems_irq_tbl = BSP_rtems_irq_config->irqHdlTbl;
+ /*
+ * enable any non-empty IRQ entries at OPBINTC
+ */
+ for (i = BSP_IPIC_IRQ_LOWEST_OFFSET;
+ i <= BSP_IPIC_IRQ_MAX_OFFSET;
+ i++) {
+ if (BSP_rtems_irq_tbl[i].hdl != config->defaultEntry.hdl) {
+ BSP_irq_enable_at_ipic(i);
+ BSP_rtems_irq_tbl[i].on((&BSP_rtems_irq_tbl[i]));
+ }
+ else {
+ BSP_rtems_irq_tbl[i].off(&(BSP_rtems_irq_tbl[i]));
+ BSP_irq_disable_at_ipic(i);
+ }
+ }
+ /*
+ * store any irq-like processor exceptions
+ */
+ for (i = BSP_PROCESSOR_IRQ_LOWEST_OFFSET;
+ i < BSP_PROCESSOR_IRQ_MAX_OFFSET;
+ i++) {
+ if (BSP_rtems_irq_tbl[i].hdl != config->defaultEntry.hdl) {
+ if (BSP_rtems_irq_tbl[i].on != NULL) {
+ BSP_rtems_irq_tbl[i].on
+ (&(BSP_rtems_irq_tbl[i]));
+ }
+ }
+ else {
+ if (BSP_rtems_irq_tbl[i].off != NULL) {
+ BSP_rtems_irq_tbl[i].off
+ (&(BSP_rtems_irq_tbl[i]));
+ }
+ }
+ }
+ _CPU_ISR_Enable(level);
+ return 1;
+}
+/**********************************************
+ * list of exception vectors to tap for interrupt handlers
+ */
+static rtems_raw_except_connect_data BSP_vec_desc[] = {
+#if defined(ASM_DEC_VECTOR)
+ {ASM_DEC_VECTOR,
+ {ASM_DEC_VECTOR,
+ decrementer_exception_vector_prolog_code,
+ (size_t)decrementer_exception_vector_prolog_code_size
+ },
+ exception_nop_enable,
+ exception_nop_enable,
+ exception_always_enabled
+ },
+#endif
+#if defined(ASM_SYSMGMT_VECTOR)
+ {ASM_SYSMGMT_VECTOR,
+ {ASM_SYSMGMT_VECTOR,
+ sysmgmt_exception_vector_prolog_code,
+ (size_t)sysmgmt_exception_vector_prolog_code_size
+ },
+ exception_nop_enable,
+ exception_nop_enable,
+ exception_always_enabled
+ },
+#endif
+ {ASM_EXT_VECTOR,
+ {ASM_EXT_VECTOR,
+ external_exception_vector_prolog_code,
+ (size_t)&external_exception_vector_prolog_code_size
+ },
+ exception_nop_enable,
+ exception_nop_enable,
+ exception_always_enabled
+ }
+#if 0 /* Critical interrupts not yet supported */
+ ,{ASM_CRIT_VECTOR,
+ {ASM_CRIT_VECTOR,
+ critical_exception_vector_prolog_code,
+ critical_exception_vector_prolog_code_size
+ }
+ BSP_irq_nop_func,
+ BSP_irq_nop_func,
+ BSP_irq_true_func
+ }
+#endif
+};
+
+/*
+ * dummy for an empty IRQ handler entry
+ */
+static rtems_irq_connect_data emptyIrq = {
+ 0, /* Irq Name */
+ BSP_irq_nop_hdl, /* handler function */
+ NULL, /* handle passed to handler */
+ BSP_irq_nop_func, /* on function */
+ BSP_irq_nop_func, /* off function */
+ BSP_irq_true_func /* isOn function */
+};
+
+static rtems_irq_global_settings initialConfig = {
+ BSP_IRQ_NUMBER, /* irqNb */
+ { 0, /* Irq Name */
+ BSP_irq_nop_hdl, /* handler function */
+ NULL, /* handle passed to handler */
+ BSP_irq_nop_func, /* on function */
+ BSP_irq_nop_func, /* off function */
+ BSP_irq_true_func /* isOn function */
+ }, /* emptyIrq */
+ rtemsIrqTbl, /* irqHdlTbl */
+ 0, /* irqBase */
+ NULL /* irqPrioTbl */
+};
+
+void BSP_rtems_irq_mng_init(unsigned cpuId)
+{
+ int i;
+ /*
+ * connect all exception vectors needed
+ */
+ for (i = 0;
+ i < (sizeof(BSP_vec_desc) /
+ sizeof(BSP_vec_desc[0]));
+ i++) {
+ if (!ppc_set_exception (&BSP_vec_desc[i])) {
+ BSP_panic("Unable to initialize RTEMS raw exception\n");
+ }
+ }
+ /*
+ * setup interrupt handlers table
+ */
+ for (i = 0;
+ i < BSP_IRQ_NUMBER;
+ i++) {
+ rtemsIrqTbl[i] = emptyIrq;
+ rtemsIrqTbl[i].name = i;
+ }
+
+ /*
+ * initialize interrupt management
+ */
+ if (!BSP_rtems_irq_mngt_set(&initialConfig)) {
+ BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
+ }
+}
+
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/network/network.c b/c/src/lib/libbsp/powerpc/gen83xx/network/network.c
new file mode 100644
index 0000000000..7997d98e09
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/network/network.c
@@ -0,0 +1,103 @@
+/*===============================================================*\
+| Project: RTEMS support for MPC83xx |
++-----------------------------------------------------------------+
+| Copyright (c) 2007 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file contains the board specific portion |
+| of the network interface driver |
+\*===============================================================*/
+
+#include <rtems.h>
+#include <rtems/rtems_bsdnet.h>
+#include <bsp.h>
+#include <mpc83xx/tsec.h>
+#include <mpc83xx/mpc83xx.h>
+#include <stdio.h>
+
+#define TSEC_BITRATE 1000
+#define TSEC_IFMODE_RGMII 0
+#define TSEC_IFMODE_GMII 1
+#define TSEC_IFMODE TSEC_IFMODE_RGMII
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+int BSP_tsec_attach
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| attach or detach the driver |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct rtems_bsdnet_ifconfig *config, /* interface configuration */
+ int attaching /* 0 = detach, else attach */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| 1, if success |
+\*=========================================================================*/
+{
+ char hw_addr[6] = {0x00,0x04,0x9F,0x00,0x2f,0xcb};
+ int unitNumber;
+ char *unitName;
+
+ /*
+ * Parse driver name
+ */
+ if((unitNumber = rtems_bsdnet_parse_driver_name(config, &unitName)) < 0) {
+ return 0;
+ }
+ if (attaching) {
+ if (unitNumber == 1) {
+ /*
+ * init system I/O configuration registers
+ * to ensure proper pin functions
+ */
+ mpc83xx.syscon.sicrh = mpc83xx.syscon.sicrh & ~0x1f800000;
+ /*
+ * init port registers (GPIO2DIR) for TSEC1
+ */
+ mpc83xx.gpio[1].gpdir = ((mpc83xx.gpio[1].gpdir & ~0x00000FFF)
+ | 0x0000001f);
+ }
+ }
+ if (unitNumber == 2) {
+ /*
+ * init port registers (GPIO2DIR) for TSEC2
+ */
+ mpc83xx.gpio[0].gpdir = ((mpc83xx.gpio[0].gpdir & ~0x000FFFFF)
+ | 0x00087881);
+ }
+ /*
+ * add MAC address into config->hardware_adderss
+ * FIXME: get the real address we need
+ */
+ if (config->hardware_address == NULL) {
+ config->hardware_address = hw_addr;
+ }
+ /*
+ * set interrupt number for given interface
+ */
+ config->irno = ((unitNumber == 1)
+ ? BSP_IPIC_IRQ_TSEC1_TX
+ : BSP_IPIC_IRQ_TSEC2_TX);
+ /*
+ * call attach function of board independent driver
+ */
+ if (0 == rtems_mpc83xx_tsec_driver_attach_detach(config,attaching)) {
+ return 0;
+ }
+ return 1;
+}
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/preinstall.am b/c/src/lib/libbsp/powerpc/gen83xx/preinstall.am
new file mode 100644
index 0000000000..f3ccaf6ff2
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/preinstall.am
@@ -0,0 +1,79 @@
+## Automatically generated by ampolish3 - Do not edit
+
+if AMPOLISH3
+$(srcdir)/preinstall.am: Makefile.am
+ $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
+endif
+
+PREINSTALL_DIRS =
+DISTCLEANFILES += $(PREINSTALL_DIRS)
+
+all-local: $(TMPINSTALL_FILES)
+
+TMPINSTALL_FILES =
+CLEANFILES = $(TMPINSTALL_FILES)
+
+all-am: $(PREINSTALL_FILES)
+
+PREINSTALL_FILES =
+CLEANFILES += $(PREINSTALL_FILES)
+
+$(PROJECT_LIB)/$(dirstamp):
+ @$(MKDIR_P) $(PROJECT_LIB)
+ @: > $(PROJECT_LIB)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
+
+$(PROJECT_INCLUDE)/$(dirstamp):
+ @$(MKDIR_P) $(PROJECT_INCLUDE)
+ @: > $(PROJECT_INCLUDE)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
+
+$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
+PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
+
+$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
+
+$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
+
+$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
+
+$(PROJECT_INCLUDE)/bsp/$(dirstamp):
+ @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
+ @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+
+$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
+
+$(PROJECT_INCLUDE)/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tod.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/tod.h
+
+$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
+TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
+
+$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
+TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
+
+$(PROJECT_LIB)/linkcmds.mpc8349eamds: startup/linkcmds.mpc8349eamds $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc8349eamds
+PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc8349eamds
+
+$(PROJECT_INCLUDE)/bsp/irq.h: ./irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
+
+$(PROJECT_INCLUDE)/bsp/vectors.h: ../../powerpc/shared/vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
+
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/start/start.S b/c/src/lib/libbsp/powerpc/gen83xx/start/start.S
new file mode 100644
index 0000000000..555ec68a22
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/start/start.S
@@ -0,0 +1,371 @@
+/*===============================================================*\
+| Project: RTEMS generic MPC83xx BSP |
++-----------------------------------------------------------------+
+| Copyright (c) 2007 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file contains the startup assembly code |
+\*===============================================================*/
+/* $Id$ */
+
+#include <rtems/asm.h>
+#include <rtems/powerpc/cache.h>
+#include <rtems/powerpc/registers.h>
+#include <mpc83xx/mpc83xx.h>
+#include <bsp.h>
+
+/* Macro definitions to load a register with a 32-bit address.
+ Both functions identically. Sometimes one mnemonic is more
+ appropriate than the other.
+ reg -> register to load
+ value -> value to be loaded
+ LA reg,value ("Load Address")
+ LWI reg,value ("Load Word Immediate") */
+
+.macro LA reg, value
+ lis \reg , \value@h
+ ori \reg , \reg, \value@l
+.endm
+
+.macro LWI reg, value
+ lis \reg , (\value)@h
+ ori \reg , \reg, (\value)@l
+.endm
+
+.macro SET_IMM_REGW base, reg2, offset, value
+ LA \reg2, \value
+ stw \reg2,\offset(\base)
+.endm
+
+/* Macro definitions to test, set or clear a single
+ bit or bit pattern in a given 32bit GPR.
+ reg1 -> register content to be tested
+ reg2 -> 2nd register only needed for computation
+ mask -> any bit pattern */
+
+.macro TSTBITS reg1, reg2, reg3, mask /* Match is indicated by EQ=0 (CR) */
+ LWI \reg3, \mask /* Unmatch is indicated by EQ=1 (CR) */
+ and \reg1, \reg1, \reg3
+ and \reg2, \reg2, \reg3
+ cmplw \reg1, \reg2
+ sync
+.endm
+
+.macro SETBITS reg1, reg2, mask
+ LWI \reg2, \mask
+ or \reg1, \reg1, \reg2
+ sync
+.endm
+
+.macro CLRBITS reg1, reg2, mask
+ LWI \reg2, \mask
+ andc \reg1, \reg1, \reg2
+ sync
+.endm
+
+.extern _bss_start
+.extern _bss_size
+.extern _data_start
+.extern _data_size
+.extern _text_start
+.extern _text_size
+/*.extern _s_got*/
+.extern boot_card
+.extern MBAR
+
+.section ".vectors"
+PUBLIC_VAR (reset_vec)
+reset_vec:
+ bl start
+.section ".entry"
+PUBLIC_VAR (start)
+start:
+ /*
+ * FIXME: basic CPU setup:
+ * init MSR
+ */
+ mfmsr r30
+ SETBITS r30, r29, MSR_ME|MSR_RI
+ CLRBITS r30, r29, MSR_IP|MSR_EE
+ mtmsr r30 /* Set RI/ME, Clr EE in MSR */
+ /*
+ * check, wether we are starting from ROM
+ * detect this using the absolute code address:
+ * when the upper 4 bits are 0xF, then we are in ROM
+ */
+ bl 1f
+1: mflr r28
+ LWI r29,0xF0000000
+ TSTBITS r28,r29,r30,0xF0000000
+ bne start_rom_skip
+ /*
+ * ROM startup: remap IMMR to 0xE0000000
+ * use special sequence from MPC8349EA RM Rev 1, 5.2.4.1.1 "Updating IMMRBAR"
+ */
+ LWI r30,IMMRBAR_DEFAULT
+ LWI r31,IMMRBAR
+ lwz r29,0(r30)
+ stw r31,0(r30)
+ lwz r29,0(r28) /* read from ROM... */
+ isync
+ lwz r29,0(r31) /* read from IMMRBAR... */
+ isync
+ /*
+ * NOTE: now r31 points to onchip registers
+
+ /*
+ * ROM startup: init local access windows
+ */
+#ifdef LBLAWBAR0_VAL
+ SET_IMM_REGW r31,r30,LBLAWBAR0_OFF,LBLAWBAR0_VAL
+#endif
+#ifdef LBLAWAR0_VAL
+ SET_IMM_REGW r31,r30,LBLAWAR0_OFF,LBLAWAR0_VAL
+#endif
+#ifdef LBLAWBAR1_VAL
+ SET_IMM_REGW r31,r30,LBLAWBAR1_OFF,LBLAWBAR1_VAL
+#endif
+#ifdef LBLAWAR1_VAL
+ SET_IMM_REGW r31,r30,LBLAWAR1_OFF,LBLAWAR1_VAL
+#endif
+#ifdef LBLAWBAR2_VAL
+ SET_IMM_REGW r31,r30,LBLAWBAR2_OFF,LBLAWBAR2_VAL
+#endif
+#ifdef LBLAWAR2_VAL
+ SET_IMM_REGW r31,r30,LBLAWAR2_OFF,LBLAWAR2_VAL
+#endif
+#ifdef LBLAWBAR3_VAL
+ SET_IMM_REGW r31,r30,LBLAWBAR3_OFF,LBLAWBAR3_VAL
+#endif
+#ifdef LBLAWAR3_VAL
+ SET_IMM_REGW r31,r30,LBLAWAR3_OFF,LBLAWAR3_VAL
+#endif
+ /*
+ * ROM startup: init bus system
+ */
+#ifdef BR0_VAL
+ SET_IMM_REGW r31,r30,BR0_OFF,BR0_VAL
+#endif
+#ifdef OR0_VAL
+ SET_IMM_REGW r31,r30,OR0_OFF,OR0_VAL
+#endif
+#ifdef BR1_VAL
+ SET_IMM_REGW r31,r30,BR1_OFF,BR1_VAL
+#endif
+#ifdef OR1_VAL
+ SET_IMM_REGW r31,r30,OR1_OFF,OR1_VAL
+#endif
+#ifdef BR2_VAL
+ SET_IMM_REGW r31,r30,BR2_OFF,BR2_VAL
+#endif
+#ifdef OR2_VAL
+ SET_IMM_REGW r31,r30,OR2_OFF,OR2_VAL
+#endif
+#ifdef BR3_VAL
+ SET_IMM_REGW r31,r30,BR3_OFF,BR3_VAL
+#endif
+#ifdef OR3_VAL
+ SET_IMM_REGW r31,r30,OR3_OFF,OR3_VAL
+#endif
+ /*
+ * ROM startup: init SDRAM access window
+ */
+#ifdef DDRLAWBAR0_VAL
+ SET_IMM_REGW r31,r30,DDRLAWBAR0_OFF,DDRLAWBAR0_VAL
+#endif
+#ifdef DDRLAWAR0_VAL
+ SET_IMM_REGW r31,r30,DDRLAWAR0_OFF,DDRLAWAR0_VAL
+#endif
+#ifdef DDRLAWBAR1_VAL
+ SET_IMM_REGW r31,r30,DDRLAWBAR1_OFF,DDRLAWBAR1_VAL
+#endif
+#ifdef DDRLAWAR1_VAL
+ SET_IMM_REGW r31,r30,DDRLAWAR1_OFF,DDRLAWAR1_VAL
+#endif
+ /*
+ * ROM startup: init SDRAM
+ */
+#ifdef CS0_BNDS_VAL
+ SET_IMM_REGW r31,r30,CS0_BNDS_OFF,CS0_BNDS_VAL
+#endif
+#ifdef CS1_BNDS_VAL
+ SET_IMM_REGW r31,r30,CS1_BNDS_OFF,CS1_BNDS_VAL
+#endif
+#ifdef CS2_BNDS_VAL
+ SET_IMM_REGW r31,r30,CS2_BNDS_OFF,CS2_BNDS_VAL
+#endif
+#ifdef CS3_BNDS_VAL
+ SET_IMM_REGW r31,r30,CS3_BNDS_OFF,CS3_BNDS_VAL
+#endif
+#ifdef CS0_CONFIG_VAL
+ SET_IMM_REGW r31,r30,CS0_CONFIG_OFF,CS0_CONFIG_VAL
+#endif
+#ifdef CS1_CONFIG_VAL
+ SET_IMM_REGW r31,r30,CS1_CONFIG_OFF,CS1_CONFIG_VAL
+#endif
+#ifdef CS2_CONFIG_VAL
+ SET_IMM_REGW r31,r30,CS2_CONFIG_OFF,CS2_CONFIG_VAL
+#endif
+#ifdef CS3_CONFIG_VAL
+ SET_IMM_REGW r31,r30,CS3_CONFIG_OFF,CS3_CONFIG_VAL
+#endif
+#ifdef TIMING_CFG_3_VAL
+ SET_IMM_REGW r31,r30,TIMING_CFG_3_OFF,TIMING_CFG_3_VAL
+#endif
+#ifdef TIMING_CFG_0_VAL
+ SET_IMM_REGW r31,r30,TIMING_CFG_0_OFF,TIMING_CFG_0_VAL
+#endif
+#ifdef TIMING_CFG_1_VAL
+ SET_IMM_REGW r31,r30,TIMING_CFG_1_OFF,TIMING_CFG_1_VAL
+#endif
+#ifdef TIMING_CFG_2_VAL
+ SET_IMM_REGW r31,r30,TIMING_CFG_2_OFF,TIMING_CFG_2_VAL
+#endif
+#ifdef DDR_SDRAM_CFG_VAL
+ SET_IMM_REGW r31,r30,DDR_SDRAM_CFG_OFF,DDR_SDRAM_CFG_VAL
+#endif
+#ifdef DDR_SDRAM_CFG_2_VAL
+ SET_IMM_REGW r31,r30,DDR_SDRAM_CFG_2_OFF,DDR_SDRAM_CFG_2_VAL
+#endif
+#ifdef DDR_SDRAM_MODE_VAL
+ SET_IMM_REGW r31,r30,DDR_SDRAM_MODE_OFF,DDR_SDRAM_MODE_VAL
+#endif
+#ifdef DDR_SDRAM_MODE_2_VAL
+ SET_IMM_REGW r31,r30,DDR_SDRAM_MODE_2_OFF,DDR_SDRAM_MODE_2_VAL
+#endif
+#ifdef DDR_SDRAM_MD_CNTL_VAL
+ SET_IMM_REGW r31,r30,DDR_SDRAM_MD_CNTL_OFF,DDR_SDRAM_MD_CNTL_VAL
+#endif
+#ifdef DDR_SDRAM_MD_ITVL_VAL
+ SET_IMM_REGW r31,r30,DDR_SDRAM_MD_ITVL_OFF,DDR_SDRAM_MD_ITVL_VAL
+#endif
+#ifdef DDR_SDRAM_CLK_CNTL_VAL
+ SET_IMM_REGW r31,r30,DDR_SDRAM_CLK_CNTL_OFF,DDR_SDRAM_CLK_CNTL_VAL
+#endif
+#ifdef DDR_SDRAM_INIT_ADDR_VAL
+ SET_IMM_REGW r31,r30,DDR_SDRAM_INIT_ADDR_OFF,DDR_SDRAM_INIT_ADDR_VAL
+#endif
+ /*
+ * FIXME: ROM startup: perform mode set commands etc for SDRAM
+ */
+ /*
+ * ROM startup: copy code to SDRAM
+ */
+ LA r30, _text_start /* get start address of text section in RAM */
+ add r30, r20, r30 /* get start address of text section in ROM (add reloc offset) */
+ LA r29, _text_start /* get start address of text section in RAM */
+ LA r28, _text_size /* get size of RAM image */
+ bl copy_image /* copy text section from ROM to RAM location */
+
+ /*
+ * FIXME: ROM startup: copy data to SDRAM
+ */
+ LA r30, _data_start /* get start address of data section in RAM */
+ add r30, r20, r30 /* get start address of data section in ROM (add reloc offset) */
+ LA r29, _data_start /* get start address of data section in RAM */
+ LA r28, _data_size /* get size of RAM image */
+ bl copy_image /* copy initialized data section from ROM to RAM location */
+start_rom_skip:
+ /*
+ * ROM startup: clear bss in SDRAM
+ */
+ LWI r30, _bss_start /* get start address of bss section */
+ LWI r29, _bss_size /* get size of bss section */
+ bl clr_mem /* Clear the bss section */
+ /*
+ * ROM startup: jump to code copy in SDRAM
+ */
+ LA r29, start_code_in_ram /* get compile time address of label */
+ mtlr r29
+ blr /* now further execution RAM */
+start_code_in_ram:
+ /*
+ * call boot_card
+ */
+/* set stack pointer (common for RAM/ROM startup) */
+ LA r1, _text_start
+ addi r1, r1, -0x10 /* Set up stack pointer = beginning of text section - 0x10 */
+/* clear arguments and do further init. in C (common for RAM/ROM startup) */
+ xor r3, r3, r3
+ xor r4, r4, r4 /* Clear argc and argv */
+ bl SYM (boot_card) /* Call the first C routine */
+
+twiddle:
+ /* We don't expect to return from boot_card but if we do */
+ /* wait here for watchdog to kick us into hard reset */
+ b twiddle
+
+copy_image:
+ mr r27, r28
+ srwi r28, r28, 2
+ mtctr r28
+
+ slwi r28, r28, 2
+ sub r27, r27, r28 /* maybe some residual bytes */
+copy_image_word:
+ lswi r28, r30, 0x04
+
+ stswi r28, r29, 0x04 /* do word copy ROM -> RAM */
+
+
+ addi r30, r30, 0x04 /* increment source pointer */
+ addi r29, r29, 0x04 /* increment destination pointer */
+
+ bdnz copy_image_word /* decrement ctr and branch if not 0 */
+
+ cmpwi r27, 0x00 /* copy image finished ? */
+ beq copy_image_end;
+ mtctr r27 /* reload counter for residual bytes */
+copy_image_byte:
+ lswi r28, r30, 0x01
+
+ stswi r28, r29, 0x01 /* do byte copy ROM -> RAM */
+
+
+ addi r30, r30, 0x01 /* increment source pointer */
+ addi r29, r29, 0x01 /* increment destination pointer */
+
+ bdnz copy_image_byte /* decrement ctr and branch if not 0 */
+
+copy_image_end:
+ blr
+
+clr_mem:
+ mr r28, r29
+ srwi r29, r29, 2
+ mtctr r29 /* set ctr reg */
+
+
+ slwi r29, r29, 2
+ sub r28, r28, r29 /* maybe some residual bytes */
+ xor r29, r29, r29
+
+
+clr_mem_word:
+ stswi r29, r30, 0x04 /* store r29 (word) to r30 memory location */
+ addi r30, r30, 0x04 /* increment r30 */
+
+ bdnz clr_mem_word /* dec counter and loop */
+
+
+ cmpwi r28, 0x00 /* clear mem. finished ? */
+ beq clr_mem_end;
+ mtctr r28 /* reload counter for residual bytes */
+clr_mem_byte:
+ stswi r29, r30, 0x01 /* store r29 (byte) to r30 memory location */
+ addi r30, r30, 0x01 /* update r30 */
+
+ bdnz clr_mem_byte /* dec counter and loop */
+
+clr_mem_end:
+ blr /* return */
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
new file mode 100644
index 0000000000..63c41dd2a5
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
@@ -0,0 +1,267 @@
+/*===============================================================*\
+| Project: RTEMS generic MPC83xx BSP |
++-----------------------------------------------------------------+
+| Copyright (c) 2007 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file contains the BSP startup code |
+\*===============================================================*/
+
+#include <bsp.h>
+
+#include <rtems/libio.h>
+#include <rtems/libcsupport.h>
+#include <rtems/powerpc/powerpc.h>
+#include <rtems/score/thread.h>
+
+#include <rtems/bspIo.h>
+#include <libcpu/cpuIdent.h>
+#include <libcpu/spr.h>
+#include <bsp/irq.h>
+
+#include <string.h>
+
+SPR_RW(SPRG0)
+SPR_RW(SPRG1)
+
+/*
+ * The original table from the application (in ROM) and our copy of it with
+ * some changes. Configuration is defined in <confdefs.h>. Make sure that
+ * our configuration tables are uninitialized so that they get allocated in
+ * the .bss section (RAM).
+ */
+extern rtems_configuration_table Configuration;
+extern unsigned long intrStackPtr;
+rtems_configuration_table BSP_Configuration;
+static char *BSP_heap_start, *BSP_heap_end;
+rtems_cpu_table Cpu_table;
+char *rtems_progname;
+
+/*
+ * constants for c_clock driver:
+ * system bus frequency (for timebase etc)
+ * and
+ * Time base divisior: scaling value:
+ * BSP_time_base_divisor = TB ticks per millisecond/BSP_bus_frequency
+ */
+unsigned int BSP_bus_frequency = BSP_CSB_CLK_FRQ;
+unsigned int BSP_time_base_divisor = 4000; /* 4 bus clicks per TB click */
+
+/*
+ * Use the shared implementations of the following routines.
+ * Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
+ * rtems/c/src/lib/libbsp/shared/bsplibc.c.
+ */
+void bsp_postdriver_hook(void);
+void bsp_libc_init( void *, uint32_t, int );
+extern void initialize_exceptions(void);
+extern void cpu_init(void);
+
+void BSP_panic(char *s)
+ {
+ printk("%s PANIC %s\n",_RTEMS_version, s);
+ /*
+ * FIXME: hang/restart system
+ */
+ __asm__ __volatile ("sc");
+ }
+
+void _BSP_Fatal_error(unsigned int v)
+ {
+ printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
+ /*
+ * FIXME: hang/restart system
+ */
+ __asm__ __volatile ("sc");
+ }
+
+/*
+ * Function: bsp_pretasking_hook
+ * Created: 95/03/10
+ *
+ * Description:
+ * BSP pretasking hook. Called just before drivers are initialized.
+ * Used to setup libc and install any BSP extensions.
+ *
+ * NOTES:
+ * Must not use libc (to do io) from here, since drivers are
+ * not yet initialized.
+ *
+ */
+
+void
+bsp_pretasking_hook(void)
+{
+
+ /*
+ * initialize libc including the heap
+ */
+ bsp_libc_init( BSP_heap_start,
+ BSP_heap_end - BSP_heap_start,
+ 0);
+
+
+#ifdef STACK_CHECKER_ON
+ /*
+ * Initialize the stack bounds checker
+ * We can either turn it on here or from the app.
+ */
+
+ Stack_check_Initialize();
+#endif
+
+#ifdef RTEMS_DEBUG
+ rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
+#endif
+}
+
+
+
+void bsp_predriver_hook(void)
+{
+}
+
+void bsp_calc_mem_layout()
+{
+ /*
+ * these labels (!) are defined in the linker command file
+ * or when the linker is invoked
+ * NOTE: the information(size) is the address of the object,
+ * not the object otself
+ */
+ extern unsigned char TopRamReserved;
+ extern unsigned char _WorkspaceBase;
+
+ /*
+ * compute the memory layout:
+ * - first unused address is Workspace start
+ * - Heap starts at end of workspace
+ * - Heap ends at end of memory - reserved memory area
+ */
+ BSP_Configuration.work_space_start = &_WorkspaceBase;
+
+ BSP_heap_start = ((char *)BSP_Configuration.work_space_start +
+ BSP_Configuration.work_space_size);
+
+#if defined(HAS_UBOOT)
+ BSP_heap_end = (uboot_bdinfo_ptr->bi_memstart
+ + uboot_bdinfo_ptr->bi_memsize
+ - (uint32_t)&TopRamReserved);
+#else
+ BSP_heap_end = (void *)(RAM_END - (uint32_t)&TopRamReserved);
+#endif
+
+}
+
+
+void bsp_start(void)
+{
+ ppc_cpu_id_t myCpu;
+ ppc_cpu_revision_t myCpuRevision;
+ register unsigned char* intrStack;
+
+ /*
+ * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
+ * store the result in global variables so that it can be used latter...
+ */
+ myCpu = get_ppc_cpu_type();
+ myCpuRevision = get_ppc_cpu_revision();
+ /*
+ * determine heap and workspace placement
+ */
+ bsp_calc_mem_layout();
+
+ cpu_init();
+
+ /*
+ * Initialize some SPRG registers related to irq handling
+ */
+
+ intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
+
+ _write_SPRG1((unsigned int)intrStack);
+
+ /* Signal them that this BSP has fixed PR288 - eventually, this should go away */
+ _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
+
+ /*
+ * initialize the CPU table for this BSP
+ */
+
+ Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
+ Cpu_table.predriver_hook = bsp_predriver_hook; /* init PCI / RTC ... */
+ Cpu_table.postdriver_hook = bsp_postdriver_hook;
+ Cpu_table.clicks_per_usec = (BSP_CSB_CLK_FRQ/1000000);
+ Cpu_table.exceptions_in_RAM = TRUE;
+
+ if( Cpu_table.interrupt_stack_size < 4*1024 )
+ Cpu_table.interrupt_stack_size = 4 * 1024;
+
+ /*
+ * Install our own set of exception vectors
+ */
+
+ initialize_exceptions();
+
+ /*
+ * Enable instruction and data caches. Do not force writethrough mode.
+ */
+#if INSTRUCTION_CACHE_ENABLE
+ rtems_cache_enable_instruction();
+#endif
+#if DATA_CACHE_ENABLE
+ rtems_cache_enable_data();
+#endif
+
+ /*
+ * Allocate the memory for the RTEMS Work Space. This can come from
+ * a variety of places: hard coded address, malloc'ed from outside
+ * RTEMS world (e.g. simulator or primitive memory manager), or (as
+ * typically done by stock BSPs) by subtracting the required amount
+ * of work space from the last physical address on the CPU board.
+ */
+
+ /*
+ * Initalize RTEMS IRQ system
+ */
+ BSP_rtems_irq_mng_init(0);
+
+#ifdef SHOW_MORE_INIT_SETTINGS
+ printk("Exit from bspstart\n");
+#endif
+
+ }
+
+/*
+ *
+ * _Thread_Idle_body
+ *
+ * Replaces the one in c/src/exec/score/src/threadidlebody.c
+ * The MSR[POW] bit is set to put the CPU into the low power mode
+ * defined in HID0. HID0 is set during starup in start.S.
+ *
+ */
+Thread _Thread_Idle_body(uint32_t ignored )
+ {
+
+ for(;;)
+ {
+
+ asm volatile("mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0");
+
+ }
+
+ return 0;
+
+ }
+
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c
new file mode 100644
index 0000000000..c4d6f50491
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c
@@ -0,0 +1,216 @@
+/*===============================================================*\
+| Project: RTEMS generic MPC83xx BSP |
++-----------------------------------------------------------------+
+| Partially based on the code references which are named below. |
+| Adaptions, modifications, enhancements and any recent parts of |
+| the code are: |
+| Copyright (c) 2005 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file contains the code to initialize the cpu |
+\*===============================================================*/
+/***********************************************************************/
+/* */
+/* Module: cpuinit.c */
+/* Date: 07/17/2003 */
+/* Purpose: RTEMS MPC5x00 C level startup code */
+/* */
+/*---------------------------------------------------------------------*/
+/* */
+/* Description: This file contains additional functions for */
+/* initializing the MPC5x00 CPU */
+/* */
+/*---------------------------------------------------------------------*/
+/* */
+/* Code */
+/* References: MPC8260ads additional CPU initialization */
+/* Module: cpuinit.c */
+/* Project: RTEMS 4.6.0pre1 / MCF8260ads BSP */
+/* Version 1.1 */
+/* Date: 10/22/2002 */
+/* */
+/* Author(s) / Copyright(s): */
+/* */
+/* Written by Jay Monkman (jmonkman@frasca.com) */
+/* */
+/*---------------------------------------------------------------------*/
+/* */
+/* Partially based on the code references which are named above. */
+/* Adaptions, modifications, enhancements and any recent parts of */
+/* the code are under the right of */
+/* */
+/* IPR Engineering, Dachauer Straße 38, D-80335 München */
+/* Copyright(C) 2003 */
+/* */
+/*---------------------------------------------------------------------*/
+/* */
+/* IPR Engineering makes no representation or warranties with */
+/* respect to the performance of this computer program, and */
+/* specifically disclaims any responsibility for any damages, */
+/* special or consequential, connected with the use of this program. */
+/* */
+/*---------------------------------------------------------------------*/
+/* */
+/* Version history: 1.0 */
+/* */
+/***********************************************************************/
+
+#include <bsp.h>
+#include <rtems/powerpc/registers.h>
+#include <mpc83xx/mpc83xx.h>
+
+#include <libcpu/mmu.h>
+#include <libcpu/spr.h>
+#include <string.h>
+
+#define USE_IMMU
+
+/* Macros for HID0 access */
+#define SET_HID0(r) __asm__ volatile ("mtspr 0x3F0,%0\n" ::"r"(r))
+#define GET_HID0(r) __asm__ volatile ("mfspr %0,0x3F0\n" :"=r"(r))
+
+#define DBAT_MTSPR(val,name) __MTSPR(val,name);
+#define SET_DBAT(n,uv,lv) {DBAT_MTSPR(lv,DBAT##n##L);DBAT_MTSPR(uv,DBAT##n##U);}
+#if defined(USE_IMMU )
+#define IBAT_MTSPR(val,name) __MTSPR(val,name);
+#define SET_IBAT(n,uv,lv) {IBAT_MTSPR(lv,IBAT##n##L);IBAT_MTSPR(uv,IBAT##n##U);}
+#endif
+
+void calc_dbat_regvals(BAT *bat_ptr,
+ uint32_t base_addr,
+ uint32_t size,
+ boolean flg_w,
+ boolean flg_i,
+ boolean flg_m,
+ boolean flg_g,
+ boolean flg_bpp)
+{
+ uint32_t block_mask;
+ uint32_t end_addr;
+
+ /*
+ * determine block mask, that overlaps the whole block
+ */
+ end_addr = base_addr+size-1;
+ block_mask = ~0;
+ while ((end_addr & block_mask) != (base_addr & block_mask)) {
+ block_mask <<= 1;
+ }
+
+ bat_ptr->batu.bepi = base_addr >> (32-15);
+ bat_ptr->batu.bl = ~(block_mask >> (28-11));
+ bat_ptr->batu.vs = 1;
+ bat_ptr->batu.vp = 1;
+
+ bat_ptr->batl.brpn = base_addr >> (32-15);
+ bat_ptr->batl.w = flg_w;
+ bat_ptr->batl.i = flg_i;
+ bat_ptr->batl.m = flg_m;
+ bat_ptr->batl.g = flg_g;
+ bat_ptr->batl.pp = flg_bpp;
+}
+
+void clear_mmu_regs(void)
+{
+ uint32_t i;
+ /*
+ * clear segment registers
+ */
+ for (i = 0;i < 16;i++) {
+ asm volatile(" mtsrin %0, %1\n"::"r" (i * 0x1000),"r"(i<<(31-3)));
+ }
+ /*
+ * clear TLBs
+ */
+ for (i = 0;i < 32;i++) {
+ asm volatile(" tlbie %0\n"::"r" (i << (31-19)));
+ }
+}
+
+void cpu_init(void)
+{
+ register unsigned long reg;
+ BAT dbat,ibat;
+
+ /*
+ * clear MMU/Segment registers
+ */
+ clear_mmu_regs();
+ /*
+ * clear caches
+ */
+ GET_HID0(reg);
+ reg |= (HID0_ICFI | HID0_DCI);
+ SET_HID0(reg);
+ reg &= ~(HID0_ICFI | HID0_DCI);
+ SET_HID0(reg);
+
+ /*
+ * set up IBAT registers in MMU
+ */
+ memset(&ibat,0,sizeof(ibat));
+ SET_IBAT(2,ibat.batu,ibat.batl);
+ SET_IBAT(3,ibat.batu,ibat.batl);
+ SET_IBAT(4,ibat.batu,ibat.batl);
+ SET_IBAT(5,ibat.batu,ibat.batl);
+ SET_IBAT(6,ibat.batu,ibat.batl);
+ SET_IBAT(7,ibat.batu,ibat.batl);
+
+ calc_dbat_regvals(&ibat,RAM_START,RAM_SIZE,0,0,0,0,BPP_RX);
+ SET_IBAT(0,ibat.batu,ibat.batl);
+ calc_dbat_regvals(&ibat,ROM_START,ROM_SIZE,0,0,0,0,BPP_RX);
+ SET_IBAT(1,ibat.batu,ibat.batl);
+
+ /*
+ * set up DBAT registers in MMU
+ */
+ memset(&dbat,0,sizeof(dbat));
+ SET_DBAT(3,dbat.batu,dbat.batl);
+ SET_DBAT(4,dbat.batu,dbat.batl);
+ SET_DBAT(5,dbat.batu,dbat.batl);
+ SET_DBAT(6,dbat.batu,dbat.batl);
+ SET_DBAT(7,dbat.batu,dbat.batl);
+
+ calc_dbat_regvals(&dbat,RAM_START,RAM_SIZE,1,0,1,0,BPP_RW);
+ SET_DBAT(0,dbat.batu,dbat.batl);
+
+ calc_dbat_regvals(&dbat,ROM_START,ROM_SIZE,1,0,1,0,BPP_RX);
+ SET_DBAT(1,dbat.batu,dbat.batl);
+
+ calc_dbat_regvals(&dbat,IMMRBAR,1024*1024,1,1,1,1,BPP_RW);
+ SET_DBAT(2,dbat.batu,dbat.batl);
+
+ /*
+ * enable data/instruction MMU in MSR
+ */
+ _write_MSR(_read_MSR() | MSR_DR/* | MSR_IR*/);
+
+ /*
+ * enable FPU in MSR
+ */
+ _write_MSR(_read_MSR() | MSR_FP);
+
+ /*
+ * in HID0:
+ * - enable dynamic power management
+ * - enable machine check interrupts
+ */
+ GET_HID0(reg);
+ reg |= (HID0_EMCP | HID0_DPM) ;
+ SET_HID0(reg);
+
+ /*
+ * enable timebase clock
+ */
+ mpc83xx.syscon.spcr |= M83xx_SYSCON_SPCR_TBEN;
+}
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc8349eamds b/c/src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc8349eamds
new file mode 100644
index 0000000000..d1eab4a28c
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc8349eamds
@@ -0,0 +1,324 @@
+/*
+ * This file contains directives for the GNU linker which are specific
+ * to a gen8349eamds board
+ *
+ * linkcmds,v 1.3 2003/01/20 19:53:27 joel Exp
+ */
+
+OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
+ "elf32-powerpc")
+OUTPUT_ARCH(powerpc)
+
+ENTRY(start)
+
+/*
+ * Declare some sizes.
+ * XXX: The assignment of ". += XyzSize;" fails in older gld's if the
+ * number used there is not constant. If this happens to you, edit
+ * the lines marked XXX below to use a constant value.
+ */
+HeapSize = DEFINED(HeapSize) ? HeapSize : 0x6800000; /* 104M Heap */
+StackSize = DEFINED(StackSize) ? StackSize : 0x80000; /* 512 kB */
+WorkSpaceSize = DEFINED(WorkSpaceSize) ? WorkSpaceSize : 0x80000; /* 512k */
+RamDiskSize = DEFINED(RamDiskSize) ? RamDiskSize : 0x80000; /* 512 ram disk */
+
+/*
+ * optionally reserve additional space
+ */
+TopRamReserved = DEFINED(TopRamReserved) ? TopRamReserved : 0;
+
+MEMORY
+ {
+ ram : org = 0x0, l = 256M
+ mpc83xx_regs : org = 0xE0000000, l = 256k
+ }
+
+
+SECTIONS
+{
+
+ mpc83xx_regs (NOLOAD) :
+ {
+ IMMRBAR = .;
+ *mpc83xx_regs*(*)
+ } > mpc83xx_regs
+
+ .vectors 0x100 :
+ {
+ *(.vectors)
+ }
+ > ram
+
+ /*
+ * The stack will live in this area - between the vectors and
+ * the text section.
+ */
+
+ .text 0x10000:
+ {
+ _textbase = .;
+
+
+ text.start = .;
+
+ /* Entry point is the .entry section */
+ *(.entry)
+ *(.entry2)
+
+ /* Actual Code */
+ *(.text*)
+
+ *(.rodata*)
+ *(.rodata1)
+
+
+ /*
+ * Special FreeBSD sysctl sections.
+ */
+ . = ALIGN (16);
+ __start_set_sysctl_set = .;
+ *(set_sysctl_*);
+ __stop_set_sysctl_set = ABSOLUTE(.);
+ *(set_domain_*);
+ *(set_pseudo_*);
+
+ /* C++ constructors/destructors */
+ *(.gnu.linkonce.t*)
+
+ /* Initialization and finalization code.
+ *
+ * Various files can provide initialization and finalization functions.
+ * The bodies of these functions are in .init and .fini sections. We
+ * accumulate the bodies here, and prepend function prologues from
+ * ecrti.o and function epilogues from ecrtn.o. ecrti.o must be linked
+ * first; ecrtn.o must be linked last. Because these are wildcards, it
+ * doesn't matter if the user does not actually link against ecrti.o and
+ * ecrtn.o; the linker won't look for a file to match a wildcard. The
+ * wildcard also means that it doesn't matter which directory ecrti.o
+ * and ecrtn.o are in.
+ */
+ PROVIDE (_init = .);
+ *ecrti.o(.init)
+ *(.init)
+ *ecrtn.o(.init)
+
+ PROVIDE (_fini = .);
+ *ecrti.o(.fini)
+ *(.fini)
+ *ecrtn.o(.init)
+
+ /*
+ * C++ constructors and destructors for static objects.
+ * PowerPC EABI does not use crtstuff yet, so we build "old-style"
+ * constructor and destructor lists that begin with the list lenght
+ * end terminate with a NULL entry.
+ */
+
+ PROVIDE (__CTOR_LIST__ = .);
+ *crtbegin.o(.ctors)
+ *(.ctors)
+ *crtend.o(.ctors)
+ LONG(0)
+ PROVIDE (__CTOR_END__ = .);
+
+ PROVIDE (__DTOR_LIST__ = .);
+ *crtbegin.o(.dtors)
+ *(.dtors)
+ *crtend.o(.dtors)
+ LONG(0)
+ PROVIDE (__DTOR_END__ = .);
+
+ /* Exception frame info */
+ *(.eh_frame)
+
+ /* Miscellaneous read-only data */
+ _rodata_start = . ;
+ *(.gnu.linkonce.r*)
+ *(.lit)
+ *(.shdata)
+ *(.rodata)
+ *(.rodata1)
+ *(.descriptors)
+ *(rom_ver)
+ _erodata = .;
+
+ PROVIDE (__EXCEPT_START__ = .);
+ *(.gcc_except_table)
+ PROVIDE (__EXCEPT_END__ = .);
+ __GOT_START__ = .;
+ s.got = .;
+ *(.got.plt)
+ *(.got)
+ *(.got1)
+ PROVIDE (__GOT2_START__ = .);
+ PROVIDE (_GOT2_START_ = .);
+ *(.got2)
+ PROVIDE (__GOT2_END__ = .);
+ PROVIDE (_GOT2_END_ = .);
+
+ PROVIDE (__FIXUP_START__ = .);
+ PROVIDE (_FIXUP_START_ = .);
+ *(.fixup)
+ PROVIDE (_FIXUP_END_ = .);
+ PROVIDE (__FIXUP_END__ = .);
+
+
+ /* Various possible names for the end of the .text section */
+ etext = ALIGN(0x10);
+ _etext = .;
+ _endtext = .;
+ text.end = .;
+ PROVIDE (etext = .);
+ PROVIDE (__etext = .);
+
+ } > ram
+
+ .jcr : { KEEP (*(.jcr)) } > ram
+
+ .rel.dyn : {
+ *(.rel.init)
+ *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
+ *(.rel.fini)
+ *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
+ *(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*)
+ *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
+ *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
+ *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
+ *(.rel.ctors)
+ *(.rel.dtors)
+ *(.rel.got)
+ *(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*)
+ *(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*)
+ *(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*)
+ *(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*)
+ *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
+ } >ram
+ .rela.dyn : {
+ *(.rela.init)
+ *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+ *(.rela.fini)
+ *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+ *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+ *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
+ *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
+ *(.rela.ctors)
+ *(.rela.dtors)
+ *(.rela.got)
+ *(.rela.got1)
+ *(.rela.got2)
+ *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
+ *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
+ *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
+ *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
+ *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+ } >ram
+
+ PROVIDE (__SDATA2_START__ = .);
+ .sdata2 : { *(.sdata2) *(.gnu.linkonce.s2.*) } >ram
+ .sbss2 : { *(.sbss2) *(.gnu.linkonce.sb2.*) } >ram
+ PROVIDE (__SBSS2_END__ = .);
+
+ .sbss2 : { *(.sbss2) } >ram
+ PROVIDE (__SBSS2_END__ = .);
+
+ /* R/W Data */
+ .data ( . ) :
+ {
+ . = ALIGN (4);
+
+ data.start = .;
+
+ *(.data)
+ *(.data1)
+ *(.data.* .gnu.linkonce.d.*)
+ PROVIDE (__SDATA_START__ = .);
+ *(.sdata*)
+ *(.gnu.linkonce.s.*)
+ data.end = .;
+ } > ram
+
+ __SBSS_START__ = .;
+ .bss :
+ {
+ bss.start = .;
+ *(.bss .bss* .gnu.linkonce.b*)
+ *(.sbss*) *(COMMON)
+ . = ALIGN(4);
+ bss.end = .;
+ } > ram
+ __SBSS_END__ = .;
+
+ PROVIDE(_bss_start = ADDR(.bss));
+ PROVIDE(_bss_size = SIZEOF(.bss));
+ PROVIDE(_data_start = ADDR(.data));
+ PROVIDE(_data_size = SIZEOF(.data));
+ PROVIDE(_text_start = ADDR(.text));
+ PROVIDE(_text_size = SIZEOF(.text));
+ PROVIDE(_end = data.end);
+
+ .gzipmalloc : {
+ . = ALIGN (16);
+ _startmalloc = .;
+ } >ram
+
+
+ /*
+ * Interrupt stack setup
+ */
+ IntrStack_start = ALIGN(0x10);
+ . += 0x4000;
+ intrStack = .;
+ PROVIDE(intrStackPtr = intrStack);
+
+
+
+
+ _WorkspaceBase = .;
+ __WorkspaceBase = .;
+ . += WorkSpaceSize;
+
+ _RamDiskBase = .;
+ __RamDiskBase = .;
+ . += RamDiskSize;
+ _RamDiskEnd = .;
+ __RamDiskEnd = .;
+ PROVIDE( _RamDiskSize = _RamDiskEnd - _RamDiskBase );
+
+ _HeapStart = .;
+ __HeapStart = .;
+ . += HeapSize;
+ _HeapEnd = .;
+ __HeapEnd = .;
+
+ clear_end = .;
+
+ /* Sections for compressed .text and .data */
+ /* after the .datarom section is an int specifying */
+ /* the length of the following compressed image */
+ /* Executes once then could get overwritten */
+ .textrom 0x100000 :
+ {
+ *(.textrom)
+ _endloader = .;
+ } > ram
+
+ .datarom :
+ {
+ _dr_start = .;
+ *(.datarom)
+ _dr_end = .;
+ } > ram
+ dr_len = _dr_end - _dr_start;
+
+
+ .line 0 : { *(.line) }
+ .debug 0 : { *(.debug) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_aregion 0 : { *(.debug_aregion) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+}
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/mpc83xx_regs.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/mpc83xx_regs.c
new file mode 100644
index 0000000000..0c26f09fbd
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/mpc83xx_regs.c
@@ -0,0 +1,28 @@
+/*===============================================================*\
+| Project: RTEMS generic MPC83xx BSP |
++-----------------------------------------------------------------+
+| Partially based on the code references which are named below. |
+| Adaptions, modifications, enhancements and any recent parts of |
+| the code are: |
+| Copyright (c) 2005 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file places the mpc83xx registers into a special section |
+\*===============================================================*/
+#include <mpc83xx/mpc83xx.h>
+
+/*
+ * this uninitialized variable will be overlayed to the hardware
+ * registers in the linker command file
+ */
+m83xxRegisters_t mpc83xx;
diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S
index 412a8e2214..e8a9c779e7 100644
--- a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S
+++ b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S
@@ -47,6 +47,24 @@ SYM (decrementer_exception_vector_prolog_code):
decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code
#endif
+#if defined(ASM_SYSMGMT_VECTOR)
+ PUBLIC_VAR(sysmgmt_exception_vector_prolog_code)
+
+SYM (sysmgmt_exception_vector_prolog_code):
+ /*
+ * let room for exception frame
+ */
+ stwu r1, - (EXCEPTION_FRAME_END)(r1)
+ stw r4, GPR4_OFFSET(r1)
+ li r4, ASM_SYSMGMT_VECTOR
+ ba shared_raw_irq_code_entry
+
+ PUBLIC_VAR (sysmgmt_exception_vector_prolog_code_size)
+
+ sysmgmt_exception_vector_prolog_code_size = . - sysmgmt_exception_vector_prolog_code
+#endif
+
+
#if defined(ASM_PIT_VECTOR)
PUBLIC_VAR(pit_exception_vector_prolog_code)
diff --git a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h
index e931db260b..fbba8fe490 100644
--- a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h
+++ b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h
@@ -87,12 +87,22 @@ extern unsigned int tgpr_clr_exception_vector_code_prolog_size[];
*/
extern void external_exception_vector_prolog_code();
extern unsigned int external_exception_vector_prolog_code_size[];
+#if defined(ASM_DEC_VECTOR)
extern void decrementer_exception_vector_prolog_code();
extern unsigned int decrementer_exception_vector_prolog_code_size[];
+#endif
+#if defined(ASM_SYSMGMT_VECTOR)
+extern void sysmgmt_exception_vector_prolog_code();
+extern unsigned int sysmgmt_exception_vector_prolog_code_size[];
+#endif
+#if defined(ASM_PIT_VECTOR)
extern void pit_exception_vector_prolog_code();
extern unsigned int pit_exception_vector_prolog_code_size[];
+#endif
+#if defined(ASM_FIT_VECTOR)
extern void fit_exception_vector_prolog_code();
extern unsigned int fit_exception_vector_prolog_code_size[];
+#endif
/* codemove is like memmove, but it also gets the cache line size
* as 4th parameter to synchronize them. If this last parameter is
diff --git a/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c b/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c
index ffe295ff03..87b4cdfb80 100644
--- a/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c
+++ b/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c
@@ -173,6 +173,11 @@ void initialize_exceptions()
switch ( get_ppc_cpu_type() ) {
case PPC_603e:
+ case PPC_603ev:
+ case PPC_603le:
+ case PPC_e300c1:
+ case PPC_e300c2:
+ case PPC_e300c3:
case PPC_8240:
has_shadowed_gprs = 1;
default: break;
diff --git a/c/src/lib/libbsp/powerpc/virtex/.cvsignore b/c/src/lib/libbsp/powerpc/virtex/.cvsignore
index bfdfd995be..849c802af6 100644
--- a/c/src/lib/libbsp/powerpc/virtex/.cvsignore
+++ b/c/src/lib/libbsp/powerpc/virtex/.cvsignore
@@ -1,14 +1,8 @@
+Makefile
+Makefile.in
aclocal.m4
-autom4te*.cache
+autom4te.cache
config.cache
-config.guess
config.log
config.status
-config.sub
configure
-depcomp
-install-sh
-Makefile
-Makefile.in
-missing
-mkinstalldirs
diff --git a/c/src/lib/libbsp/powerpc/virtex/ChangeLog b/c/src/lib/libbsp/powerpc/virtex/ChangeLog
index 6c6ce2b2cb..bba5085e25 100644
--- a/c/src/lib/libbsp/powerpc/virtex/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/virtex/ChangeLog
@@ -1,3 +1,7 @@
+2007-07-10 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
+ * startup/linkcmds.dl:
+ removed
+
2007-07-05 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* include/bsp.h:
diff --git a/c/src/lib/libbsp/powerpc/virtex/Makefile.am b/c/src/lib/libbsp/powerpc/virtex/Makefile.am
index a0695cc434..e129bf75f2 100644
--- a/c/src/lib/libbsp/powerpc/virtex/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/virtex/Makefile.am
@@ -9,8 +9,10 @@ include $(top_srcdir)/../../bsp.am
dist_project_lib_DATA = bsp_specs
-include_HEADERS = include/bsp.h
+include_HEADERS = include/bsp.h
include_HEADERS += include/tm27.h
+include_HEADERS += include/xparameters_dflt.h
+include_HEADERS += network/xiltemac.h
nodist_include_HEADERS = include/bspopts.h
DISTCLEANFILES = include/bspopts.h
@@ -21,7 +23,13 @@ include_bspdir = $(includedir)/bsp
include_HEADERS += include/coverhd.h
-dist_project_lib_DATA += startup/linkcmds startup/linkcmds.dl
+EXTRA_DIST = ../../powerpc/shared/start/rtems_crti.S
+rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S
+ $(CPPASCOMPILE) -o $@ -c $<
+project_lib_DATA = rtems_crti.$(OBJEXT)
+
+dist_project_lib_DATA += startup/linkcmds
+
noinst_PROGRAMS += startup.rel
startup_rel_SOURCES = startup/bspclean.c ../../shared/bsplibc.c \
@@ -68,16 +76,6 @@ noinst_PROGRAMS += network.rel
network_rel_SOURCES = network/xiltemac.c
network_rel_CPPFLAGS = $(AM_CPPFLAGS)
network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
-
-
-##RSG Start
-## include_HEADERS += include/xiltemac.h
-#noinst_PROGRAMS += xiltemac.rel
-#xiltemac_rel_SOURCES = network/xiltemac.c
-#xiltemac_rel_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__ $(AM_CPPFLAGS) -O0 -g
-#xiltemac_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
-##RSG End
-
endif
noinst_LIBRARIES = libbsp.a
@@ -93,7 +91,7 @@ libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/ppc403/timer.rel \
../../../libcpu/@RTEMS_CPU@/ppc403/tty_drv.rel
-EXTRA_DIST = times
+EXTRA_DIST += times
include $(srcdir)/preinstall.am
include $(top_srcdir)/../../../../automake/local.am
diff --git a/c/src/lib/libbsp/powerpc/virtex/bsp_specs b/c/src/lib/libbsp/powerpc/virtex/bsp_specs
index b0c18cde77..9102ad7442 100644
--- a/c/src/lib/libbsp/powerpc/virtex/bsp_specs
+++ b/c/src/lib/libbsp/powerpc/virtex/bsp_specs
@@ -3,12 +3,10 @@
%rename link old_link
*startfile:
-%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: \
-%{!qrtems_debug: } \
-%{qrtems_debug: }ecrti%O%s}}
+%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s}}
*endfile:
-%{!qrtems: %(old_endfile)} %{qrtems: ecrtn%O%s}
+%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s ecrtn.o%s}
*link:
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -u __vectors -u download_entry -N }
diff --git a/c/src/lib/libbsp/powerpc/virtex/preinstall.am b/c/src/lib/libbsp/powerpc/virtex/preinstall.am
index 31983c24d1..114355759e 100644
--- a/c/src/lib/libbsp/powerpc/virtex/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/virtex/preinstall.am
@@ -8,18 +8,23 @@ endif
PREINSTALL_DIRS =
DISTCLEANFILES += $(PREINSTALL_DIRS)
+all-local: $(TMPINSTALL_FILES)
+
+TMPINSTALL_FILES =
+CLEANFILES = $(TMPINSTALL_FILES)
+
all-am: $(PREINSTALL_FILES)
PREINSTALL_FILES =
-CLEANFILES = $(PREINSTALL_FILES)
+CLEANFILES += $(PREINSTALL_FILES)
$(PROJECT_LIB)/$(dirstamp):
- @$(mkdir_p) $(PROJECT_LIB)
+ @$(MKDIR_P) $(PROJECT_LIB)
@: > $(PROJECT_LIB)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
$(PROJECT_INCLUDE)/$(dirstamp):
- @$(mkdir_p) $(PROJECT_INCLUDE)
+ @$(MKDIR_P) $(PROJECT_INCLUDE)
@: > $(PROJECT_INCLUDE)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
@@ -31,49 +36,48 @@ $(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
-$(PROJECT_INCLUDE)/bsp/opbintctrl.h: include/opbintctrl.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/opbintctrl.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/opbintctrl.h
-
-$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
-
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../powerpc/shared/vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
-
-$(PROJECT_INCLUDE)/xiltemac.h: network/xiltemac.h $(PROJECT_INCLUDE)/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/xiltemac.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/xiltemac.h
+$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
$(PROJECT_INCLUDE)/xparameters_dflt.h: include/xparameters_dflt.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/xparameters_dflt.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/xparameters_dflt.h
-$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
+$(PROJECT_INCLUDE)/xiltemac.h: network/xiltemac.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/xiltemac.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/xiltemac.h
$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
-$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
-
$(PROJECT_INCLUDE)/bsp/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
+
+$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
+TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
+
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
-$(PROJECT_LIB)/linkcmds.dl: startup/linkcmds.dl $(PROJECT_LIB)/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.dl
-PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.dl
+$(PROJECT_INCLUDE)/bsp/opbintctrl.h: include/opbintctrl.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/opbintctrl.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/opbintctrl.h
+
+$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
+
+$(PROJECT_INCLUDE)/bsp/vectors.h: ../../powerpc/shared/vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
diff --git a/c/src/lib/libbsp/powerpc/virtex/startup/linkcmds b/c/src/lib/libbsp/powerpc/virtex/startup/linkcmds
index 0e39bf66b7..898fd6b083 100644
--- a/c/src/lib/libbsp/powerpc/virtex/startup/linkcmds
+++ b/c/src/lib/libbsp/powerpc/virtex/startup/linkcmds
@@ -1,4 +1,4 @@
-/* Greg modifications
+/*
* This file contains directives for the GNU linker which are specific
* to the virtex
* This file is intended to be used together with dlentry.s
@@ -46,98 +46,227 @@ SECTIONS
*(set_domain_*);
*(set_pseudo_*);
- *(.eh_frame)
- *(.gnu.linkonce.r*)
- *(.descriptors)
- *(rom_ver)
- etext = ALIGN(0x10);
- _etext = .;
+ /* C++ constructors/destructors */
+ *(.gnu.linkonce.t*)
- *(.gnu.linkonce.t*)
+ /* Initialization and finalization code.
+ *
+ * Various files can provide initialization and finalization functions.
+ * The bodies of these functions are in .init and .fini sections. We
+ * accumulate the bodies here, and prepend function prologues from
+ * ecrti.o and function epilogues from ecrtn.o. ecrti.o must be linked
+ * first; ecrtn.o must be linked last. Because these are wildcards, it
+ * doesn't matter if the user does not actually link against ecrti.o and
+ * ecrtn.o; the linker won't look for a file to match a wildcard. The
+ * wildcard also means that it doesn't matter which directory ecrti.o
+ * and ecrtn.o are in.
+ */
+ PROVIDE (_init = .);
+ *ecrti.o(.init)
+ *(.init)
+ *ecrtn.o(.init)
+
+ PROVIDE (_fini = .);
+ *ecrti.o(.fini)
+ *(.fini)
+ *ecrtn.o(.init)
- __CTOR_LIST__ = .;
- LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
- *(.ctors)
- LONG(0)
- __CTOR_END__ = .;
+ /*
+ * C++ constructors and destructors for static objects.
+ * PowerPC EABI does not use crtstuff yet, so we build "old-style"
+ * constructor and destructor lists that begin with the list lenght
+ * end terminate with a NULL entry.
+ */
+
+ PROVIDE (__CTOR_LIST__ = .);
+ *crtbegin.o(.ctors)
+ *(.ctors)
+ *crtend.o(.ctors)
+ LONG(0)
+ PROVIDE (__CTOR_END__ = .);
+
+ PROVIDE (__DTOR_LIST__ = .);
+ *crtbegin.o(.dtors)
+ *(.dtors)
+ *crtend.o(.dtors)
+ LONG(0)
+ PROVIDE (__DTOR_END__ = .);
+
+ /* Exception frame info */
+ *(.eh_frame)
+ /* Miscellaneous read-only data */
+ _rodata_start = . ;
+ *(.gnu.linkonce.r*)
+ *(.lit)
+ *(.shdata)
+ *(.rodata)
+ *(.rodata1)
+ *(.descriptors)
+ *(rom_ver)
+ _erodata = .;
- __DTOR_LIST__ = .;
- LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
- *(.dtors)
- LONG(0)
- __DTOR_END__ = .;
+ PROVIDE (__EXCEPT_START__ = .);
+ *(.gcc_except_table)
+ PROVIDE (__EXCEPT_END__ = .);
+ __GOT_START__ = .;
+ s.got = .;
+ *(.got.plt)
+ *(.got)
+ *(.got1)
+ PROVIDE (__GOT2_START__ = .);
+ PROVIDE (_GOT2_START_ = .);
+ *(.got2)
+ PROVIDE (__GOT2_END__ = .);
+ PROVIDE (_GOT2_END_ = .);
+
+ PROVIDE (__FIXUP_START__ = .);
+ PROVIDE (_FIXUP_START_ = .);
+ *(.fixup)
+ PROVIDE (_FIXUP_END_ = .);
+ PROVIDE (__FIXUP_END__ = .);
+
+
+ /* Various possible names for the end of the .text section */
+ etext = ALIGN(0x10);
+ _etext = .;
*(.lit)
*(.shdata)
- _init = .; __init = .; *(.init)
- _fini = .; __fini = .; *(.fini)
_endtext = ALIGN(0x10);
text.end = .;
- } > RAM
+ text.size = text.end - text.start;
+ } >RAM
text.size = text.end - text.start;
- /* R/W Data */
- .data :
- {
- *(.data)
- *(.data1)
- *(.data.* .gnu.linkonce.d*)
- PROVIDE (__SDATA_START__ = .);
- *(.sdata*)
- *(.gnu.linkonce.s.*)
- } > RAM
-
- PROVIDE (__EXCEPT_START__ = .);
- .gcc_except_table :
- {
- *(.gcc_except_table)
- } >RAM
- PROVIDE (__EXCEPT_END__ = .);
+ .jcr : { KEEP (*(.jcr)) } >RAM
- __GOT_START__ = .;
- .got :
- {
- s.got = .;
- *(.got.plt) *(.got)
- } > RAM
- __GOT_END__ = .;
+ .rel.dyn : {
+ *(.rel.init)
+ *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
+ *(.rel.fini)
+ *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
+ *(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*)
+ *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
+ *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
+ *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
+ *(.rel.ctors)
+ *(.rel.dtors)
+ *(.rel.got)
+ *(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*)
+ *(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*)
+ *(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*)
+ *(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*)
+ *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
+ } >RAM
+ .rela.dyn : {
+ *(.rela.init)
+ *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+ *(.rela.fini)
+ *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+ *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+ *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
+ *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
+ *(.rela.ctors)
+ *(.rela.dtors)
+ *(.rela.got)
+ *(.rela.got1)
+ *(.rela.got2)
+ *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
+ *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
+ *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
+ *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
+ *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+ } >RAM
- .got1 :
- {
- *(.got1)
- } >RAM
+ PROVIDE (__SDATA2_START__ = .);
+ .sdata2 : { *(.sdata2) *(.gnu.linkonce.s2.*) } >RAM
+ .sbss2 : { *(.sbss2) *(.gnu.linkonce.sb2.*) } >RAM
+ PROVIDE (__SBSS2_END__ = .);
+
+ .sbss2 : { *(.sbss2) } >RAM
+ PROVIDE (__SBSS2_END__ = .);
+
+ /* R/W Data */
+ .data ( . ) :
+ {
+ . = ALIGN (4);
- PROVIDE (__GOT2_START__ = .);
- PROVIDE (_GOT2_START_ = .);
- .got2 :
- {
- *(.got2)
- } >RAM
- PROVIDE (__GOT2_END__ = .);
- PROVIDE (_GOT2_END_ = .);
+ data.start = .;
- PROVIDE (__FIXUP_START__ = .);
- PROVIDE (_FIXUP_START_ = .);
- .fixup : { *(.fixup) } >RAM
- PROVIDE (_FIXUP_END_ = .);
- PROVIDE (__FIXUP_END__ = .);
+ *(.data)
+ *(.data1)
+ *(.data.* .gnu.linkonce.d.*)
+ PROVIDE (__SDATA_START__ = .);
+ *(.sdata*)
+ *(.gnu.linkonce.s.*)
+ data.end = .;
+ data.size = data.end - data.start;
+ } >RAM
- PROVIDE (__SDATA2_START__ = .);
- .sdata2 : { *(.sdata2) *(.gnu.linkonce.s2.*) } >RAM
- .sbss2 : { *(.sbss2) *(.gnu.linkonce.sb2.*) } >RAM
- PROVIDE (__SBSS2_END__ = .);
+ __SBSS_START__ = .;
+ .bss :
+ {
+ bss.start = .;
+ *(.bss .bss* .gnu.linkonce.b*)
+ *(.sbss*) *(COMMON)
+ . = ALIGN(4);
+ bss.end = .;
+ } >RAM
+ __SBSS_END__ = .;
- __SBSS_START__ = .;
- .bss :
- {
- bss.start = .;
- *(.bss .bss* .gnu.linkonce.b*)
- *(.sbss*) *(COMMON)
- bss.end = ALIGN(4);
- bss.size = bss.end - bss.start;
- } > RAM
- __SBSS_END__ = .;
+ __SBSS_START__ = .;
+ .bss :
+ {
+ bss.start = .;
+ *(.bss .bss* .gnu.linkonce.b*)
+ *(.sbss*) *(COMMON)
+ . = ALIGN(4);
+ bss.end = .;
+ bss.size = bss.end - bss.start;
+ } >RAM
+ __SBSS_END__ = .;
+
+ PROVIDE(_bss_start = ADDR(.bss));
+ PROVIDE(_bss_size = SIZEOF(.bss));
+ PROVIDE(bss.size = SIZEOF(.bss));
+ PROVIDE(_data_start = ADDR(.data));
+ PROVIDE(_data_size = SIZEOF(.data));
+ PROVIDE(_text_start = ADDR(.text));
+ PROVIDE(_text_size = SIZEOF(.text));
+ PROVIDE(_end = data.end);
+
+ .gzipmalloc : {
+ . = ALIGN (16);
+ _startmalloc = .;
+ } >RAM
+
+
+ /*
+ * Interrupt stack setup
+ */
+ IntrStack_start = ALIGN(0x10);
+ . += 0x4000;
+ intrStack = .;
+ PROVIDE(intrStackPtr = intrStack);
+
+ /* Sections for compressed .text and .data */
+ /* after the .datarom section is an int specifying */
+ /* the length of the following compressed image */
+ /* Executes once then could get overwritten */
+ .textrom 0x100000 :
+ {
+ *(.textrom)
+ _endloader = .;
+ } >RAM
+
+ .datarom :
+ {
+ _dr_start = .;
+ *(.datarom)
+ _dr_end = .;
+ } >RAM
+ dr_len = _dr_end - _dr_start;
/* align bottom of 32k init stack at a 32k boundary */
. = . + 0x4000;
@@ -155,15 +284,14 @@ SECTIONS
PROVIDE(_end = intrStack);
- .line 0 : { *(.line) }
- .debug 0 : { *(.debug) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_aregion 0 : { *(.debug_aregion) }
- .debug_macinfo 0 : { *(.debug_macinfo) }
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
-
+ .line 0 : { *(.line) }
+ .debug 0 : { *(.debug) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_aregion 0 : { *(.debug_aregion) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
}
diff --git a/c/src/lib/libbsp/powerpc/virtex/startup/linkcmds.dl b/c/src/lib/libbsp/powerpc/virtex/startup/linkcmds.dl
deleted file mode 100644
index 30dd38e63d..0000000000
--- a/c/src/lib/libbsp/powerpc/virtex/startup/linkcmds.dl
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * This file contains directives for the GNU linker which are specific
- * to the helas403
- * This file is intended to be used together with dlentry.s
- * it will generate downloadable code
- *
- * $Id$
- */
-
-OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
- "elf32-powerpc")
-OUTPUT_ARCH(powerpc)
-
-ENTRY(download_entry)
-
-MEMORY
- {
- RAM : ORIGIN = 0, LENGTH = 8M
- FLASH : ORIGIN = 0xFFF00000, LENGTH = 512K
- }
-
-SECTIONS
-{
- .vectors : 0x00010100
- {
- *(.vectors)
- } > RAM
-
- .text :
- {
- text.start = . ;
- *(.entry)
- *(.entry2)
- *(.text*)
- *(.rodata)
- *(.rodata1)
-
- /*
- * Special FreeBSD sysctl sections.
- */
- . = ALIGN (16);
- __start_set_sysctl_set = .;
- *(set_sysctl_*);
- __stop_set_sysctl_set = ABSOLUTE(.);
- *(set_domain_*);
- *(set_pseudo_*);
-
- *.(eh_frame)
- *(.descriptors)
- *(rom_ver)
- etext = ALIGN(0x10);
- _etext = .;
-
-
- __CTOR_LIST__ = .;
- LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
- *(.ctors)
- LONG(0)
- __CTOR_END__ = .;
-
- __DTOR_LIST__ = .;
- LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
- *(.dtors)
- LONG(0)
- __DTOR_END__ = .;
-
- *(.lit)
- *(.shdata)
- *(.init)
- *(.fini)
- _endtext = ALIGN(0x10);
- text.end = .;
- } > RAM
-
- text.size = text.end - text.start;
-
- /* R/W Data */
- .data :
- {
- *(.data)
- *(.data1)
- PROVIDE (__SDATA_START__ = .);
- *(.sdata*)
- } > RAM
-
- PROVIDE (__EXCEPT_START__ = .);
- .gcc_except_table :
- {
- *(.gcc_except_table)
- } >RAM
- PROVIDE (__EXCEPT_END__ = .);
-
- __GOT_START__ = .;
- .got :
- {
- s.got = .;
- *(.got.plt) *(.got)
- } > RAM
- __GOT_END__ = .;
-
- .got1 :
- {
- *(.got1)
- } >RAM
-
- PROVIDE (__GOT2_START__ = .);
- PROVIDE (_GOT2_START_ = .);
- .got2 :
- {
- *(.got2)
- } >RAM
- PROVIDE (__GOT2_END__ = .);
- PROVIDE (_GOT2_END_ = .);
-
- PROVIDE (__FIXUP_START__ = .);
- PROVIDE (_FIXUP_START_ = .);
- .fixup : { *(.fixup) } >RAM
- PROVIDE (_FIXUP_END_ = .);
- PROVIDE (__FIXUP_END__ = .);
-
- PROVIDE (__SDATA2_START__ = .);
- .sdata2 : { *(.sdata2) } >RAM
- .sbss2 : { *(.sbss2) } >RAM
- PROVIDE (__SBSS2_END__ = .);
-
- .sbss2 : { *(.sbss2) } >RAM
- PROVIDE (__SBSS2_END__ = .);
-
- __SBSS_START__ = .;
- .bss :
- {
- bss.start = .;
- *(.bss .bss* .gnu.linkonce.b*)
- *(.sbss*) *(COMMON)
- bss.end = ALIGN(4);
- } > RAM
- __SBSS_END__ = .;
-
- bss.size = bss.end - bss.start;
- PROVIDE(_end = bss.end);
-
- .line 0 : { *(.line) }
- .debug 0 : { *(.debug) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_aregion 0 : { *(.debug_aregion) }
- .debug_macinfo 0 : { *(.debug_macinfo) }
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
-}
-
-
diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog
index e38cf3a1a2..5b86f506ed 100644
--- a/c/src/lib/libcpu/powerpc/ChangeLog
+++ b/c/src/lib/libcpu/powerpc/ChangeLog
@@ -1,3 +1,9 @@
+2007-07-09 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
+
+ * configure.ac, Makefile.am, mpc83xx/include/mpc83xx.h,
+ * mpc83xx/network/tsec.c, mpc83xx/network/tsec.h :
+ added support for MPC83xx controllers
+
2007-07-05 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* configure.ac, Makefile.am:
diff --git a/c/src/lib/libcpu/powerpc/Makefile.am b/c/src/lib/libcpu/powerpc/Makefile.am
index 5a230bf54f..388a8aae86 100644
--- a/c/src/lib/libcpu/powerpc/Makefile.am
+++ b/c/src/lib/libcpu/powerpc/Makefile.am
@@ -324,5 +324,17 @@ mpc8260_timer_rel_CPPFLAGS = $(AM_CPPFLAGS)
mpc8260_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
endif
+if mpc83xx
+include_mpc83xxdir = $(includedir)/mpc83xx
+include_mpc83xx_HEADERS = mpc83xx/include/mpc83xx.h
+include_mpc83xx_HEADERS += mpc83xx/network/tsec.h
+## mpc83xx/network
+noinst_PROGRAMS += mpc83xx/tsec.rel
+mpc83xx_tsec_rel_SOURCES = mpc83xx/network/tsec.c
+mpc83xx_tsec_rel_CPPFLAGS = $(AM_CPPFLAGS)
+mpc83xx_tsec_rel_CPPFLAGS += -D__INSIDE_RTEMS_BSD_TCPIP_STACK__ -D__BSD_VISIBLE
+mpc83xx_tsec_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+endif
+
include $(srcdir)/preinstall.am
include $(top_srcdir)/../../../automake/local.am
diff --git a/c/src/lib/libcpu/powerpc/configure.ac b/c/src/lib/libcpu/powerpc/configure.ac
index e7e8efcc05..b202ed7c4e 100644
--- a/c/src/lib/libcpu/powerpc/configure.ac
+++ b/c/src/lib/libcpu/powerpc/configure.ac
@@ -45,12 +45,13 @@ AM_CONDITIONAL(shared, \
|| test "$RTEMS_CPU_MODEL" = "ppc405" \
|| test "$RTEMS_CPU_MODEL" = "mpc604" \
|| test "$RTEMS_CPU_MODEL" = "mpc6xx" \
+|| test "$RTEMS_CPU_MODEL" = "mpc8xx" \
|| test "$RTEMS_CPU_MODEL" = "mpc821" \
|| test "$RTEMS_CPU_MODEL" = "mpc860" \
|| test "$RTEMS_CPU_MODEL" = "mpc8240" \
|| test "$RTEMS_CPU_MODEL" = "mpc8245" \
|| test "$RTEMS_CPU_MODEL" = "mpc8260" \
-|| test "$RTEMS_CPU_MODEL" = "mpc8xx" )
+|| test "$RTEMS_CPU_MODEL" = "mpc83xx" )
## test on CPU type
AM_CONDITIONAL(mpc505, test "$RTEMS_CPU_MODEL" = "mpc505")
@@ -63,11 +64,13 @@ AM_CONDITIONAL(mpc6xx, test "$RTEMS_CPU_MODEL" = "mpc6xx" \
|| test "$RTEMS_CPU_MODEL" = "mpc7457" \
|| test "$RTEMS_CPU_MODEL" = "mpc750" \
|| test "$RTEMS_CPU_MODEL" = "mpc8240" \
-|| test "$RTEMS_CPU_MODEL" = "mpc8245" )
+|| test "$RTEMS_CPU_MODEL" = "mpc8245" \
+|| test "$RTEMS_CPU_MODEL" = "mpc83xx" )
AM_CONDITIONAL(mpc8xx, test "$RTEMS_CPU_MODEL" = "mpc8xx" \
|| test "$RTEMS_CPU_MODEL" = "mpc821" \
|| test "$RTEMS_CPU_MODEL" = "mpc860" )
AM_CONDITIONAL(mpc8260, test "$RTEMS_CPU_MODEL" = "mpc8260")
+AM_CONDITIONAL(mpc83xx, test "$RTEMS_CPU_MODEL" = "mpc83xx")
# the ppc405 shares files with the ppc403
AM_CONDITIONAL(ppc403,[test "$RTEMS_CPU_MODEL" = "ppc403" \
diff --git a/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h b/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h
new file mode 100644
index 0000000000..d2576060c3
--- /dev/null
+++ b/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h
@@ -0,0 +1,1128 @@
+#ifndef _MPC83XX_MPC83XX_H
+#define _MPC83XX_MPC83XX_H
+
+#if defined(MPC8343)
+#define M83xx_HAS_PCI TRUE
+#define M83xx_HAS_USB1 TRUE
+#elif defined(MPC8347)
+#define M83xx_HAS_PCI TRUE
+#define M83xx_HAS_USB1 TRUE
+#define M83xx_HAS_USB2 TRUE
+#elif defined(MPC8349)
+#define M83xx_HAS_PCI TRUE
+#define M83xx_HAS_WIDE_PCI TRUE
+#define M83xx_HAS_USB1 TRUE
+#define M83xx_HAS_USB2 TRUE
+#elif defined(MPC8360)
+#define M83xx_HAS_PCI TRUE
+#define M83xx_HAS_QE TRUE
+#else
+#error "add feature list in mpc83xx_regs.h"
+#endif
+
+/*
+ * number of TSECs available
+ */
+#define M83xx_TSEC_NIFACES 2
+
+#if !defined(ASM)
+
+#include <rtems.h>
+
+/* Offset Register Access Reset Section/Page */
+/* System Configuration Registers */
+typedef struct m83xxSysConRegisters_ {
+ volatile uint32_t immrbar; /* 0x0_00000 Internal memory map base address register R/W 0xFF40_0000 5.2.4.1/5-5 */
+ uint8_t reserved0_0004[0x00008-0x00004];/* 0x0_0004 Reserved, should be cleared */
+ volatile uint32_t altcbar; /* 0x0_0008 Alternate configuration base address register R/W 0x0000_0000 5.2.4.2/5-7 */
+ uint8_t reserved0_000C[0x00020-0x0000C];/* 0x0_000C--0x0_001C Reserved, should be cleared */
+ volatile uint32_t lblawbar0; /* 0x0_0020 LBC local access window 0 base address register R/W 0x0000_00001 5.2.4.3/5-7 */
+ volatile uint32_t lblawar0; /* 0x0_0024 LBC local access window 0 attribute register R/W 0x0000_00002 5.2.4.4/5-8 */
+ volatile uint32_t lblawbar1; /* 0x0_0028 LBC local access window 1 base address register R/W 0x0000_0000 5.2.4.3/5-7 */
+ volatile uint32_t lblawar1; /* 0x0_002C LBC local access window 1 attribute register R/W 0x0000_0000 5.2.4.4/5-8 */
+ volatile uint32_t lblawbar2; /* 0x0_0030 LBC local access window 2 base address register R/W 0x0000_0000 5.2.4.3/5-7 */
+ volatile uint32_t lblawar2; /* 0x0_0034 LBC local access window 2 attribute register R/W 0x0000_0000 5.2.4.4/5-8 */
+ volatile uint32_t lblawbar3; /* 0x0_0038 LBC local access window 3 base address register R/W 0x0000_0000 5.2.4.3/5-7 */
+ volatile uint32_t lblawar3; /* 0x0_003C LBC local access window 3 attribute register R/W 0x0000_0000 5.2.4.4/5-8 */
+ uint8_t reserved0_0040[0x00060-0x00040];/* 0x0_0040--0x0_005C Reserved, should be cleared */
+ volatile uint32_t pcilawbar0; /* 0x0_0060 PCI local access window0 base address register R/W 0x0000_00003 5.2.4.5/5-9 */
+ volatile uint32_t pcilawar0; /* 0x0_0064 PCI local access window0 attribute register R/W 0x0000_00004 5.2.4.6/5-10 */
+ volatile uint32_t pcilawbar1; /* 0x0_0068 PCI local access window1 base address register R/W 0x0000_0000 5.2.4.5/5-9 */
+ volatile uint32_t pcilawar1; /* 0x0_006C PCI local access window1 attribute register R/W 0x0000_0000 5.2.4.6/5-10 */
+ uint8_t reserved0_0070[0x000A0-0x00070];/* 0x0_0070--0x0_009C Reserved, should be cleared */
+ volatile uint32_t ddrlawbar0; /* 0x0_00A0 DDR local access window0 base address register R/W 0x0000_00005 5.2.4.7/5-12 */
+ volatile uint32_t ddrlawar0; /* 0x0_00A4 DDR local access window0 attribute register R/W 0x0000_00006 5.2.4.8/5-13 */
+ volatile uint32_t ddrlawbar1; /* 0x0_00A8 DDR local access window1 base address register R/W 0x0000_0000 5.2.4.7/5-12 */
+ volatile uint32_t ddrlawar1; /* 0x0_00AC DDR local access window1 attribute register R/W 0x0000_0000 5.2.4.8/5-13 */
+ uint8_t reserved0_00B0[0x00100-0x000B0];/* 0x0_00B0--0x0_0100 Reserved, should be cleared */
+ volatile uint32_t sgprl; /* 0x0_0100 general purpose register low (SGPRL) R/W 0x0000_0000 5.3.2.1/5-17 */
+ volatile uint32_t sgprh; /* 0x0_0104 general purpose register high (SGPRH) R/W 0x0000_0000 5.3.2.2/5-17 */
+ volatile uint32_t spridr; /* 0x0_0108 part and revision ID register (SPRIDR) R 0x0000_0000 5.3.2.3/5-18 */
+ uint8_t reserved0_010C[0x00110-0x0010C];/* 0x0_010C--0x0_0110 Reserved, should be cleared */
+ volatile uint32_t spcr; /* 0x0_0110 priority configuration register (SPCR) R/W 0x0000_0000 5.3.2.4/5-19 */
+ volatile uint32_t sicrl; /* 0x0_0114 I/O configuration register low (SICRL) R/W 0x0000_0000 5.3.2.5/5-21 */
+ volatile uint32_t sicrh; /* 0x0_0118 I/O configuration register high (SICRH) R/W 0x0000_00007 5.3.2.6/5-24 */
+ uint8_t reserved0_011C[0x00128-0x0011C];/* 0x0_011C--0x0_0128 Reserved */
+ volatile uint32_t ddrcdr; /* 0x0_0128 control driver register (DDRCDR) R/W 0x0004_0000 5.3.2.8/5-28 */
+ volatile uint32_t ddrdsr; /* 0x0_012C debug status register (DDRDSR) R 0x3300_0000 5.3.2.9/5-30 */
+ uint8_t reserved0_0130[0x00200-0x00130];/* 0x0_0130--0x0_01FC Reserved */
+} m83xxSysConRegisters_t;
+#define M83xx_SYSCON_SPCR_TBEN (1 << (31-9))
+
+/* Watchdog Timer (WDT) Registers */
+typedef struct m83xxWDTRegisters_ {
+ uint8_t reserved0_0200[0x00204-0x00200];/* 0x0_0200 Reserved, should be cleared */
+ volatile uint32_t swcrr; /* 0x0_0204 System watchdog control register R/W 0x0000_0007 5.4.4.1/5-33 */
+ volatile uint32_t swcnr; /* 0x0_0208 System watchdog count register R 0x0000_FFFF 5.4.4.2/5-34 */
+ uint8_t reserved0_020C[(0x0020E)-0x0020C];/* 0x0_020C Reserved, should be cleared */
+ volatile uint16_t swsrr; /* 0x0_020E System watchdog service register R/W 0x0000_0000 5.4.4.3/5-34 */
+} m83xxWDTRegisters_t;
+
+/* Real Time Clock Module Registers (RTC) */
+typedef struct m83xxRTCRegisters_ {
+ volatile uint32_t rtcnr; /* 0x0_0300 Real time counter control register R/W 0x0000_0000 5.5.5.1/5-40 */
+ volatile uint32_t rtldr; /* 0x0_0304 Real time counter load register R/W 0x0000_0000 5.5.5.2/5-41 */
+ volatile uint32_t rtpsr; /* 0x0_0308 Real time counter prescale register R/W 0x0000_0000 5.5.5.3/5-41 */
+ volatile uint32_t rtctr; /* 0x0_030C Real time counter register R 0x0000_0000 5.5.5.4/5-42 */
+ volatile uint32_t rtevr; /* 0x0_0310 Real time counter event register R/W 0x0000_0000 5.5.5.5/5-42 */
+ volatile uint32_t rtalr; /* 0x0_0314 Real time counter alarm register R/W 0xFFFF_FFFF 5.5.5.6/5-43 */
+ uint8_t reserved0_0314[0x00320-0x00318];/* 0x0_0318--0x0_031F Reserved; should be cleared */
+} m83xxRTCRegisters_t;
+
+ /* Periodic Interval Timer (PIT) Registers */
+typedef struct m83xxPITRegisters_ {
+ volatile uint32_t ptcnr; /* 0x0_0400 Periodic interval timer control register R/W 0x0000_0000 5.6.5.1/5-47 */
+ volatile uint32_t ptldr; /* 0x0_0404 Periodic interval timer load register R/W 0x0000_0000 5.6.5.2/5-48 */
+ volatile uint32_t ptpsr; /* 0x0_0408 Periodic interval timer prescale register R/W 0x0000_0000 5.6.5.3/5-49 */
+ volatile uint32_t ptctr; /* 0x0_040C Periodic interval timer counter register R 0x0000_0000 5.6.5.4/5-49 */
+ volatile uint32_t ptevr; /* 0x0_0410 Periodic interval timer event register R/W 0x0000_0000 5.6.5.5/5-50 */
+ uint8_t reserved0_0414[0x00500-0x00414]; /* 0x0_0414--0x0_041F Reserved, should be cleared */
+} m83xxPITRegisters_t;
+
+ /* Global Timers Module 1/2 */
+#define M83xxGTIdx(n) (n&3)
+#define M83xxGTLowIdx(n) (n&1)
+#define M83xxGTHighIdx(n) (((n)>>1)&1)
+#define M83xxGTModIdx(n) (((n)>>2)&1)
+
+#define M83xxGTIdxCnt (4)
+#define M83xxGTLowCnt (2)
+#define M83xxGTHighCnt (2)
+#define M83xxGTModCnt (2)
+
+typedef struct m83xxGTMRegisters_ {
+ struct {
+ volatile uint8_t reg; /* 0x0_0500 Timer 1+2/3+4 global timers configuration register R/W 0x00 5.7.5.1/5-57 */
+ uint8_t reserved0_0501[0x00504-0x00501]; /* 0x0_0501--0x0_0503 Reserved, should be cleared */
+ } gtcfr[M83xxGTHighCnt];
+ uint8_t reserved0_0508[0x00510-0x00508]; /* 0x0_0508--0x0_050f Reserved, should be cleared */
+ struct {
+ volatile uint16_t gtmdr[M83xxGTLowCnt]; /* 0x0_0510 Timer 1/2 global timers mode register R/W 0x0000 5.7.5.2/5-60 */
+ volatile uint16_t gtrfr[M83xxGTLowCnt]; /* 0x0_0514 Timer 1/2 global timers reference register R/W 0x0000 5.7.5.3/5-62 */
+ volatile uint16_t gtcpr[M83xxGTLowCnt]; /* 0x0_0518 Timer 1/2 global timers capture register R/W 0x0000 5.7.5.4/5-62 */
+ volatile uint16_t gtcnr[M83xxGTLowCnt]; /* 0x0_051C Timer 1/2 global timers counter register R/W 0x0000 5.7.5.5/5-63 */
+ } gt_tim_regs[M83xxGTHighCnt];
+ volatile uint16_t gtevr[M83xxGTIdxCnt]; /* 0x0_0530 Timer 1-4 global timers event register Special 0x0000 5.7.5.6/5-63 */
+ volatile uint16_t gtpsr[M83xxGTIdxCnt]; /* 0x0_0538 Timer 1-4 global timers prescale register R/W 0x0003 5.7.5.7/5-64 */
+ uint8_t reserved0_0540[0x00600-0x00540]; /* 0x0_0540--0x0_05fc Reserved */
+} m83xxGTMRegisters_t;
+
+ /* Integrated Programmable Interrupt Controller (IPIC) */
+typedef struct m83xxIPICRegisters_ {
+ volatile uint32_t sicfr; /* 0x0_0700 System global interrupt configuration register R/W 0x0000_0000 8.5.1/8-8 */
+ volatile uint32_t sivcr; /* 0x0_0704 System global interrupt vector register R 0x0000_0000 8.5.2/8-9 */
+ volatile uint32_t sipnr[2]; /* 0x0_0708 System internal interrupt pending register H/L R 0x0000_0000 8.5.3/8-11 */
+ volatile uint32_t siprr[4]; /* 0x0_0710 System internal interrupt group A-D priority register R/W 0x0530_9770 8.5.4/8-14 */
+ volatile uint32_t simsr[2]; /* 0x0_0720 System internal interrupt mask register H/L R/W 0x0000_0000 8.5.6/8-15 */
+ uint8_t reserved0_0728[0x0072C-0x00728]; /* 0x0_072C--0x0_0728 Reserved, should be cleared */
+ volatile uint32_t sepnr; /* 0x0_072C System external interrupt pending register R/W Special 8.5.8/8-18 */
+ volatile uint32_t smprr[2]; /* 0x0_0730 System mixed interrupt group A/B priority register R/W 0x0530_9770 8.5.9/8-18 */
+ volatile uint32_t semsr; /* 0x0_0738 System external interrupt mask register R/W 0x0000_0000 8.5.11/8-20 */
+ volatile uint32_t secnr; /* 0x0_073C System external interrupt control register R/W 0x0000_0000 8.5.12/8-21 */
+ volatile uint32_t sersr; /* 0x0_0740 System error status register R/W 0x0000_0000 8.5.13/8-22 */
+ volatile uint32_t sermr; /* 0x0_0744 System error mask register R/W $ 8.5.14/8-23 */
+ volatile uint32_t sercr; /* 0x0_0748 System error control register R/W 0x0000_0000 8.5.15/8-24 */
+ uint8_t reserved0_074C[0x00750-0x0074C]; /* 0x0_074C--0x0_074F Reserved, should be cleared */
+ volatile uint32_t sifcr[2]; /* 0x0_0750 System internal interrupt force register H/L R/W 0x0000_0000 8.5.16/8-25 */
+ volatile uint32_t sefcr; /* 0x0_0758 System external interrupt force register R/W 0x0000_0000 8.5.17/8-26 */
+ volatile uint32_t serfr; /* 0x0_075C System error force register R/W 0x0000_0000 8.5.18/8-26 */
+ volatile uint32_t scvcr; /* 0x0_0760 System critical interrupt vector register R 0x0000_0000 8.5.19/8-27 */
+ volatile uint32_t smvcr; /* 0x0_0764 System management interrupt vector register R 0x0000_0000 8.5.20/8-27 */
+ uint8_t reserved0_0760[0x00800-0x00768]; /* 0x0_0768--0x0_07FF Reserved, should be cleared */
+} m83xxIPICRegisters_t;
+
+/* get vector number from vector register content */
+#define MPC83xx_VCR_TO_VEC(regval) ((regval) & 0x7f)
+
+
+ /* System Arbiter Registers */
+typedef struct m83xxARBRegisters_ {
+ volatile uint32_t acr; /* 0x0_0800 Arbiter configuration register R/W 0x0000_0000 6.2.1/6-2 */
+ volatile uint32_t atr; /* 0x0_0804 Arbiter timers register R/W 0x00FF_00FF 6.2.2/6-4 */
+ uint8_t reserved0_0808[0x0080C-0x00808]; /* 0x0_0808 Reserved, should be cleared R 0x0000_0000 */
+ volatile uint32_t aer; /* 0x0_080C Arbiter event register R/W 0x0000_0000 6.2.3/6-5 */
+ volatile uint32_t aidr; /* 0x0_0810 Arbiter interrupt definition register R/W 0x0000_0000 6.2.4/6-6 */
+ volatile uint32_t amr; /* 0x0_0814 Arbiter mask register R/W 0x0000_0000 6.2.5/6-7 */
+ volatile uint32_t aeatr; /* 0x0_0818 Arbiter event attributes register R 0x0000_0000 6.2.6/6-7 */
+ volatile uint32_t aeadr; /* 0x0_081C Arbiter event address register R 0x0000_0000 6.2.7/6-9 */
+ volatile uint32_t aerr; /* 0x0_0820 Arbiter event response register R/W 0x0000_0000 6.2.8/6-10 */
+ uint8_t reserved0_0824[0x00900-0x00824]; /* 0x0_0824--0x0_08FF Reserved, should be cleared */
+} m83xxARBRegisters_t;
+
+ /* Reset Module */
+typedef struct m83xxRESRegisters_ {
+ volatile uint32_t rcwlr; /* 0x0_0900 Reset configuration word low register R 0x0000_0000 4.5.1.1/4-32 */
+ volatile uint32_t rcwhr; /* 0x0_0904 Reset configuration word high register R 0x0000_0000 4.5.1.2/4-32 */
+ uint8_t reserved0_0908[0x00910-0x00908]; /* 0x0_0908--0x0_090C Reserved, should be cleared */
+ volatile uint32_t rsr; /* 0x0_0910 Reset status register R/W 0x0000_0000 4.5.1.3/4-33 */
+ volatile uint32_t rmr; /* 0x0_0914 Reset mode register R/W 0x0000_0000 4.5.1.4/4-34 */
+ volatile uint32_t rpr; /* 0x0_0918 Reset protection register R/W 0x0000_0000 4.5.1.5/4-35 */
+ volatile uint32_t rcr; /* 0x0_091C Reset control register R/W 0x0000_0000 4.5.1.6/4-36 */
+ volatile uint32_t rcer; /* 0x0_0920 Reset control enable register R/W 0x0000_0000 4.5.1.7/4-36 */
+ uint8_t reserved0_0924[0x00A00-0x00924]; /* 0x0_0924--0x0_09FC Reserved, should be cleared */
+} m83xxRESRegisters_t;
+
+ /* Clock Module */
+typedef struct m83xxCLKRegisters_ {
+ volatile uint32_t spmr; /* 0x0_0A00 System PLL mode register R 0x0000_0000 4.5.2.1/4-37 */
+ volatile uint32_t occr; /* 0x0_0A04 Output clock control register R/W 0x0000_0000 4.5.2.2/4-38 */
+ volatile uint32_t sccr; /* 0x0_0A08 System clock control register R/W 0xFFFF_FFFF 4.5.2.3/4-40 */
+ uint8_t reserved0_0A08[0x00B00-0x00A0C]; /* 0x0_0A0C--0x0_0AFC Reserved, should be cleared */
+} m83xxCLKRegisters_t;
+ /* Power Management Control Module */
+typedef struct m83xxPMCRegisters_ {
+ volatile uint32_t pmccr; /* 0x0_0B00 Power management controller configuration register R/W 0x0000_0000 5.8.3.1/5-69 */
+ volatile uint32_t pmcer; /* 0x0_0B04 Power management controller event register R/W 0x0000_0000 5.8.3.2/5-70 */
+ volatile uint32_t pmcmr; /* 0x0_0B08 Power management controller mask register R/W 0x0000_0000 5.8.3.3/5-71 */
+ uint8_t reserved0_0B10[0x00C00-0x00B0C]; /* 0x0_0B0C--0x0_0BFC Reserved, should be cleared */
+} m83xxPMCRegisters_t;
+ /* GPIO1 Registers */
+typedef struct m83xxGPIORegisters_ {
+ volatile uint32_t gpdir; /* 0x0_0C00 GPIO1/2 direction register R/W 0x0000_0000 21.3.1/21-3 */
+ volatile uint32_t gpdr; /* 0x0_0C04 GPIO1/2 open drain register R/W 0x0000_0000 21.3.2/21-4 */
+ volatile uint32_t gpdat; /* 0x0_0C08 GPIO1/2 data register R/W 0x0000_0000 21.3.3/21-4 */
+ volatile uint32_t gpier; /* 0x0_0C0C GPIO1/2 interrupt event register R/W Undefined 21.3.4/21-5 */
+ volatile uint32_t gpimr; /* 0x0_0C10 GPIO1/2 interrupt mask register R/W 0x0000_0000 21.3.5/21-5 */
+ volatile uint32_t gpicr; /* 0x0_0C14 GPIO1/2 external interrupt control register R/W 0x0000_0000 21.3.6/21-6 */
+ uint8_t reserved0_0C1C[0x00D00-0x00C18]; /* 0x0_0C18--0x0_0CFF Reserved, should be cleared */
+} m83xxGPIORegisters_t;
+
+ /* DLL */
+typedef struct m83xxDLLRegisters_ {
+ uint8_t reserved0_1000[0x01010-0x01000]; /* 0x0_1000--0x0_100F Reserved, should be cleared */
+ volatile uint32_t mckenr; /* 0x0_1010 MCK enable register (MCKENR) R/W 0xFC00_0000 4.5.3/4-41 */
+ uint8_t reserved0_1014[0x01100-0x01014]; /* 0x0_1014--0x0_10FF Reserved, should be cleared */
+ volatile uint32_t reserved0_1100; /* 0x0_1100 Reserved. Reset value should be preserved. R/W 0x0500_0280 */
+ volatile uint32_t reserved0_1104; /* 0x0_1104 Reserved. Reset value should be preserved. R/W 0x8004_0810 */
+ volatile uint32_t dllovr; /* 0x0_1108 DLL override register (DLLOVR) R/W 0x0000_0000 22.4.1/22-4 */
+ volatile uint32_t dllsr; /* 0x0_110C DLL status register (DLLSR) R 0x0000_0000 22.4.2/22-4 */
+ volatile uint32_t dllck; /* 0x0_1110 DLL clock register (DLLCK) R/W 0xFC00_0000 22.4.3/22-5 */
+ uint8_t reserved0_1110[0x01200-0x01114]; /* 0x0_1114--0x0_11FF Reserved, should be cleared */
+} m83xxDLLRegisters_t;
+
+ /* DDR Memory Controller Memory Map */
+typedef struct m83xxDDRRegisters_ {
+ volatile uint32_t cs0_bnds; /* 0x0_2000 Chip select 0 memory bounds R/W 0x0000_0000 9.4.1.1/9-10 */
+ uint8_t reserved0_2004[0x02008-0x02004]; /* 0x0_2004--0x0_2008 Reserved, should be cleared */
+ volatile uint32_t cs1_bnds; /* 0x0_2008 Chip select 1 memory bounds R/W 0x0000_0000 */
+ uint8_t reserved0_200C[0x02010-0x0200C]; /* 0x0_200C--0x0_2010 Reserved, should be cleared */
+ volatile uint32_t cs2_bnds; /* 0x0_2010 Chip select 2 memory bounds R/W 0x0000_0000 */
+ uint8_t reserved0_2014[0x02018-0x02014]; /* 0x0_2014--0x0_2018 Reserved, should be cleared */
+ volatile uint32_t cs3_bnds; /* 0x0_2018 Chip select 3 memory bounds R/W 0x0000_0000 */
+ uint8_t reserved0_201C[0x02080-0x0201C]; /* 0x0_201C--0x0_207F Reserved, should be cleared */
+ volatile uint32_t cs0_config; /* 0x0_2080 Chip select 0 configuration R/W 0x0000_0000 9.4.1.2/9-11 */
+ volatile uint32_t cs1_config; /* 0x0_2084 Chip select 1 configuration R/W 0x0000_0000 */
+ volatile uint32_t cs2_config; /* 0x0_2088 Chip select 2 configuration R/W 0x0000_0000 */
+ volatile uint32_t cs3_config; /* 0x0_208C Chip select 3 configuration R/W 0x0000_0000 */
+ uint8_t reserved0_2090[0x02100-0x02090]; /* 0x0_2090--0x0_2100 Reserved, should be cleared */
+ volatile uint32_t timing_cfg_3; /* 0x0_2100 DDR SDRAM timing configuration 3 R/W 0x0000_0000 9.4.1.3/9-13 */
+ volatile uint32_t timing_cfg_0; /* 0x0_2104 DDR SDRAM timing configuration 0 R/W 0x0011_0105 9.4.1.4/9-14 */
+ volatile uint32_t timing_cfg_1; /* 0x0_2108 DDR SDRAM timing configuration 1 R/W 0x0000_0000 9.4.1.5/9-16 */
+ volatile uint32_t timing_cfg_2; /* 0x0_210C DDR SDRAM timing configuration 2 R/W 0x0000_0000 9.4.1.6/9-18 */
+ volatile uint32_t ddr_sdram_cfg; /* 0x0_2110 DDR SDRAM control configuration R/W 0x0200_0000 9.4.1.7/9-20 */
+ volatile uint32_t ddr_sdram_cfg_2; /* 0x0_2114 DDR SDRAM control configuration 2 R/W 0x0000_0000 9.4.1.8/9-22 */
+ volatile uint32_t ddr_sdram_mode; /* 0x0;_2118 DDR SDRAM mode configuration R/W 0x0000_0000 9.4.1.9/9-24 */
+ volatile uint32_t ddr_sdram_mode_2; /* 0x0_211C DDR SDRAM mode configuration 2 R/W 0x0000_0000 9.4.1.10/9-24 */
+ volatile uint32_t ddr_sdram_md_cntl; /* 0x0_2120 DDR SDRAM mode control R/W 0x0000_0000 9.4.1.11/9-25 */
+ volatile uint32_t ddr_sdram_interval; /* 0x0_2124 DDR SDRAM interval configuration R/W 0x0000_0000 9.4.1.12/9-27 */
+ volatile uint32_t ddr_data_init; /* 0x0_2128 DDR SDRAM data initialization R/W 0x0000_0000 9.4.1.13/9-28 */
+ uint8_t reserved0_212C[0x02130-0x0212C]; /* 0x0_212C Reserved $ $ */
+ volatile uint32_t ddr_sdram_clk_cntl; /* 0x0_2130 DDR SDRAM clock control R/W 0x0200_0000 9.4.1.14/9-28 */
+ uint8_t reserved0_2134[0x02148-0x02134]; /* 0x0_2140 Reserved $ $ */
+ volatile uint32_t ddr_init_address; /* 0x0_2148 DDR training initialization address R/W 0x0000_0000 9.4.1.15/9-29 */
+ uint8_t reserved0_214C[0x02BF8-0x0214C]; /* 0x0_214C Reserved $ $ */
+ volatile uint32_t ddr_ip_rev1; /* 0x0_2BF8 DDR IP block revision 1 R 0x0002_0200 9.4.1.16/9-30 */
+ volatile uint32_t ddr_ip_rev2; /* 0x0_2BFC DDR IP block revision 2 R 0x0000_0000 9.4.1.17/9-30 */
+ uint8_t reserved0_2C00[0x02E00-0x02C00]; /* 0x0_2C00 Reserved $ $ */
+ volatile uint32_t data_err_inject_hi; /* 0x0_2E00 Memory data path error injection mask high R/W 0x0000_0000 9.4.1.18/9-31 */
+ volatile uint32_t data_err_inject_lo; /* 0x0_2E04 Memory data path error injection mask low R/W 0x0000_0000 9.4.1.19/9-31 */
+ volatile uint32_t ecc_err_inject; /* 0x0_2E08 Memory data path error injection mask ECC R/W 0x0000_0000 9.4.1.20/9-32 */
+ uint8_t reserved0_2E0C[0x02E20-0x02E0C]; /* 0x0_2E0C Reserved $ $ */
+ volatile uint32_t capture_data_hi; /* 0x0_2E20 Memory data path read capture high R/W 0x0000_0000 9.4.1.21/9-32 */
+ volatile uint32_t capture_data_lo; /* 0x0_2E24 Memory data path read capture low R/W 0x0000_0000 9.4.1.22/9-33 */
+ volatile uint32_t capture_ecc; /* 0x0_2E28 Memory data path read capture ECC R/W 0x0000_0000 9.4.1.23/9-33 */
+ uint8_t reserved0_2E2C[0x02E40-0x02E2C]; /* 0x0_2E2C Reserved $ $ */
+ volatile uint32_t err_detect; /* 0x0_2E40 Memory error detect w1c 0x0000_0000 9.4.1.24/9-33 */
+ volatile uint32_t err_disable; /* 0x0_2E44 Memory error disable R/W 0x0000_0000 9.4.1.25/9-34 */
+ volatile uint32_t err_int_en; /* 0x0_2E48 Memory error interrupt enable R/W 0x0000_0000 9.4.1.26/9-35 */
+ volatile uint32_t capture_attributes; /* 0x0_2E4C Memory error attributes capture R/W 0x0000_0000 9.4.1.27/9-36 */
+ volatile uint32_t capture_address; /* 0x0_2E50 Memory error address capture R/W 0x0000_0000 9.4.1.28/9-37 */
+ uint8_t reserved0_2E54[0x02E58-0x02E54]; /* 0x0_2E54 Reserved $ $ */
+ volatile uint32_t err_sbe; /* 0x0_2E58 Single-Bit ECC memory error management R/W 0x0000_0000 9.4.1.29/9-37 */
+ uint8_t reserved0_2E5C[0x2F00-0x2E5C];
+} m83xxDDRRegisters_t;
+
+ /* I2C Controller */
+typedef struct m83xxI2CRegisters_ {
+ volatile uint32_t i2cadr; /* 0x0_3000 I2C1 address register R/W 0x00 17.3.1.1/17-5 */
+ volatile uint32_t i2cfdr; /* 0x0_3004 I2C1 frequency divider register R/W 0x00 17.3.1.2/17-5 */
+ volatile uint32_t i2ccr; /* 0x0_3008 I2C1 control register R/W 0x00 17.3.1.3/17-6 */
+ volatile uint32_t i2csr; /* 0x0_300C I2C1 status register R/W 0x81 17.3.1.4/17-8 */
+ volatile uint32_t i2cdr; /* 0x0_3010 I2C1 data register R/W 0x00 17.3.1.5/17-9 */
+ volatile uint32_t i2cdfsrr; /* 0x0_3014 I2C1 digital filter sampling rate register R/W 0x0001_0000 17.3.1.6/17-10 */
+ uint8_t reserved0_3018[0x03100-0x03018]; /* 0x0_3018-30FF Reserved, should be cleared */
+} m83xxI2CRegisters_t;
+
+ /* DUART */
+typedef struct m83xxDUARTRegisters_ {
+ union {
+ volatile uint8_t urbr; /* 0x0_4500 ULCR[DLAB] = 0 UART1 receiver buffer register R 0x00 18.3.1.1/18-6 */
+ volatile uint8_t uthr; /* 0x0_4500 ULCR[DLAB] = 0 UART1 transmitter holding register W 0x00 18.3.1.2/18-6 */
+ volatile uint8_t udlb; /* 0x0_4500 ULCR[DLAB] = 1 UART1 divisor least significant byte register R/W 0x00 18.3.1.3/18-7 */
+ } urbr_uthr_udlb;
+ union {
+ volatile uint8_t uier; /* 0x0_4501 ULCR[DLAB] = 0 UART1 interrupt enable register R/W 0x00 18.3.1.4/18-8 */
+ volatile uint8_t udmb; /* 0x0_4501 ULCR[DLAB] = 1 UART1 divisor most significant byte register R/W 0x00 18.3.1.3/18-7 */
+ } uier_udmb;
+ union {
+ volatile uint8_t uiir; /* 0x0_4502 ULCR[DLAB] = 0 UART1 interrupt ID register R 0x01 18.3.1.5/18-9 */
+ volatile uint8_t ufcr; /* 0x0_4502 ULCR[DLAB] = 0 UART1 FIFO control register W 0x00 18.3.1.6/18-10 */
+ volatile uint8_t uafr; /* 0x0_4502 ULCR[DLAB] = 1 UART1 alternate function register R/W 0x00 18.3.1.12/18-16 */
+ } uiir_ufcr_uafr;
+ volatile uint8_t ulcr; /* 0x0_4503 ULCR[DLAB] = x UART1 line control register R/W 0x00 18.3.1.7/18-11 */
+ volatile uint8_t umcr; /* 0x0_4504 ULCR[DLAB] = x UART1 MODEM control register R/W 0x00 18.3.1.8/18-13 */
+ volatile uint8_t ulsr; /* 0x0_4505 ULCR[DLAB] = x UART1 line status register R 0x60 18.3.1.9/18-14 */
+ volatile uint8_t umsr; /* 0x0_4506 ULCR[DLAB] = x UART1 MODEM status register R 0x00 18.3.1.10/18-15 */
+ volatile uint8_t uscr; /* 0x0_4507 ULCR[DLAB] = x UART1 scratch register R/W 0x00 18.3.1.11/18-16 */
+ uint8_t reserved0_4508[0x04510-0x04508];/* 0x0_4508-450F Reserved */
+ volatile uint8_t udsr; /* 0x0_4510 ULCR[DLAB] = x UART1 DMA status register R 0x01 18.3.1.13/18-17 */
+ uint8_t reserved0_4511[0x04600-0x04511];/* 0x0_4511-45FF Reserved */
+} m83xxDUARTRegisters_t;
+
+ /* Local Bus Controller (LBC) Registers */
+typedef struct m83xxLBCRegisters_ {
+ struct {
+ volatile uint32_t br; /* 0x0_5000 Base register 0 ,R/W 0x0000_RR01 10.3.1.1/10-11 */
+ volatile uint32_t or; /* 0x0_5004 Options register 0 R/W 0x0000_0FF7 10.3.1.2/10-12 */
+ } bor[8];
+ uint8_t reserved0_5040[0x05068-0x05040];/* 0x0_5040-5067 Reserved */
+ volatile uint32_t mar; /* 0x0_5068 UPM address register R/W 0x0000_0000 10.3.1.3/10-18 */
+ uint8_t reserved0_506C[0x05070-0x0506C];/* 0x0_506C-506F Reserved */
+ volatile uint32_t mamr; /* 0x0_5070 UPMA mode register R/W 0x0000_0000 10.3.1.4/10-19 */
+ volatile uint32_t mbmr; /* 0x0_5074 UPMB mode register R/W 0x0000_0000 10.3.1.4/10-19 */
+ volatile uint32_t mcmr; /* 0x0_5078 UPMC mode register R/W 0x0000_0000 10.3.1.4/10-19 */
+ uint8_t reserved0_507C[0x05084-0x0507C];/* 0x0_507C-5083 Reserved */
+ volatile uint32_t mrtpr; /* 0x0_5084 Memory refresh timer prescaler register R/W 0x0000_0000 10.3.1.5/10-21 */
+ volatile uint32_t mdr; /* 0x0_5088 UPM data register R/W 0x0000_0000 10.3.1.6/10-22 */
+ uint8_t reserved0_508C[0x05094-0x0508C];/* 0x0_508C-5093 Reserved */
+ volatile uint32_t lsdmr; /* 0x0_5094 SDRAM mode register R/W 0x0000_0000 10.3.1.7/10-22 */
+ uint8_t reserved0_5098[0x050A0-0x05098];/* 0x0_5098-509F Reserved */
+ volatile uint32_t lurt; /* 0x0_50A0 UPM refresh timer R/W 0x0000_0000 10.3.1.8/10-24 */
+ volatile uint32_t lsrt; /* 0x0_50A4 SDRAM refresh timer R/W 0x0000_0000 10.3.1.9/10-25 */
+ uint8_t reserved0_50A8[0x050B0-0x050A8];/* 0x0_50A8-50AF Reserved */
+ volatile uint32_t ltesr; /* 0x0_50B0 Transfer error status register Read/ bit-reset 0x0000_0000 10.3.1.10/10-26 */
+ volatile uint32_t ltedr; /* 0x0_50B4 Transfer error check disable register R/W 0x0000_0000 10.3.1.11/10-27 */
+ volatile uint32_t lteir; /* 0x0_50B8 Transfer error interrupt enable register R/W 0x0000_0000 10.3.1.12/10-27 */
+ volatile uint32_t lteatr; /* 0x0_50BC Transfer error attributes register R/W 0x0000_0000 10.3.1.13/10-28 */
+ volatile uint32_t ltear; /* 0x0_50C0 Transfer error address register R/W 0x0000_0000 10.3.1.14/10-29 */
+ uint8_t reserved0_50C4[0x050D0-0x050C4];/* 0x0_50C4-50CF Reserved */
+ volatile uint32_t lbcr; /* 0x0_50D0 Local bus configuration register R/W 0x0000_0000 10.3.1.15/10-29 */
+ volatile uint32_t lcrr; /* 0x0_50D4 Clock ratio register R/W 0x8000_0008 10.3.1.16/10-30 */
+ uint8_t reserved0_50D8[0x05100-0x050D8];/* 0x0_50D8-50FF Reserved */
+} m83xxLBCRegisters_t;
+
+ /* Serial Peripheral Interface (SPI) */
+typedef struct m83xxSPIRegisters_ {
+ uint8_t reserved0_7000[0x07020-0x07000];/* 0x0_7000-7020 Reserved, should be cleared */
+ volatile uint32_t spmode; /* 0x0_7020 SPI mode register R/W 0x0000_0000 19.4.1.1/19-9 */
+ volatile uint32_t spie; /* 0x0_7024 SPI event register R/W 0x0000_0000 19.4.1.2/19-11 */
+ volatile uint32_t spim; /* 0x0_7028 SPI mask register R/W 0x0000_0000 19.4.1.3/19-13 */
+ volatile uint32_t spcom; /* 0x0_702C SPI command register R/W 0x0000_0000 19.4.1.4/19-14 */
+ volatile uint32_t spitd; /* 0x0_7030 SPI transmit register R/W 0x0000_0000 19.4.1.5/19-14 */
+ volatile uint32_t spird; /* 0x0_7034 SPI receive register R 0xFFFF_FFFF 19.4.1.6/19-15 */
+ uint8_t reserved0_7038[0x07100-0x07038];/* 0x0_7038-70FF Reserved */
+} m83xxSPIRegisters_t;
+
+typedef struct m83xxDMARegisters_ {
+ /* DMA Registers */
+ uint8_t reserved0_8000[0x08030-0x08000];/* 0x0_8000-0x0_802f Reserved */
+ volatile uint32_t omisr; /* 0x0_8030 Outbound message interrupt status register Special 0x0000_0000 12.4.1/12-4 */
+ volatile uint32_t omimr; /* 0x0_8034 Outbound message interrupt mask register R/W 0x0000_0000 12.4.2/12-6 */
+ uint8_t reserved0_8038[0x08050-0x08038];/* 0x0_8038-0x0_804f Reserved */
+ volatile uint32_t imr0; /* 0x0_8050 Inbound message register 0 R/W 0x0000_0000 12.4.3/12-7 */
+ volatile uint32_t imr1; /* 0x0_8054 Inbound message register 1 R/W 0x0000_0000 12.4.3/12-7 */
+ volatile uint32_t omr0; /* 0x0_8058 Outbound message register 0 R/W 0x0000_0000 12.4.4/12-7 */
+ volatile uint32_t omr1; /* 0x0_805C Outbound message register 1 R/W 0x0000_0000 12.4.4/12-7 */
+ volatile uint32_t odr; /* 0x0_8060 Outbound doorbell register R/W 0x0000_0000 12.4.5/12-8 */
+ uint8_t reserved0_8064[0x08068-0x08064];/* 0x0_8064-0x0_8067 Reserved */
+ volatile uint32_t idr; /* 0x0_8068 Inbound doorbell register R/W 0x0000_0000 12.4.5/12-8 */
+ uint8_t reserved0_806C[0x08080-0x0806C];/* 0x0_806C-0x0_807F Reserved */
+ volatile uint32_t imisr; /* 0x0_8080 Inbound message interrupt status register R/W 0x0000_0000 12.4.6/12-9 */
+ volatile uint32_t imimr; /* 0x0_8084 Inbound message interrupt mask register R/W 0x0000_0000 12.4.7/12-11 */
+ uint8_t reserved0_8088[0x080A8-0x08088];/* 0x0_8088-0x0_80A7 Reserved */
+ struct {
+ uint8_t reserved0_80A8[0x08100-0x080A8];/* 0x0_80A8-0x0_80FF Reserved */
+ volatile uint32_t dmamr0; /* 0x0_8100 DMA 0 mode register R/W 0x0000_0000 12.4.8.1/12-12 */
+ volatile uint32_t dmasr0; /* 0x0_8104 DMA 0 status register R/W 0x0000_0000 12.4.8.2/12-14 */
+ volatile uint32_t dmacdar0; /* 0x0_8108 DMA 0 current descriptor address register R/W 0x0000_0000 12.4.8.3/12-15 */
+ uint8_t reserved0_810C[0x08110-0x0810C];/* 0x0_810C-0x0_810F Reserved */
+ volatile uint32_t dmasar0; /* 0x0_8110 DMA 0 source address register R/W 0x0000_0000 12.4.8.4/12-16 */
+ uint8_t reserved0_8114[0x08118-0x08114];/* 0x0_8114-0x0_8117 Reserved */
+ volatile uint32_t dmadar0; /* 0x0_8118 DMA 0 destination address register R/W 0x0000_0000 12.4.8.5/12-16 */
+ uint8_t reserved0_811C[0x08120-0x0811C];/* 0x0_8120-0x0_811C Reserved */
+ volatile uint32_t dmabcr0; /* 0x0_8120 DMA 0 byte count register R/W 0x0000_0000 12.4.8.6/12-17 */
+ volatile uint32_t dmandar0; /* 0x0_8124 DMA 0 next descriptor address register R/W 0x0000_0000 12.4.8.7/12-17 */
+ }chan[4];
+ volatile uint32_t dmagsr; /* 0x0_82A8 DMA general status register R 0x0000_0000 12.4.8.8/12-18 */
+ uint8_t reserved0_82AC[0x082FF-0x082AC]; /* 0x0_82AC-0x0_82FF Reserved, should be cleared */
+} m83xxDMARegisters_t;
+
+typedef struct m83xxPCICfgRegisters_ {
+ /* PCI1 Software Configuration Registers */
+ volatile uint32_t config_address; /* 0x0_8300 PCI1 CONFIG_ADDRESS W 13.3.1.1/13-16 */
+ volatile uint32_t config_data; /* 0x0_8304 PCI1 CONFIG_DATA R/W 13.3.1.2/13-18 */
+ volatile uint32_t int_ack; /* 0x0_8308 PCI1 INT_ACK R 13.3.1.3/13-18 */
+ uint8_t reserved0_830C[0x08380-0x0830C]; /* 0x0_830C-0x0_837F Reserved */
+} m83xxPCICfgRegisters_t;
+
+typedef struct m83xxPCIIosRegisters_ {
+ /* Sequencer (IOS) */
+ volatile uint32_t potar0; /* 0x0_8400 PCI outbound translation address register 0 R/W 0x0000_0000 11.4.1/11-3 */
+ uint8_t reserved0_8404[0x08408-0x08404];/* 0x0_8404 Reserved */
+ volatile uint32_t pobar0; /* 0x0_8408 PCI outbound base address register 0 R/W 0x0000_0000 11.4.2/11-3 */
+ uint8_t reserved0_840C[0x08410-0x0840C];/* 0x0_840C Reserved */
+ volatile uint32_t pocmr0; /* 0x0_8410 PCI outbound comparison mask register 0 R/W 0x0000_0000 11.4.3/11-4 */
+ uint8_t reserved0_8414[0x08418-0x08414];/* 0x0_8414 Reserved */
+ volatile uint32_t potar1; /* 0x0_8418 PCI outbound translation address register 1 R/W 0x0000_0000 11.4.1/11-3 */
+ uint8_t reserved0_841C[0x08420-0x0841C];/* 0x0_841C Reserved */
+ volatile uint32_t pobar1; /* 0x0_8420 PCI outbound base address register 1 R/W 0x0000_0000 11.4.2/11-3 */
+ uint8_t reserved0_8424[0x08428-0x08424];/* 0x0_8424 Reserved */
+ volatile uint32_t pocmr1; /* 0x0_8428 PCI outbound comparison mask register 1 R/W 0x0000_0000 11.4.3/11-4 */
+ uint8_t reserved0_842C[0x08430-0x0842C];/* 0x0_842C Reserved */
+ volatile uint32_t potar2; /* 0x0_8430 PCI outbound translation address register 2 R/W 0x0000_0000 11.4.1/11-3 */
+ uint8_t reserved0_8434[0x08438-0x08434];/* 0x0_8434 Reserved */
+ volatile uint32_t pobar2; /* 0x0_8438 PCI outbound base address register 2 R/W 0x0000_0000 11.4.2/11-3 */
+ uint8_t reserved0_843C[0x08440-0x0843C];/* 0x0_843C Reserved */
+ volatile uint32_t pocmr2; /* 0x0_8440 PCI outbound comparison mask register 2 R/W 0x0000_0000 11.4.3/11-4 */
+ uint8_t reserved0_8444[0x08448-0x08444];/* 0x0_8444 Reserved */
+ volatile uint32_t potar3; /* 0x0_8448 PCI outbound translation address register 3 R/W 0x0000_0000 11.4.1/11-3 */
+ uint8_t reserved0_844C[0x08450-0x0844C];/* 0x0_844C Reserved */
+ volatile uint32_t pobar3; /* 0x0_8450 PCI outbound base address register 3 R/W 0x0000_0000 11.4.2/11-3 */
+ uint8_t reserved0_8454[0x08458-0x08454];/* 0x0_8454 Reserved */
+ volatile uint32_t pocmr3; /* 0x0_8458 PCI outbound comparison mask register 3 R/W 0x0000_0000 11.4.3/11-4 */
+ uint8_t reserved0_845C[0x08460-0x0845C];/* 0x0_845C Reserved */
+ volatile uint32_t potar4; /* 0x0_8460 PCI outbound translation address register 4 R/W 0x0000_0000 11.4.1/11-3 */
+ uint8_t reserved0_8464[0x08468-0x08464];/* 0x0_8464 Reserved */
+ volatile uint32_t pobar4; /* 0x0_8468 PCI outbound base address register 4 R/W 0x0000_0000 11.4.2/11-3 */
+ uint8_t reserved0_846C[0x08470-0x0846C];/* 0x0_846C Reserved */
+ volatile uint32_t pocmr4; /* 0x0_8470 PCI outbound comparison mask register 4 R/W 0x0000_0000 11.4.3/11-4 */
+ uint8_t reserved0_8474[0x08478-0x08474];/* 0x0_8474 Reserved */
+ volatile uint32_t potar5; /* 0x0_8478 PCI outbound translation address register 5 R/W 0x0000_0000 11.4.1/11-3 */
+ uint8_t reserved0_847C[0x08480-0x0847C];/* 0x0_847C Reserved */
+ volatile uint32_t pobar5; /* 0x0_8480 PCI outbound base address register 5 R/W 0x0000_0000 11.4.2/11-3 */
+ uint8_t reserved0_8484[0x08488-0x08484];/* 0x0_8484 Reserved */
+ volatile uint32_t pocmr5; /* 0x0_8488 PCI outbound comparison mask register 5 R/W 0x0000_0000 11.4.3/11-4 */
+ uint8_t reserved0_848C[0x084F0-0x0848C];/* 0x0_848C Reserved */
+ volatile uint32_t pmcr; /* 0x0_84F0 Power management control register R/W 0x0000_0000 11.4.4/11-5 */
+ uint8_t reserved0_84F4[0x084F8-0x084F4];/* 0x0_84F4 Reserved */
+ volatile uint32_t dtcr; /* 0x0_84F8 Discard timer control register R/W 0x0000_0000 11.4.5/11-6 */
+ uint8_t reserved0_84FC[0x08500-0x084FC];/* 0x0_84FC Reserved */
+} m83xxPCIIosRegisters_t;
+
+typedef struct m83xxPCICtrlRegisters_ {
+ /* PCI1 Error Management Registers */
+ volatile uint32_t pci_esr; /* 0x0_8500 PCI error status register R / w1c 0x0000_0000 13.3.2.1/13-18 */
+ volatile uint32_t pci_ecdr; /* 0x0_8504 PCI error capture disable register R/W 0x0000_0000 13.3.2.2/13-19 */
+ volatile uint32_t pci_eer; /* 0x0_8508 PCI error enable register R/W 0x0000_0000 13.3.2.3/13-20 */
+ volatile uint32_t pci_eatcr; /* 0x0_850C PCI error attributes capture register R/W 0x0000_0000 13.3.2.4/13-21 */
+ volatile uint32_t pci_eacr; /* 0x0_8510 PCI error address capture register R 0x0000_0000 13.3.2.5/13-23 */
+ volatile uint32_t pci_eeacr; /* 0x0_8514 PCI error extended address capture register R 0x0000_0000 13.3.2.6/13-23 */
+ volatile uint32_t pci_edlcr; /* 0x0_8518 PCI error data low capture register R 0x0000_0000 13.3.2.7/13-24 */
+ volatile uint32_t pci_edhcr; /* 0x0_851C PCI error data high capture register R 0x0000_0000 13.3.2.8/13-24 */
+ /* PCI1 Control and Status Registers */
+ volatile uint32_t pci_gcr; /* 0x0_8520 PCI general control register R/W 0x0000_0000 13.3.2.9/13-24 */
+ volatile uint32_t pci_ecr; /* 0x0_8524 PCI error control register R/W 0x0000_0000 13.3.2.10/13-25 */
+ volatile uint32_t pci_gsr; /* 0x0_8528 PCI general status register R 0x0000_0000 13.3.2.11/13-26 */
+ uint8_t reserved0_852C[0x08538-0x0852C];/* 0x0_852C Reserved */
+ /* PCI1 Inbound ATU Registers */
+ volatile uint32_t pitar2; /* 0x0_8538 PCI inbound translation address register 2 R/W 0x0000_0000 13.3.2.12/13-26 */
+ uint8_t reserved0_853C[0x08540-0x0853C];/* 0x0_853C Reserved, should be cleared $ $ */
+ volatile uint32_t pibar2; /* 0x0_8540 PCI inbound base address register 2 R/W 0x0000_0000 13.3.2.13/13-27 */
+ volatile uint32_t piebar2; /* 0x0_8544 PCI inbound extended base address register 2 R/W 0x0000_0000 13.3.2.14/13-27 */
+ volatile uint32_t piwar2; /* 0x0_8548 PCI inbound window attributes register 2 R/W 0x0000_0000 13.3.2.15/13-28 */
+ uint8_t reserved0_854C[0x08550-0x0854C];/* 0x0_854C Reserved */
+ volatile uint32_t pitar1; /* 0x0_8550 PCI inbound translation address register 1 R/W 0x0000_0000 13.3.2.12/13-26 */
+ uint8_t reserved0_8550[0x08558-0x08554];/* 0x0_8554 Reserved, should be cleared $ $ */
+ volatile uint32_t pibar1; /* 0x0_8558 PCI inbound base address register 1 R/W 0x0000_0000 13.3.2.13/13-27 */
+ volatile uint32_t piebar1; /* 0x0_855C PCI inbound extended base address register 1 R/W 0x0000_0000 13.3.2.14/13-27 */
+ volatile uint32_t piwar1; /* 0x0_8560 PCI inbound window attributes register 1 R/W 0x0000_0000 13.3.2.15/13-28 */
+ uint8_t reserved0_8564[0x08568-0x08564];/* 0x0_8564 Reserved */
+ volatile uint32_t pitar0; /* 0x0_8568 PCI inbound translation address register 0 R/W 0x0000_0000 13.3.2.12/13-26 */
+ uint8_t reserved0_856c[0x08570-0x0856c];/* 0x0_856C Reserved, should be cleared $ $ */
+ volatile uint32_t pibar0; /* 0x0_8570 PCI inbound base address register 0 R/W 0x0000_0000 13.3.2.13/13-27 */
+ uint8_t reserved0_8574[0x08578-0x08574];/* 0x0_8574 Reserved */
+ volatile uint32_t piwar0; /* 0x0_8578 PCI inbound window attributes register 0 R/W 0x0000_0000 13.3.2.14/13-27 */
+ uint8_t reserved0_857c[0x08580-0x0857c];/* 0x0_857C Reserved, should be cleared $ $ */
+ uint8_t reserved0_8580[0x08600-0x08580];/* 0x0_8580 Reserved */
+} m83xxPCICtrlRegisters_t;
+
+typedef struct m83xxUSB_MPHRegisters_ {
+ /* USB MPH Controller Registers */
+ uint8_t reserved0x2_2000[0x22100-0x22000]; /* 0x2_2000--0x2_20FF Reserved, should be cleared */
+ volatile uint16_t caplength; /* 0x2_2100 Capability register length R 0x40 16.3.1.1/16-19 */
+ volatile uint16_t hciversion; /* 0x2_2102 Host interface version number R 0x0100 16.3.1.2/16-19 */
+ volatile uint32_t hcsparams; /* 0x2_2104 Host crtl. structural parameters R 0x0121_0012 16.3.1.3/16-20 */
+ volatile uint32_t hccparams; /* 0x2_2108 Host crtl. capability parameters R 0x0000_0006 16.3.1.4/16-21 */
+ uint8_t reserved0x2_210C[0x22140-0x2210C]; /* Reserved */
+ volatile uint32_t usbcmd; /* 0x2_2140 USB command R/W 0x0008_nBn0 16.3.2.1/16-23 */
+ volatile uint32_t usbsts; /* 0x2_2144 USB status R/W 0x0000_0000 16.3.2.2/16-26 */
+ volatile uint32_t usbintr; /* 0x2_2148 USB interrupt enable R/W 0x0000_0000 16.3.2.3/16-28 */
+ volatile uint32_t frindex; /* 0x2_214C USB frame index R/W 0x0000_nnnn 16.3.2.4/16-30 */
+ uint8_t reserved0x2_2150[0x22154-0x22150]; /* Reserved */
+ volatile uint32_t periodiclistbase; /* 0x2_2154 Frame list base address R/W 0xnnnn_0000 16.3.2.6/16-31 */
+ volatile uint32_t asynclistaddr; /* 0x2_2158 Next asynchronous list addr R/W 0x0000_0000 16.3.2.8/16-32 */
+ volatile uint32_t asyncttsts; /* 0x2_215C Asynchronous buffer status for embedded TT TBD 0x0000_0000 16.3.2.10/16-34 */
+ volatile uint32_t burstsize; /* 0x2_2160 Programmable burst size R/W 0x000_1010 16.3.2.11/16-34 */
+ volatile uint32_t txfilltuning; /* 0x2_2164 Host TT transmit pre-buffer packet tuning R/W 0x0002_0000 16.3.2.12/16-35 */
+ volatile uint32_t txttfilltuning; /* 0x2_2168 Host TT transmit pre-buffer packet tuning R/W 0x0000_0000 16.3.2.13/16-37 */
+ uint8_t reserved0x2_216c[0x22170-0x2216c]; /* Reserved */
+ volatile uint32_t viewport; /* 0x2_2170 ULPI ULPI Register Access R/W 0x0000_0000 16.3.2.14/16-37 */
+ uint8_t reserved0x2_2174[0x22180-0x22174]; /* Reserved */
+ volatile uint32_t configflag; /* 0x2_2180 Configured flag register R 0x0000_0001 16.3.2.15/16-39 */
+ volatile uint32_t portsc1; /* 0x2_2184 Port status/control 1 R/W 0x8C00_0001 16.3.2.16/16-39 */
+ volatile uint32_t portsc2; /* 0x2_2188 Port status/control 2 R/W 0x8C00_0001 16.3.2.16/16-39 */
+ uint8_t reserved0x2_218c[0x221A8-0x2218c]; /* Reserved */
+ volatile uint32_t usbmode; /* 0x2_21A8 USB device mode R/W 0x0000_0003 16.3.2.18/16-47 */
+ uint8_t reserved0x2_21AC[0x22400-0x221AC]; /* Reserved */
+ volatile uint32_t snoop1; /* 0x2_2400 Snoop 1 R/W 0x0000_0000 16.3.2.26/16-53 */
+ volatile uint32_t snoop2; /* 0x2_2404 Snoop 2 R/W 0x0000_0000 16.3.2.26/16-53 */
+ volatile uint32_t age_cnt_thresh; /* 0x2_2408 Age count threshold R/W 0x0000_0000 16.3.2.27/16-54 */
+ volatile uint32_t si_ctrl; /* 0x2_240C System interface control R/W 0x0000_0000 16.3.2.28/16-56 */
+ volatile uint32_t pri_ctrl; /* 0x2_2410 Priority control R/W 0x0000_0000 16.3.2.29/16-56 */
+ uint8_t reserved0x2_2414[0x22500-0x22414]; /* Reserved */
+ volatile uint32_t control; /* 0x2_2500 Control R/W 0x0000_0000 16.3.2.30/16-57 */
+ uint8_t reserved0x2_2504[0x23000-0x22504]; /* 0x2_2504--0x2_2FFF Reserved, should be cleared */
+} m83xxUSB_MPHRegisters_t;
+
+typedef struct m83xxUSB_DRRegisters_ {
+ /* USB DR Controller Registers */
+ uint8_t reserved0x2_3000[0x23100-0x23000]; /* 0x2_3000--0x2_30FF Reserved, should be cleared */
+ volatile uint16_t caplength; /* 0x2_3100 Capability register length R 0x40 16.3.1.1/16-19 */
+ volatile uint16_t hciversion; /* 0x2_3102 Host interface version number R 0x0100 16.3.1.2/16-19 */
+ volatile uint32_t hcsparams; /* 0x2_3104 Host crtl. structural parameters R 0x0111_0011 16.3.1.3/16-20 */
+ volatile uint32_t hccparams; /* 0x2_3108 Host crtl. capability parameters R 0x0000_0006 16.3.1.4/16-21 */
+ uint8_t reserved0x2_310c[0x23120-0x2310C]; /* 0x2_310c--0x2_311f Reserved */
+ volatile uint32_t dciversion; /* 0x2_3120 Device interface version number R 0x0001 16.3.1.5/16-22 */
+ volatile uint32_t dccparams; /* 0x2_3124 Device controller parameters R 0x0000_0186 16.3.1.6/16-22 */
+ uint8_t reserved0x2_3128[0x23140-0x23128]; /* 0x2_3128--0x2_313f Reserved */
+ volatile uint32_t usbcmd; /* 0x2_3140 USB command R/W 0x0008_nBn0 16.3.2.1/16-23 */
+ volatile uint32_t usbsts; /* 0x2_3144 USB status R/W 0x0000_0000 16.3.2.2/16-26 */
+ volatile uint32_t usbintr; /* 0x2_3148 USB interrupt enable R/W 0x0000_0000 16.3.2.3/16-28 */
+ volatile uint32_t frindex; /* 0x2_314C USB frame index R/W 0x0000_nnnn 16.3.2.4/16-30 */
+ uint8_t reserved0x2_3150[0x23154-0x23150]; /* 0x2_3150--0x2_3153 Reserved */
+ union {
+ volatile uint32_t periodiclistbase; /* 0x2_3154 Frame list base address R/W 0xnnnn_0000 16.3.2.6/16-31 */
+ volatile uint32_t deviceaddr; /* 0x2_3154 USB device address R/W 0x0000_0000 16.3.2.7/16-32 */
+ } perbase_devaddr;
+ union {
+ volatile uint32_t asynclistaddr; /* 0x2_3158 Next asynchronous list addr (host mode) R/W 0x0000_0000 16.3.2.8/16-32 */
+ volatile uint32_t addr; /* 0x2_3158 ENDPOINT Address at endpoint list (device mode) R/W 0x0000_0000 16.3.2.9/16-33 */
+ } async_addr;
+ uint8_t reserved0x2_315c[0x23160-0x2315c]; /* 0x2_315c--0x2_315f Reserved */
+ volatile uint32_t burstsize; /* 0x2_3160 Programmable burst size R/W 0x0000_1010 16.3.2.11/16-34 */
+ volatile uint32_t txfilltuning; /* 0x2_3164 Host TT transmit pre-buffer packet tuning R/W 0x0002_0000 16.3.2.12/16-35 */
+ uint8_t reserved0x2_3168[0x23170-0x23168]; /* 0x2_3168--0x2_316f Reserved */
+ volatile uint32_t viewport; /* 0x2_3170 ULPI ULPI Register Access R/W 0x0000_0000 16.3.2.14/16-37 */
+ uint8_t reserved0x2_3174[0x23180-0x23174]; /* 0x2_3174--0x2_317F Reserved */
+ volatile uint32_t configflag; /* 0x2_3180 Configured flag register R 0x0000_0001 16.3.2.15/16-39 */
+ volatile uint32_t portsc1; /* 0x2_3184 Port status/control R/W 0x9C00_0000 16.3.2.16/16-39 */
+ uint8_t reserved0x2_3188[0x231A4-0x23188]; /* 0x2_3188--0x2_31A3 Reserved */
+ volatile uint32_t otgsc; /* 0x2_31A4 On-the-Go status and control R/W 0x0000_0001 16.3.2.17/16-44 */
+ volatile uint32_t usbmode; /* 0x2_31A8 USB device mode R/W 0x0000_0000 16.3.2.18/16-47 */
+ volatile uint32_t endptsetupstat; /* 0x2_31AC Endpoint setup status R/W 0x0000_0000 16.3.2.19/16-48 */
+ volatile uint32_t endpointprime; /* 0x2_31B0 Endpoint initialization R/W 0x0000_0000 16.3.2.20/16-48 */
+ volatile uint32_t endptflush; /* 0x2_31B4 Endpoint de-initialize R/W 0x0000_0000 16.3.2.21/16-49 */
+ volatile uint32_t endptstatus; /* 0x2_31B8 Endpoint status R 0x0000_0000 16.3.2.22/16-50 */
+ volatile uint32_t endptcomplete; /* 0x2_31BC Endpoint complete R/W 0x0000_0000 16.3.2.23/16-50 */
+ volatile uint32_t endptctrl[6]; /* 0x2_31C0 Endpoint control 0 R/W 0x0080_0080 16.3.2.24/16-51 */
+ uint8_t reserved0x2_31D8[0x23400-0x231D8]; /* 0x2_31D8--0x2_33ff Reserved */
+ volatile uint32_t snoop1; /* 0x2_3400 Snoop 1 R/W 0x0000_0000 16.3.2.26/16-53 */
+ volatile uint32_t snoop2; /* 0x2_3404 Snoop 2 R/W 0x0000_0000 16.3.2.26/16-53 */
+ volatile uint32_t age_cnt_thresh; /* 0x2_3408 Age count threshold R/W 0x0000_0000 16.3.2.27/16-54 */
+ volatile uint32_t pri_ctrl; /* 0x2_340C Priority control R/W 0x0000_0000 16.3.2.29/16-56 */
+ volatile uint32_t si_ctrl; /* 0x2_3410 System interface control R/W 0x0000_0000 16.3.2.28/16-56 */
+ uint8_t reserved0x2_3414[0x23500-0x23414]; /* 0x2_3414--0x2_34ff Reserved */
+ volatile uint32_t control; /* 0x2_3500 Control R/W 0x0000_0000 16.3.2.30/16-57 */
+ uint8_t reserved0x2_3504[0x24000-0x23504]; /* 0x2_3504--0x2_3FFF Reserved, should be cleared */
+} m83xxUSB_DRRegisters_t;
+
+ /*
+ * this enumeration defines the index
+ * of a given rmon mib counter
+ * in the tsec_rmon_mib array
+ */
+typedef enum {
+ /* TSEC1 Transmit and Receive Counters */
+ m83xx_tsec_rmon_tr64, /* 0x2_4680 Transmit and receive 64-byte frame counter register R/W 0x0000_0000 15.5.3.7.1/15-60 */
+ m83xx_tsec_rmon_tr127, /* 0x2_4684 Transmit and receive 65- to 127-byte frame counter register R/W 0x0000_0000 15.5.3.7.2/15-61 */
+ m83xx_tsec_rmon_tr255, /* 0x2_4688 Transmit and receive 128- to 255-byte frame counter register R/W 0x0000_0000 15.5.3.7.3/15-61 */
+ m83xx_tsec_rmon_tr511, /* 0x2_468C Transmit and receive 256- to 511-byte frame counter register R/W 0x0000_0000 15.5.3.7.4/15-62 */
+ m83xx_tsec_rmon_tr1k, /* 0x2_4690 Transmit and receive 512- to 1023-byte frame counter register R/W 0x0000_0000 15.5.3.7.5/15-62 */
+ m83xx_tsec_rmon_trmax, /* 0x2_4694 Transmit and receive 1024- to 1518-byte frame counter register R/W 0x0000_0000 15.5.3.7.6/15-63 */
+ m83xx_tsec_rmon_trmgv, /* 0x2_4698 Transmit and receive 1519- to 1522-byte good VLAN frame count register R/W 0x0000_0000 15.5.3.7.7/15-63 */
+ /* TSEC1 Receive Counters */
+ m83xx_tsec_rmon_rbyt, /* 0x2_469C Receive byte counter register R/W 0x0000_0000 15.5.3.7.8/15-64 */
+ m83xx_tsec_rmon_rpkt, /* 0x2_46A0 Receive packet counter register R/W 0x0000_0000 15.5.3.7.9/15-64 */
+ m83xx_tsec_rmon_rfcs, /* 0x2_46A4 Receive FCS error counter register R/W 0x0000_0000 15.5.3.7.10/15-65 */
+ m83xx_tsec_rmon_rmca, /* 0x2_46A8 Receive multicast packet counter register R/W 0x0000_0000 15.5.3.7.11/15-65 */
+ m83xx_tsec_rmon_rbca, /* 0x2_46AC Receive broadcast packet counter register R/W 0x0000_0000 15.5.3.7.12/15-66 */
+ m83xx_tsec_rmon_rxcf, /* 0x2_46B0 Receive control frame packet counter register R/W 0x0000_0000 15.5.3.7.13/15-66 */
+ m83xx_tsec_rmon_rxpf, /* 0x2_46B4 Receive PAUSE frame packet counter register R/W 0x0000_0000 15.5.3.7.14/15-67 */
+ m83xx_tsec_rmon_rxuo, /* 0x2_46B8 Receive unknown OP code counter register R/W 0x0000_0000 15.5.3.7.15/15-67 */
+ m83xx_tsec_rmon_raln, /* 0x2_46BC Receive alignment error counter register R/W 0x0000_0000 15.5.3.7.16/15-68 */
+ m83xx_tsec_rmon_rflr, /* 0x2_46C0 Receive frame length error counter register R/W 0x0000_0000 15.5.3.7.17/15-68 */
+ m83xx_tsec_rmon_rcde, /* 0x2_46C4 Receive code error counter register R/W 0x0000_0000 15.5.3.7.18/15-69 */
+ m83xx_tsec_rmon_rcse, /* 0x2_46C8 Receive carrier sense error counter register R/W 0x0000_0000 15.5.3.7.19/15-69 */
+ m83xx_tsec_rmon_rund, /* 0x2_46CC Receive undersize packet counter register R/W 0x0000_0000 15.5.3.7.20/15-70 */
+ m83xx_tsec_rmon_rovr, /* 0x2_46D0 Receive oversize packet counter register R/W 0x0000_0000 15.5.3.7.21/15-70 */
+ m83xx_tsec_rmon_rfrg, /* 0x2_46D4 Receive fragments counter register R/W 0x0000_0000 15.5.3.7.22/15-71 */
+ m83xx_tsec_rmon_rjbr, /* 0x2_46D8 Receive jabber counter register R/W 0x0000_0000 15.5.3.7.23/15-71 */
+ m83xx_tsec_rmon_rdrp, /* 0x2_46DC Receive drop register R/W 0x0000_0000 15.5.3.7.24/15-72 */
+ /* TSEC1 Transmit Counters */
+ m83xx_tsec_rmon_tbyt, /* 0x2_46E0 Transmit byte counter register R/W 0x0000_0000 15.5.3.7.25/15-72 */
+ m83xx_tsec_rmon_tpkt, /* 0x2_46E4 Transmit packet counter register R/W 0x0000_0000 15.5.3.7.26/15-73 */
+ m83xx_tsec_rmon_tmca, /* 0x2_46E8 Transmit multicast packet counter register R/W 0x0000_0000 15.5.3.7.27/15-73 */
+ m83xx_tsec_rmon_tbca, /* 0x2_46EC Transmit broadcast packet counter register R/W 0x0000_0000 15.5.3.7.28/15-74 */
+ m83xx_tsec_rmon_txpf, /* 0x2_46F0 Transmit PAUSE control frame counter register R/W 0x0000_0000 15.5.3.7.29/15-74 */
+ m83xx_tsec_rmon_tdfr, /* 0x2_46F4 Transmit deferral packet counter register R/W 0x0000_0000 15.5.3.7.30/15-75 */
+ m83xx_tsec_rmon_tedf, /* 0x2_46F8 Transmit excessive deferral packet counter register R/W 0x0000_0000 15.5.3.7.31/15-75 */
+ m83xx_tsec_rmon_tscl, /* 0x2_46FC Transmit single collision packet counter register R/W 0x0000_0000 15.5.3.7.32/15-76 */
+ m83xx_tsec_rmon_tmcl, /* 0x2_4700 Transmit multiple collision packet counter register R/W 0x0000_0000 15.5.3.7.33/15-76 */
+ m83xx_tsec_rmon_tlcl, /* 0x2_4704 Transmit late collision packet counter register R/W 0x0000_0000 15.5.3.7.34/15-77 */
+ m83xx_tsec_rmon_txcl, /* 0x2_4708 Transmit excessive collision packet counter register R/W 0x0000_0000 15.5.3.7.35/15-77 */
+ m83xx_tsec_rmon_tncl, /* 0x2_470C Transmit total collision counter register R/W 0x0000_0000 15.5.3.7.36/15-78 */
+ m83xx_tsec_reserved1, /* 0x2_4710 Reserved, should be cleared R 0x0000_0000 */
+ m83xx_tsec_rmon_tdrp, /* 0x2_4714 Transmit drop frame counter register R/W 0x0000_0000 15.5.3.7.37/15-78 */
+ m83xx_tsec_rmon_tjbr, /* 0x2_4718 Transmit jabber frame counter register R/W 0x0000_0000 15.5.3.7.38/15-79 */
+ m83xx_tsec_rmon_tfcs, /* 0x2_471C Transmit FCS error counter register R/W 0x0000_0000 15.5.3.7.39/15-79 */
+ m83xx_tsec_rmon_txcf, /* 0x2_4720 Transmit control frame counter register R/W 0x0000_0000 15.5.3.7.40/15-80 */
+ m83xx_tsec_rmon_tovr, /* 0x2_4724 Transmit oversize frame counter register R/W 0x0000_0000 15.5.3.7.41/15-80 */
+ m83xx_tsec_rmon_tund, /* 0x2_4728 Transmit undersize frame counter register R/W 0x0000_0000 15.5.3.7.42/15-81 */
+ m83xx_tsec_rmon_tfrg, /* 0x2_472C Transmit fragments frame counter register R/W 0x0000_0000 15.5.3.7.43/15-81 */
+ m83xx_tsec_rmon_cnt
+} m83xx_tsec_rmon_idx_t;
+
+ /* TSEC1/2 General Control and Status Registers */
+typedef struct m83xxTSEC_Registers_ {
+ uint8_t reserved0x2_4000[0x24010-0x24000]; /* 0x2_4000--0x2_400F Reserved, should be cleared */
+ volatile uint32_t ievent; /* 0x2_4010 Interrupt event register R/W 0x0000_0000 15.5.3.1.1/15-19 */
+ volatile uint32_t imask; /* 0x2_4014 Interrupt mask register R/W 0x0000_0000 15.5.3.1.2/15-22 */
+ volatile uint32_t edis; /* 0x2_4018 Error disabled register R/W 0x0000_0000 15.5.3.1.3/15-24 */
+ uint8_t reserved0x2_401c[0x24020-0x2401c]; /* 0x2_401c--0x2_401f Reserved, should be cleared */
+ volatile uint32_t ecntrl; /* 0x2_4020 Ethernet control register R/W 0x0000_0000 15.5.3.1.4/15-25 */
+ volatile uint32_t minflr; /* 0x2_4024 Minimum frame length register R/W 0x0000_0040 15.5.3.1.5/15-26 */
+ volatile uint32_t ptv; /* 0x2_4028 Pause time value register R/W 0x0000_0000 15.5.3.1.6/15-27 */
+ volatile uint32_t dmactrl; /* 0x2_402C DMA control register R/W 0x0000_0000 15.5.3.1.7/15-28 */
+ volatile uint32_t tbipa; /* 0x2_4030 TBI PHY address register R/W 0x0000_0000 15.5.3.1.8/15-29 */
+ uint8_t reserved0x2_4034[0x2408c-0x24034]; /* 0x2_4034--0x2_408b Reserved, should be cleared */
+ /* TSEC1 FIFO Control and Status Registers */
+ volatile uint32_t fifo_tx_thr; /* 0x2_408C FIFO transmit threshold register R/W 0x0000_0100 15.5.3.2.1/15-30 */
+ uint8_t reserved0x2_4090[0x24094-0x24090]; /* 0x2_4090--0x2_4093 Reserved, should be cleared */
+ volatile uint32_t fifo_tx_sp; /* 0x2_4094 FIFO transmit space available register R/W 0x0000_0010 15.5.3.2.2/15-31 */
+ volatile uint32_t fifo_tx_starve; /* 0x2_4098 FIFO transmit starve register R/W 0x0000_0080 15.5.3.2.3/15-31 */
+ volatile uint32_t fifo_tx_starve_shutoff; /* 0x2_409C FIFO transmit starve shutoff register R/W 0x0000_0100 15.5.3.2.4/15-32 */
+ uint8_t reserved0x2_40A0[0x24100-0x240A0]; /* 0x2_40A0--0x2_40ff Reserved, should be cleared */
+ /* TSEC1 Transmit Control and Status Registers */
+ volatile uint32_t tctrl; /* 0x2_4100 Transmit control register R/W 0x0000_0000 15.5.3.3.1/15-33 */
+ volatile uint32_t tstat; /* 0x2_4104 Transmit status register R/W 0x0000_0000 15.5.3.3.2/15-34 */
+ uint8_t reserved0x2_4108[0x24110-0x24108]; /* 0x2_4108 Reserved, should be cleared R 0x0000_0000 */
+ volatile uint32_t txic; /* 0x2_4110 Transmit interrupt coalescing configuration register R/W 0x0000_0000 */
+ uint8_t reserved0x2_4114[0x24124-0x24114]; /* 0x2_4114--0x2_4120 Reserved, should be cleared */
+ volatile uint32_t ctbptr; /* 0x2_4124 Current TxBD pointer register R 0x0000_0000 15.5.3.3.5/15-36 */
+ uint8_t reserved0x2_4128[0x24184-0x24128]; /* 0x2_4128--0x2_4180 Reserved, should be cleared */
+ volatile uint32_t tbptr; /* 0x2_4184 TxBD pointer register R/W 0x0000_0000 15.5.3.3.6/15-36 */
+ uint8_t reserved0x2_4188[0x24204-0x24188]; /* 0x2_4188--0x2_4200 Reserved, should be cleared */
+ volatile uint32_t tbase; /* 0x2_4204 TxBD base address register R/W 0x0000_0000 15.5.3.3.7/15-37 */
+ uint8_t reserved0x2_4208[0x242B0-0x24208]; /* 0x2_4208--0x2_42AC Reserved, should be cleared */
+ volatile uint32_t ostbd; /* 0x2_42B0 Out-of-sequence TxBD register R/W 0x0800_0000 15.5.3.3.8/15-37 */
+ volatile uint32_t ostbdp; /* 0x2_42B4 Out-of-sequence Tx data buffer pointer register R/W 0x0000_0000 15.5.3.3.9/15-39 */
+ uint8_t reserved0x2_42B8[0x24300-0x242B8]; /* 0x2_42B8--0x2_42FC Reserved, should be cleared */
+ /* TSEC1 Receive Control and Status Registers */
+ volatile uint32_t rctrl; /* 0x2_4300 Receive control register R/W 0x0000_0000 15.5.3.4.1/15-40 */
+ volatile uint32_t rstat; /* 0x2_4304 Receive status register R/W 0x0000_0000 15.5.3.4.2/15-41 */
+ uint8_t reserved0x2_4308[0x2430C-0x24308]; /* 0x2_4308 Reserved, should be cleared R 0x0000_0000 */
+ volatile uint32_t rbdlen; /* 0x2_430C RxBD data length register R 0x0000_0000 15.5.3.4.3/15-41 */
+ volatile uint32_t rxic; /* 0x2_4310 Receive interrupt coalescing configuration register R/W 0x0000_0000 15.5.3.4.4/15-42 */
+ uint8_t reserved0x2_4314[0x24324-0x24314]; /* 0x2_4314--0x2_4320 Reserved, should be cleared */
+ volatile uint32_t crbptr; /* 0x2_4324 Current RxBD pointer register R 0x0000_0000 15.5.3.4.5/15-43 */
+ uint8_t reserved0x2_4328[0x24340-0x24328]; /* 0x2_4328--0x2_433C Reserved, should be cleared */
+ volatile uint32_t mrblr; /* 0x2_4340 Maximum receive buffer length register R/W 0x0000_0000 15.5.3.4.6/15-43 */
+ uint8_t reserved0x2_4344[0x24384-0x24344]; /* 0x2_4344--0x2_4380 Reserved, should be cleared */
+ volatile uint32_t rbptr; /* 0x2_4384 RxBD pointer register R/W 0x0000_0000 15.5.3.4.7/15-44 */
+ uint8_t reserved0x2_4388[0x24404-0x24388]; /* 0x2_4388--0x2_4400 Reserved, should be cleared */
+ volatile uint32_t rbase; /* 0x2_4404 RxBD base address register R/W 0x0000_0000 15.5.3.4.8/15-44 */
+ uint8_t reserved0x2_4408[0x24500-0x24408]; /* 0x2_4408--0x2_44FC Reserved, should be cleared */
+ /* TSEC1 MAC Registers */
+ volatile uint32_t maccfg1; /* 0x2_4500 MAC configuration register 1 R/W, R 0x0000_0000 15.5.3.6.1/15-48 */
+ volatile uint32_t maccfg2; /* 0x2_4504 MAC configuration register 2 R/W 0x0000_7000 15.5.3.6.2/15-49 */
+ volatile uint32_t ipgifg; /* 0x2_4508 Inter-packet gap/inter-frame gap register R/W 0x4060_5060 15.5.3.6.3/15-51 */
+ volatile uint32_t hafdup; /* 0x2_450C Half-duplex register R/W 0x00A1_F037 15.5.3.6.4/15-52 */
+ volatile uint32_t maxfrm; /* 0x2_4510 Maximum frame length register R/W 0x0000_0600 15.5.3.6.5/15-53 */
+ uint8_t reserved0x2_4514[0x24520-0x24514]; /* 0x2_4514--0x2_451C Reserved, should be cleared */
+ volatile uint32_t miimcfg; /* 0x2_4520 MII management configuration register R/W 0x0000_0000 15.5.3.6.6/15-53 */
+ volatile uint32_t miimcom; /* 0x2_4524 MII management command register R/W 0x0000_0000 15.5.3.6.7/15-54 */
+ volatile uint32_t miimadd; /* 0x2_4528 MII management address register R/W 0x0000_0000 15.5.3.6.8/15-55 */
+ volatile uint32_t miimcon; /* 0x2_452C MII management control register W 0x0000_0000 15.5.3.6.9/15-56 */
+ volatile uint32_t miimstat; /* 0x2_4530 MII management status register R 0x0000_0000 15.5.3.6.10/15-56 */
+ volatile uint32_t miimind; /* 0x2_4534 MII management indicator register R 0x0000_0000 15.5.3.6.11/15-57 */
+ uint8_t reserved0x2_4538[0x2453c-0x24538]; /* 0x2_4538 Reserved, should be cleared $ $ */
+ volatile uint32_t ifstat; /* 0x2_453C Interface status register Special 0x0000_0001 15.5.3.6.12/15-58 */
+ volatile uint32_t macstnaddr[2]; /* 0x2_4540 Station address register, part 1/2 R/W 0x0000_0000 15.5.3.6.13/15-58 */
+ uint8_t reserved0x2_4548[0x24680-0x24548]; /* 0x2_4548--0x2_467C Reserved, should be cleared */
+
+ /* TSEC1 RMON MIB Registers */
+ volatile uint32_t rmon_mib[m83xx_tsec_rmon_cnt];
+
+ /* TSEC1 General Registers */
+ volatile uint32_t car[2]; /* 0x2_4730 Carry register one/two register R 0x0000_0000 15.5.3.7.44/15-82 */
+ volatile uint32_t cam[2]; /* 0x2_4738 Carry register one/two mask register R/W 0xFE01_FFFF 15.5.3.7.46/15-85 */
+ uint8_t reserved0x2_4740[0x24800-0x24740]; /* 0x2_4740--0x2_47FC Reserved, should be cleared */
+
+ /* TSEC1 Hash Function Registers */
+ volatile uint32_t iaddr[8]; /* 0x2_4800 Individual address register 0-7 R/W 0x0000_0000 15.5.3.8.1/15-87 */
+ uint8_t reserved0x2_4820[0x24880-0x24820]; /* 0x2_4820--0x2_487C Reserved, should be cleared */
+ volatile uint32_t gaddr[8]; /* 0x2_4880 Group address register 0-7 R/W 0x0000_0000 15.5.3.8.2/15-88 */
+ uint8_t reserved0x2_48A0[0x24B00-0x248A0]; /* 0x2_48A0--0x2_4AFF Reserved, should be cleared */
+
+ /* TSEC1 Attribute Registers */
+ uint8_t reserved0x2_4B00[0x24BF8-0x24B00]; /* 0x2_4B00--0x2_4BF4 Reserved, should be cleared */
+ volatile uint32_t attr; /* 0x2_4BF8 Attribute register R 0x0000_0000 */
+ volatile uint32_t attreli; /* 0x2_4BFC Attribute extract length and extract index register R/W 0x0000_0000 */
+ uint8_t reserved0x2_4C00[0x25000-0x24C00]; /* 0x2_4C00--0x2_4FFF Reserved, should be cleared */
+} m83xxTSEC_Registers_t;
+
+
+/*
+ * TSEC IEVENT/IMASK bit definitions
+ */
+#define M83xx_TSEC_IEVENT_BABR (1<<(31- 0))
+#define M83xx_TSEC_IEVENT_RXC (1<<(31- 1))
+#define M83xx_TSEC_IEVENT_BSY (1<<(31- 2))
+#define M83xx_TSEC_IEVENT_EBERR (1<<(31- 3))
+#define M83xx_TSEC_IEVENT_MSRO (1<<(31- 5))
+#define M83xx_TSEC_IEVENT_GTSC (1<<(31- 6))
+#define M83xx_TSEC_IEVENT_BABT (1<<(31- 7))
+#define M83xx_TSEC_IEVENT_TXC (1<<(31- 8))
+#define M83xx_TSEC_IEVENT_TXE (1<<(31- 9))
+#define M83xx_TSEC_IEVENT_TXB (1<<(31-10))
+#define M83xx_TSEC_IEVENT_TXF (1<<(31-11))
+#define M83xx_TSEC_IEVENT_LC (1<<(31-13))
+#define M83xx_TSEC_IEVENT_CRL_XDA (1<<(31-14))
+#define M83xx_TSEC_IEVENT_XFUN (1<<(31-15))
+#define M83xx_TSEC_IEVENT_RXB (1<<(31-16))
+#define M83xx_TSEC_IEVENT_MMRD (1<<(31-21))
+#define M83xx_TSEC_IEVENT_MMWR (1<<(31-22))
+#define M83xx_TSEC_IEVENT_GRSC (1<<(31-23))
+#define M83xx_TSEC_IEVENT_RXF (1<<(31-24))
+
+/*
+ * TSEC DMACTRL bit definitions
+ */
+#define M83xx_TSEC_DMACTL_TDSEN (1<<(31-24))
+#define M83xx_TSEC_DMACTL_TBDSEN (1<<(31-25))
+#define M83xx_TSEC_DMACTL_GRS (1<<(31-27))
+#define M83xx_TSEC_DMACTL_GTS (1<<(31-28))
+#define M83xx_TSEC_DMACTL_WWR (1<<(31-30))
+#define M83xx_TSEC_DMACTL_WOP (1<<(31-31))
+
+/*
+ * TSEC TSTAT bit definitions
+ */
+#define M83xx_TSEC_TSTAT_THLT (1<<(31-0))
+
+ /*
+ * TSEC ECNTRL bit positions
+ */
+#define M83xx_TSEC_ECNTRL_CLRCNT (1 << (31-17)) /* Clear stat counters */
+#define M83xx_TSEC_ECNTRL_AUTOZ (1 << (31-18)) /* auto-zero read counters */
+#define M83xx_TSEC_ECNTRL_STEN (1 << (31-19)) /* enable statistics */
+#define M83xx_TSEC_ECNTRL_TBIM (1 << (31-26)) /* ten-bit-interface */
+#define M83xx_TSEC_ECNTRL_RPM (1 << (31-27)) /* reduced signal mode */
+#define M83xx_TSEC_ECNTRL_R100M (1 << (31-28)) /* RGMII100 mode */
+ /*
+ * TSEC EDIS bit positions
+ */
+#define M83xx_TSEC_EDIS_BSYDIS (1 << (31- 2)) /* Busy disable */
+#define M83xx_TSEC_EDIS_EBERRDIS (1 << (31- 3)) /* bus error disable */
+#define M83xx_TSEC_EDIS_TXEDIS (1 << (31- 9)) /* Tx error disable */
+#define M83xx_TSEC_EDIS_LCDIS (1 << (31-13)) /* Late collision disable */
+#define M83xx_TSEC_EDIS_CRLXDADIS (1 << (31-14)) /* Collision Retry disable */
+#define M83xx_TSEC_EDIS_FUNDIS (1 << (31-15)) /* Tx FIFO underrun disable*/
+
+ /*
+ * TSEC RCTRL bit positions
+ */
+#define M83xx_TSEC_RCTRL_BC_REJ (1 << (31-27)) /* Broadcast Reject */
+#define M83xx_TSEC_RCTRL_PROM (1 << (31-28)) /* Promiscuous */
+#define M83xx_TSEC_RCTRL_RSF (1 << (31-29)) /* Receive short frames */
+
+ /*
+ * TSEC TXIC bit positions
+ */
+#define M83xx_TSEC_TXIC_ICEN (1 << (31- 0)) /* Irq coalescing enable */
+#define M83xx_TSEC_TXIC_ICFCT(n) (((n)&0xff) << (31-10)) /* Frame coal. cnt */
+#define M83xx_TSEC_TXIC_ICTT(n) (((n)&0xffff) << (31-31)) /* Buf. coal. cnt */
+
+ /*
+ * TSEC RXIC bit positions
+ */
+#define M83xx_TSEC_RXIC_ICEN (1 << (31- 0)) /* Irq coalescing enable */
+#define M83xx_TSEC_RXIC_ICFCT(n) (((n)&0xff) << (31-10)) /* Frame coal. cnt */
+#define M83xx_TSEC_RXIC_ICTT(n) (((n)&0xffff) << (31-31)) /* Buf. coal. cnt */
+
+ /*
+ * TSEC MACCFG1 bit positions
+ */
+#define M83xx_TSEC_MACCFG1_SOFTRST (1 << (31- 0)) /* Soft Reset */
+#define M83xx_TSEC_MACCFG1_RES_RXMC (1 << (31-12)) /* Reset Rx MAC block */
+#define M83xx_TSEC_MACCFG1_RES_TXMC (1 << (31-13)) /* Reset Tx MAC block */
+#define M83xx_TSEC_MACCFG1_RES_RXFUN (1 << (31-14)) /* Reset Rx function blk*/
+#define M83xx_TSEC_MACCFG1_RES_TXFUN (1 << (31-15)) /* Reset Tx function blk*/
+#define M83xx_TSEC_MACCFG1_LOOPBACK (1 << (31-23)) /* Loopback mode */
+#define M83xx_TSEC_MACCFG1_RX_FLOW (1 << (31-26)) /* Receive Flow Ctrl */
+#define M83xx_TSEC_MACCFG1_TX_FLOW (1 << (31-27)) /* Transmit Flow Ctrl */
+#define M83xx_TSEC_MACCFG1_SYNVRXEN (1 << (31-28)) /* Sync Receive Enable */
+#define M83xx_TSEC_MACCFG1_RXEN (1 << (31-29)) /* Receive Enable */
+#define M83xx_TSEC_MACCFG1_SYNVTXEN (1 << (31-30)) /* Sync Transmit Enable */
+#define M83xx_TSEC_MACCFG1_TXEN (1 << (31-31)) /* Transmit Enable */
+
+ /*
+ * TSEC MACCFG2 bit positions
+ */
+#define M83xx_TSEC_MACCFG2_PRELEN(n) (((n)&0x0f) << (31-19)) /* Preamble len*/
+
+#define M83xx_TSEC_MACCFG2_IFMODE_MSK (3 << (31-23)) /* mode mask */
+#define M83xx_TSEC_MACCFG2_IFMODE_NIB (1 << (31-23)) /* nibble mode */
+#define M83xx_TSEC_MACCFG2_IFMODE_BYT (2 << (31-23)) /* byte mode */
+
+#define M83xx_TSEC_MACCFG2_HUGE_FRAME (1 << (31-26)) /* Huge Frame */
+#define M83xx_TSEC_MACCFG2_LENGTH_CHK (1 << (31-27)) /* Length Check */
+#define M83xx_TSEC_MACCFG2_PAD_CRC (1 << (31-29)) /* MAC adds PAD/CRC */
+#define M83xx_TSEC_MACCFG2_CRC_EN (1 << (31-30)) /* CRC enable */
+#define M83xx_TSEC_MACCFG2_FULLDUPLEX (1 << (31-31)) /* Full Duplex Mode */
+
+ /*
+ * TSEC MIIMADD bit positions
+ */
+#define M83xx_TSEC_MIIMADD_PHY(n) (((n) & 0x3f)<<(31- 23)) /* PHY addr */
+#define M83xx_TSEC_MIIMADD_REGADDR(n) (((n) & 0x3f)<<(31- 31)) /* PHY addr */
+
+ /*
+ * TSEC MIIMCOM bit positions
+ */
+#define M83xx_TSEC_MIIMCOM_SCAN (1 << (31-30)) /* Scan command */
+#define M83xx_TSEC_MIIMCOM_READ (1 << (31-31)) /* Read command */
+
+ /*
+ * TSEC MIIMIND bit positions
+ */
+#define M83xx_TSEC_MIIMIND_NVAL (1 << (31-29)) /* not valid */
+#define M83xx_TSEC_MIIMIND_SCAN (1 << (31-30)) /* Scan in progress */
+#define M83xx_TSEC_MIIMIND_BUSY (1 << (31-31)) /* Acc. in progress */
+
+ /*
+ * TSEC ATTR bit positions
+ */
+#define M83xx_TSEC_ATTR_RDSEN (1 << (31-24)) /* read data snoop */
+#define M83xx_TSEC_ATTR_RBDSEN (1 << (31-25)) /* read BD snoop */
+
+#if 0 /* FIXME: to be formatted soon */
+ /* Security Engine Address Map Registers */
+ /* Controller Registers */
+ volatile uint32_t reserved;## /* 0x3_0000--0x3_0FFF Reserved, should be cleared */
+ volatile uint32_t imr; /* 0x3_1008 Interrupt mask register R/W 0x0000_0000_0000_0000 14.7.2.1/14-94 */
+ volatile uint32_t isr; /* 0x3_1010 Interrupt status register R 0x0000_0000_0000_0000 14.7.2.2/14-96 */
+ volatile uint32_t icr; /* 0x3_1018 Interrupt clear register W 0x0000_0000_0000_0000 14.7.2.3/14-96 */
+ volatile uint32_t id; /* 0x3_1020 Identification register R 0x0000_0000_0000_00400x 14.7.2.4/14-98 */
+ volatile uint32_t euasr; /* 0x3_1028 EU assignment status register R 0xF0F0_F0F0_00FF_F0F0 14.7.2/14-93 */
+ volatile uint32_t mcr; /* 0x3_1030 Master control register R/W 0000_0000_0000_0000 14.7.2.5/14-98 */
+ /* Channel 1 */
+ volatile uint32_t cccr1; /* 0x3_1108 Crypto-channel 1 configuration register R/W 0x0000_0000_0000_0000 14.6.1.1/14-82 */
+ volatile uint32_t ccpsr1; /* 0x3_1110 Crypto-channel 1 pointer status register R 0x0000_0000_0000_0007 14.6.1.2/14-85 */
+ volatile uint32_t cdpr1; /* 0x3_1140 Crypto-channel 1 current descriptor pointer register R 0x0000_0000_0000_0000 14.6.1.3/14-90 */
+ volatile uint32_t */
+0x3_1180--0x3_11BF
+ DBn /* volatile; uint32_t ff1, /* 0x3_1148 Crypto-channel 1 fetch FIFO address register W 0x0000_0000_0000_0000 14.6.1.4/14-90 Crypto-channel 1 descriptor buffers [0–7] R 0x0000_0000_0000_0000 14.6.1.5/14-91 */
+ /* Channel 2-4: FIXME: same layout as channel 1*/
+ /* Data Encryption Standard Execution Unit (DEU) */
+ volatile uint32_t deumr; /* 0x3_2000 DEU mode register R/W 0x0000_0000_0000_0000 14.5.2.1/14-35 */
+ volatile uint32_t deuksr; /* 0x3_2008 DEU key size register R/W 0x0000_0000_0000_0000 14.5.2.2/14-36 */
+ volatile uint32_t deudsr; /* 0x3_2010 DEU data size register R/W 0x0000_0000_0000_0000 14.5.2.3/14-36 */
+ volatile uint32_t deurcr; /* 0x3_2018 DEU reset control register R/W 0x0000_0000_0000_0000 14.5.2.4/14-37 */
+ volatile uint32_t deusr; /* 0x3_2028 DEU status register R 0x0000_0000_0000_0000 14.5.2.5/14-37 */
+ volatile uint32_t deuisr; /* 0x3_2030 DEU interrupt status register R 0x0000_0000_0000_0000 14.5.2.6/14-38 */
+ volatile uint32_t deuicr; /* 0x3_2038 DEU interrupt control register R/W 0x0000_0000_0000_3000 14.5.2.7/14-40 */
+ volatile uint32_t deueug; /* 0x3_2050 DEU EU-Go register W 0x0000_0000_0000_0000 14.5.2.8/14-41 */
+ volatile uint32_t deuiv; /* 0x3_2100 DEU initialization vector register R/W 0x0000_0000_0000_0000 14.5.2.9/14-42 */
+ volatile uint32_t deuk1; /* 0x3_2400 DEU key 1 register W $ 14.5.2.10/14-42 */
+ volatile uint32_t deuk2; /* 0x3_2408 DEU key 2 register W $ 14.5.2.10/14-42 */
+ volatile uint32_t deuk3; /* 0x3_2410 DEU key 3 register W $ 14.5.2.10/14-42 */
+0x3_2800--0x3_2FFF
+DEU FIFO R/W 0x0000_0000_0000_0000 14.5.2.11/14-42
+ /* Advanced Encryption Standard Execution Unit (AESU) */
+ volatile uint32_t aesumr; /* 0x3_4000 AESU mode register R/W 0x0000_0000_0000_0000 14.5.6.1/14-68 */
+ volatile uint32_t aesuksr; /* 0x3_4008 AESU key size register R/W 0x0000_0000_0000_0000 14.5.6.2/14-71 */
+ volatile uint32_t aesudsr; /* 0x3_4010 AESU data size register R/W 0x0000_0000_0000_0000 14.5.6.3/14-71 */
+ volatile uint32_t aesurcr; /* 0x3_4018 AESU reset control register R/W 0x0000_0000_0000_0000 14.5.6.4/14-72 */
+ volatile uint32_t aesusr; /* 0x3_4028 AESU status register R 0x0000_0000_0000_0000 14.5.6.5/14-73 */
+ volatile uint32_t aesuisr; /* 0x3_4030 AESU interrupt status register R 0x0000_0000_0000_0000 14.5.6.6/14-74 */
+ volatile uint32_t aesuicr; /* 0x3_4038 AESU interrupt control register R/W 0x0000_0000_0000_1000 14.5.6.7/14-75 */
+ volatile uint32_t aesuemr; /* 0x3_4050 AESU end-of-message register W 0x0000_0000_0000_0000 14.5.6.8/14-76 */
+0x3_4100 AESU context memory registers R/W 0x0000_0000_0000_0000 14.5.6.9/14-77
+0x3_4400--0x3_4408
+AESU key memory R/W 0x0000_0000_0000_0000 14.5.6.9.5/14-81
+0x3_4800--0x3_4FFF
+AESU FIFO R/W 0x0000_0000_0000_0000 14.5.6.9.6/14-81
+ /* Message Digest Execution Unit (MDEU) */
+ volatile uint32_t mdeumr; /* 0x3_6000 MDEU mode register R/W 0x0000_0000_0000_0000 14.5.4.1/14-51 */
+ volatile uint32_t mdeuksr; /* 0x3_6008 MDEU key size register R/W 0x0000_0000_0000_0000 14.5.4.3/14-55 */
+ volatile uint32_t mdeudsr; /* 0x3_6010 MDEU data size register R/W 0x0000_0000_0000_0000 14.5.4.4/14-56 */
+ volatile uint32_t mdeurcr; /* 0x3_6018 MDEU reset control register R/W 0x0000_0000_0000_0000 14.5.4.5/14-56 */
+ volatile uint32_t mdeusr; /* 0x3_6028 MDEU status register R 0x0000_0000_0000_0000 14.5.4.6/14-57 */
+ volatile uint32_t mdeuisr; /* 0x3_6030 MDEU interrupt status register R 0x0000_0000_0000_0000 14.5.4.7/14-58 */
+ volatile uint32_t mdeuicr; /* 0x3_6038 MDEU interrupt control register R/W 0x0000_0000_0000_1000 14.5.4.8/14-59 */
+ volatile uint32_t mdeueug; /* 0x3_6050 MDEU EU-Go register W 0x0000_0000_0000_0000 14.5.4.10/14-61 */
+0x3_6100--0x3_6120
+MDEU context memory registers R/W 0x0000_0000_0000_0000 14.5.4.11/14-61
+0x3_6400--0x3_647F
+MDEU key memory W 0x0000_0000_0000_0000 14.5.4.12/14-62
+0x3_6800--0x3_6FFF
+MDEU FIFO W 0x0000_0000_0000_0000 14.5.4.13/14-63
+ /* ARC Four Execution Unit (AFEU) */
+ volatile uint32_t afeumr; /* 0x3_8000 AFEU mode register R/W 0x0000_0000_0000_0000 14.5.3.1/14-43 */
+ volatile uint32_t afeuksr; /* 0x3_8008 AFEU key size register R/W 0x0000_0000_0000_0000 14.5.3.3/14-44 */
+ volatile uint32_t afeudsr; /* 0x3_8010 AFEU data size register R/W 0x0000_0000_0000_0000 14.5.3.4/14-45 */
+ volatile uint32_t afeurcr; /* 0x3_8018 AFEU reset control register R/W 0x0000_0000_0000_0000 14.5.3.5/14-46 */
+ volatile uint32_t afeusr; /* 0x3_8028 AFEU status register R 0x0000_0000_0000_0000 14.5.3.6/14-46 */
+ volatile uint32_t afeuisr; /* 0x3_8030 AFEU interrupt status register R 0x0000_0000_0000_0000 14.5.3.7/14-47 */
+ volatile uint32_t afeuicr; /* 0x3_8038 AFEU interrupt control register R/W 0x0000_0000_0000_1000 14.5.3.8/14-49 */
+ volatile uint32_t afeuemr; /* 0x3_8050 AFEU end of message register W 0x0000_0000_0000_0000 14.5.3.9/14-50 */
+0x3_8100--0x3_81FF
+AFEU context memory registers R/W 0x0000_0000_0000_0000 14.5.3.10.1/14-50
+0x3_8200 AFEU context memory pointers R/W 0x0000_0000_0000_0000 14.5.3.10.2/14-51
+ volatile uint32_t afeuk0; /* 0x3_8400 AFEU key register 0 W $ 14.5.3.11/14-51 */
+ volatile uint32_t afeuk1; /* 0x3_848 AFEU key register 1 W $ 14.5.3.11/14-51 */
+0x3_8800--0x3_8FFF
+AFEU FIFO R/W 0x0000_0000_0000_0000 14.5.3.11.1/14-51
+ /* Random Number Generator (RNG) */
+ volatile uint32_t rngmr; /* 0x3_A000 RNG mode register R/W 0x0000_0000_0000_0000 14.5.5.1/14-63 */
+ volatile uint32_t rngdsr; /* 0x3_A010 RNG data size register R/W 0x0000_0000_0000_0000 14.5.5.2/14-64 */
+ volatile uint32_t rngrcr; /* 0x3_A018 RNG reset control register R/W 0x0000_0000_0000_0000 14.5.5.3/14-65 */
+ volatile uint32_t rngsr; /* 0x3_A028 RNG status register R 0x0000_0000_0000_0000 14.5.5.4/14-65 */
+ volatile uint32_t rngisr; /* 0x3_A030 RNG interrupt status register R 0x0000_0000 */
+_0000_0000
+14.5.5.5/14-66
+ volatile uint32_t rngicr; /* 0x3_A038 RNG interrupt control register R/W 0x0000_0000 */
+_0000_1000
+14.5.5.6/14-67
+ volatile uint32_t rngeug; /* 0x3_A050 RNG EU-Go register W 0x0000_0000 */
+_0000_0000
+14.5.5.7/14-68
+0x3_A800--0x3_AFFF
+RNG FIFO R 0x0000_0000
+_0000_0000
+14.5.5.8/14-68
+ /* Public Key Execution Unit (PKEU) */
+ volatile uint32_t pkeumr; /* 0x3_C000 PKEU mode register R/W 0x0000_0000_0000_0000 14.5.1.1/14-26 */
+ volatile uint32_t pkeuksr; /* 0x3_C008 PKEU key size register R/W 0x0000_0000_0000_0000 14.5.1.2/14-28 */
+ volatile uint32_t pkeudsr; /* 0x3_C010 PKEU data size register R/W 0x0000_0000_0000_0000 14.5.1.3/14-28 */
+ volatile uint32_t pkeurcr; /* 0x3_C018 PKEU reset control register R/W 0x0000_0000_0000_0000 14.5.1.5/14-29 */
+ volatile uint32_t pkeusr; /* 0x3_C028 PKEU status register R 0x0000_0000_0000_0000 14.5.1.6/14-30 */
+ volatile uint32_t pkeuisr; /* 0x3_C030 PKEU interrupt status register R 0x0000_0000_0000_0000 14.5.1.7/14-31 */
+ volatile uint32_t pkeuicr; /* 0x3_C038 PKEU interrupt control register R/W 0x0000_0000_0000_1000 14.5.1.8/14-32 */
+ volatile uint32_t pkeuabs; /* 0x3_C040 PKEU AB size register R/W 0x0000_0000_0000_0000 14.5.1.3/14-28 */
+ volatile uint32_t pkeueug; /* 0x3_C050 PKEU EU-Go W 0x0000_0000_0000_0000 14.5.1.9/14-33 */
+0x3_C200--0x3_C23F
+PKEU parameter memory A0 R/W 0x0000_0000_0000_0000 14.5.1.10/14-34
+0x3_C240--0x3_C27F
+PKEU parameter memory A1 R/W 0x0000_0000_0000_0000
+0x3_C280--0x3_C2BF
+PKEU parameter memory A2 R/W 0x0000_0000_0000_0000
+0x3_C2C0--0x3_C2FF
+PKEU parameter memory A3 R/W 0x0000_0000_0000_0000
+0x3_C300--0x3_C33F
+PKEU parameter memory B0 R/W 0x0000_0000_0000_0000
+0x3_C340--0x3_C37F
+PKEU parameter memory B1 R/W 0x0000_0000_0000_0000
+0x3_C380--0x3_C3BF
+PKEU parameter memory B2 R/W 0x0000_0000_0000_0000
+0x3_C3C0--0x3_C3FF
+PKEU parameter memory B3 R/W 0x0000_0000_0000_0000
+0x3_C400--0x3_C4FF
+PKEU parameter memory E W 0x0000_0000_0000_0000
+0x3_C800--0x3_C8FF
+PKEU parameter memory N R/W 0x0000_0000_0000_0000
+#endif
+
+typedef struct m83xxRegisters_ {
+ m83xxSysConRegisters_t syscon;
+ m83xxWDTRegisters_t wdt;
+ uint8_t reserved0_0210[0x0300-0x0210];
+ m83xxRTCRegisters_t rtc;
+ uint8_t reserved0_0320[0x0400-0x0320];
+ m83xxPITRegisters_t pit;
+ m83xxGTMRegisters_t gtm[M83xxGTModCnt];
+ m83xxIPICRegisters_t ipic;
+ m83xxARBRegisters_t arb;
+ m83xxRESRegisters_t res;
+ m83xxCLKRegisters_t clk;
+ m83xxPMCRegisters_t pmc;
+ m83xxGPIORegisters_t gpio[2];
+ uint8_t reserved0_0E00[0x1000-0x0E00];
+ m83xxDLLRegisters_t dll;
+ uint8_t reserved0_1200[0x2000-0x1200];
+ m83xxDDRRegisters_t ddr;
+ uint8_t reserved0_2F00[0x3000-0x2F00];
+ m83xxI2CRegisters_t i2c[2];
+ uint8_t reserved0_3200[0x4000-0x3200];
+ uint8_t reserved0_4000[0x4500-0x4000];
+ m83xxDUARTRegisters_t duart[2];
+ uint8_t reserved0_4700[0x5000-0x4700];
+ m83xxLBCRegisters_t lbc;
+ uint8_t reserved0_5100[0x7000-0x5100];
+ m83xxSPIRegisters_t spi;
+ uint8_t reserved0_7100[0x8000-0x7100];
+ m83xxDMARegisters_t dma;
+ m83xxPCICfgRegisters_t pcicfg[2];
+ m83xxPCIIosRegisters_t pciios;
+ m83xxPCICtrlRegisters_t pcictrl[2];
+ uint8_t reserved0_8700[0x22000-0x8700];
+ m83xxUSB_MPHRegisters_t usb_mph;
+ m83xxUSB_DRRegisters_t usb_dr;
+ m83xxTSEC_Registers_t tsec[M83xx_TSEC_NIFACES];
+} m83xxRegisters_t;
+
+extern m83xxRegisters_t mpc83xx;
+
+#endif /* !defined ASM */
+/*
+ * some definitions used in assembler startup
+ */
+/*
+ * default address of IMMRBAR
+ */
+#define IMMRBAR_DEFAULT 0xFF400000
+/*
+ * offsets of some registers
+ */
+#define LBLAWBAR0_OFF 0x00020
+#define LBLAWAR0_OFF 0x00024
+#define LBLAWBAR1_OFF 0x00028
+#define LBLAWAR1_OFF 0x0002C
+#define LBLAWBAR2_OFF 0x00030
+#define LBLAWAR2_OFF 0x00034
+#define LBLAWBAR3_OFF 0x00038
+#define LBLAWAR3_OFF 0x0003C
+#define PCILAWBAR0_OFF 0x00060
+#define PCILAWAR0_OFF 0x00064
+#define PCILAWBAR1_OFF 0x00068
+#define PCILAWAR1_OFF 0x0006C
+#define DDRLAWBAR0_OFF 0x000A0
+#define DDRLAWAR0_OFF 0x000A4
+#define DDRLAWBAR1_OFF 0x000A8
+#define DDRLAWAR1_OFF 0x000AC
+
+#define BR0_OFF 0x05000
+#define OR0_OFF 0x05004
+#define BR1_OFF 0x05008
+#define OR1_OFF 0x0500C
+#define BR2_OFF 0x05010
+#define OR2_OFF 0x05014
+#define BR3_OFF 0x05018
+#define OR3_OFF 0x0501C
+#define BR4_OFF 0x05020
+#define OR4_OFF 0x05024
+#define BR5_OFF 0x05028
+#define OR5_OFF 0x0502C
+#define BR6_OFF 0x05030
+#define OR6_OFF 0x05034
+#define BR7_OFF 0x05038
+#define OR7_OFF 0x0503C
+
+#define CS0_BNDS_OFF 0x02000
+#define CS1_BNDS_OFF 0x02008
+#define CS2_BNDS_OFF 0x02010
+#define CS3_BNDS_OFF 0x02018
+#define CS0_CONFIG_OFF 0x02080
+#define CS1_CONFIG_OFF 0x02084
+#define CS2_CONFIG_OFF 0x02088
+#define CS3_CONFIG_OFF 0x0208C
+#define TIMING_CFG_3_OFF 0x02100
+#define TIMING_CFG_0_OFF 0x02104
+#define TIMING_CFG_1_OFF 0x02108
+#define TIMING_CFG_2_OFF 0x0210C
+#define DDR_SDRAM_CFG_OFF 0x02110
+#define DDR_SDRAM_CFG_2_OFF 0x02114
+#define DDR_SDRAM_MODE_OFF 0x02118
+#define DDR_SDRAM_MODE_2_OFF 0x0211C
+#define DDR_SDRAM_MD_CNTL_OFF 0x02120
+#define DDR_SDRAM_MD_ITVL_OFF 0x02124
+#define DDR_SDRAM_CLK_CNTL_OFF 0x02130
+#define DDR_SDRAM_INIT_ADDR_OFF 0x02148
+
+#if !defined(ASM)
+typedef struct PQ_BufferDescriptor_ {
+ volatile uint16_t status;
+ volatile uint16_t length;
+ volatile void *buffer;
+} PQBufferDescriptor_t;
+#endif
+
+/*
+ * Bits in receive buffer descriptor status word
+ */
+#define M83xx_BD_EMPTY (1<<15)
+#define M83xx_BD_RO1 (1<<14)
+#define M83xx_BD_WRAP (1<<13)
+#define M83xx_BD_INTERRUPT (1<<12)
+#define M83xx_BD_LAST (1<<11)
+#define M83xx_BD_CONTROL_CHAR (1<<11)
+#define M83xx_BD_FIRST_IN_FRAME (1<<10)
+#define M83xx_BD_MISS (1<<8)
+#define M83xx_BD_BROADCAST (1<<7)
+#define M83xx_BD_MULTICAST (1<<6)
+#define M83xx_BD_LONG (1<<5)
+#define M83xx_BD_NONALIGNED (1<<4)
+#define M83xx_BD_SHORT (1<<3)
+#define M83xx_BD_CRC_ERROR (1<<2)
+#define M83xx_BD_OVERRUN (1<<1)
+#define M83xx_BD_COLLISION (1<<0)
+
+/*
+ * Bits in transmit buffer descriptor status word
+ * Many bits have the same meaning as those in receiver buffer descriptors.
+ */
+#define M83xx_BD_READY (1<<15)
+#define M83xx_BD_PAD_CRC (1<<14)
+/* WRAP/Interrupt as in Rx BDs */
+#define M83xx_BD_TX_CRC (1<<10)
+#define M83xx_BD_DEFER (1<<9)
+#define M83xx_BD_TO1 (1<<8)
+#define M83xx_BD_HFE_ (1<<7)
+#define M83xx_BD_LATE_COLLISION (1<<7)
+#define M83xx_BD_RETRY_LIMIT (1<<6)
+#define M83xx_BD_RETRY_COUNT(x) (((x)&0x3C)>>2)
+#define M83xx_BD_UNDERRUN (1<<1)
+#define M83xx_BD_TXTRUNC (1<<0)
+
+#endif /* _MPC83XX_MPC83XX_H */
diff --git a/c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.c b/c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.c
new file mode 100644
index 0000000000..bccc05c651
--- /dev/null
+++ b/c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.c
@@ -0,0 +1,1930 @@
+/*===============================================================*\
+| Project: RTEMS support for MPC83xx |
++-----------------------------------------------------------------+
+| Copyright (c) 2007 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file contains the MPC83xx TSEC networking driver |
+\*===============================================================*/
+/*
+ * this driver has the following HW assumptions:
+ * - PHY for TSEC1 uses address 0
+ * - PHY for TSEC2 uses address 1
+ * - PHY uses GMII for 1000Base-T and MII for the rest of the modes
+ */
+#include <stdlib.h>
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <mpc83xx/mpc83xx.h>
+#include <mpc83xx/tsec.h>
+#include <rtems/error.h>
+#include <rtems/bspIo.h>
+#include <rtems/rtems_bsdnet.h>
+#include <rtems/rtems_mii_ioctl.h>
+#include <errno.h>
+
+#include <sys/param.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+#include <sys/mbuf.h>
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <netinet/in.h>
+#include <netinet/if_ether.h>
+#include <stdio.h>
+
+#define CLREVENT_IN_IRQ
+
+#define TSEC_WATCHDOG_TIMEOUT 5 /* check media every 5 seconds */
+
+/*
+ * Device data
+ */
+struct mpc83xx_tsec_struct {
+ struct arpcom arpcom;
+ int acceptBroadcast;
+
+ /*
+ * HW links: (filled from rtems_bsdnet_ifconfig
+ */
+ m83xxTSEC_Registers_t *reg_ptr; /* pointer to TSEC register block */
+ int irq_num_tx; /* tx irq number */
+ int irq_num_rx; /* rx irq number */
+ int irq_num_err; /* error irq number */
+
+ /*
+ * BD management
+ */
+ int rxBdCount;
+ int txBdCount;
+ PQBufferDescriptor_t *Rx_Frst_BD;
+ PQBufferDescriptor_t *Rx_Last_BD;
+ PQBufferDescriptor_t *Rx_NxtUsed_BD; /* First BD, which is in Use */
+ PQBufferDescriptor_t *Rx_NxtFill_BD; /* BD to be filled next */
+ struct mbuf **Rx_mBuf_Ptr; /* Storage for mbufs */
+
+ PQBufferDescriptor_t *Tx_Frst_BD;
+ PQBufferDescriptor_t *Tx_Last_BD;
+ PQBufferDescriptor_t *Tx_NxtUsed_BD; /* First BD, which is in Use */
+ PQBufferDescriptor_t *Tx_NxtFill_BD; /* BD to be filled next */
+ struct mbuf **Tx_mBuf_Ptr; /* Storage for mbufs */
+ /*
+ * Daemon IDs
+ */
+ rtems_id rxDaemonTid;
+ rtems_id txDaemonTid;
+
+ /*
+ * MDIO/Phy info
+ */
+ struct rtems_mdio_info mdio_info;
+ int phy_default;
+ int media_state; /* (last detected) state of media */
+ /*
+ * statistic counters Rx
+ */
+ unsigned long rxInterrupts;
+ unsigned long rxNotLast;
+ unsigned long rxGiant;
+ unsigned long rxNonOctet;
+ unsigned long rxBadCRC;
+ unsigned long rxOverrun;
+ unsigned long rxCollision;
+
+ /*
+ * statistic counters Tx
+ */
+ unsigned long txInterrupts;
+ unsigned long txDeferred;
+ unsigned long txLateCollision;
+ unsigned long txUnderrun;
+ unsigned long txMisaligned;
+ unsigned long rxNotFirst;
+ unsigned long txRetryLimit;
+ };
+
+static struct mpc83xx_tsec_struct tsec_driver[M83xx_TSEC_NIFACES];
+
+/*
+ * default numbers for buffers
+ */
+#define RX_BUF_COUNT 64
+#define TX_BUF_COUNT 64
+
+/*
+ * mask for all Tx interrupts
+ */
+#define M83xx_IEVENT_TXALL (M83xx_TSEC_IEVENT_GTSC \
+ | M83xx_TSEC_IEVENT_TXC \
+ | M83xx_TSEC_IEVENT_TXB \
+ | M83xx_TSEC_IEVENT_TXF )
+
+/*
+ * mask for all Rx interrupts
+ */
+#define M83xx_IEVENT_RXALL (M83xx_TSEC_IEVENT_RXC \
+ | M83xx_TSEC_IEVENT_RXB \
+ | M83xx_TSEC_IEVENT_GRSC \
+ | M83xx_TSEC_IEVENT_RXF )
+
+/*
+ * mask for all Error interrupts
+ */
+#define M83xx_IEVENT_ERRALL (M83xx_TSEC_IEVENT_BABR \
+ | M83xx_TSEC_IEVENT_BSY \
+ | M83xx_TSEC_IEVENT_EBERR \
+ | M83xx_TSEC_IEVENT_MSRO \
+ | M83xx_TSEC_IEVENT_BABT \
+ | M83xx_TSEC_IEVENT_TXE \
+ | M83xx_TSEC_IEVENT_LC \
+ | M83xx_TSEC_IEVENT_CRL_XDA \
+ | M83xx_TSEC_IEVENT_XFUN )
+
+#define M83xx_TSEC_IMASK_SET(reg,mask,val) { \
+ rtems_interrupt_level level; \
+ \
+ rtems_interrupt_disable(level); \
+ (reg) = (((reg) & ~(mask)) | \
+ ((val) & (mask))); \
+ rtems_interrupt_enable(level); \
+}
+
+#define M83xx_TSEC_ALIGN_BUFFER(buf,align) \
+ ((void *)( (((uint32_t)(buf))+(align)-1) \
+ -(((uint32_t)(buf))+(align)-1)%align))
+
+/*
+ * RTEMS event used by interrupt handler to signal daemons.
+ * This must *not* be the same event used by the TCP/IP task synchronization.
+ */
+#define INTERRUPT_EVENT RTEMS_EVENT_1
+#define FATAL_INT_EVENT RTEMS_EVENT_3
+
+/*
+ * RTEMS event used to start transmit daemon.
+ * This must not be the same as INTERRUPT_EVENT.
+ */
+#define START_TRANSMIT_EVENT RTEMS_EVENT_2
+
+static int mpc83xx_tsec_ioctl
+(
+ struct ifnet *ifp, /* interface information */
+ ioctl_command_t command, /* ioctl command code */
+ caddr_t data /* optional data */
+ );
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_hwinit
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| initialize hardware register |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc /* control structure */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ m83xxTSEC_Registers_t *reg_ptr = sc->reg_ptr; /* pointer to TSEC registers*/
+ uint8_t *mac_addr;
+ int i;
+
+ /*
+ * init ECNTL register
+ * - clear statistics counters
+ * - enable statistics
+ * NOTE: do not clear bits set in BSP init function
+ */
+ reg_ptr->ecntrl = ((reg_ptr->ecntrl & ~M83xx_TSEC_ECNTRL_AUTOZ)
+ | M83xx_TSEC_ECNTRL_CLRCNT
+ | M83xx_TSEC_ECNTRL_STEN);
+
+ /*
+ * init DMA control register:
+ * - enable snooping
+ * - write BD status before interrupt request
+ * - do not poll TxBD, but wait for TSTAT[THLT] to be written
+ */
+ reg_ptr->dmactrl = (M83xx_TSEC_DMACTL_TDSEN
+ | M83xx_TSEC_DMACTL_TBDSEN
+ | M83xx_TSEC_DMACTL_WWR
+ | M83xx_TSEC_DMACTL_WOP);
+
+ /*
+ * init Attribute register:
+ * - enable read snooping for data and BD
+ */
+ reg_ptr->attr = (M83xx_TSEC_ATTR_RDSEN
+ | M83xx_TSEC_ATTR_RBDSEN);
+
+
+ reg_ptr->mrblr = MCLBYTES-64; /* take care of buffer size lost
+ * due to alignment */
+
+ /*
+ * init EDIS register: enable all error reportings
+ * FIXME: make sure we handle these errors correctly
+ */
+ reg_ptr->edis = 0;
+ /*
+ * init minimum frame length register
+ */
+ reg_ptr->minflr = 64;
+ /*
+ * init maximum frame length register
+ */
+ reg_ptr->maxfrm = 1536;
+ /*
+ * define physical address of TBI
+ */
+ reg_ptr->tbipa = 0x1e;
+ /*
+ * init transmit interrupt coalescing register
+ */
+ reg_ptr->txic = (M83xx_TSEC_TXIC_ICEN
+ | M83xx_TSEC_TXIC_ICFCT(16)
+ | M83xx_TSEC_TXIC_ICTT(16));
+ /*
+ * init receive interrupt coalescing register
+ */
+ reg_ptr->rxic = (M83xx_TSEC_RXIC_ICEN
+ | M83xx_TSEC_RXIC_ICFCT(16)
+ | M83xx_TSEC_RXIC_ICTT(16));
+ /*
+ * init MACCFG1 register
+ */
+ reg_ptr->maccfg1 = (M83xx_TSEC_MACCFG1_RX_FLOW
+ | M83xx_TSEC_MACCFG1_TX_FLOW);
+
+ /*
+ * init MACCFG2 register
+ */
+ reg_ptr->maccfg2 = ((reg_ptr->maccfg2 & M83xx_TSEC_MACCFG2_IFMODE_MSK)
+ | M83xx_TSEC_MACCFG2_PRELEN(7)
+ | M83xx_TSEC_MACCFG2_FULLDUPLEX);
+
+ /*
+ * init station address register
+ */
+ mac_addr = sc->arpcom.ac_enaddr;
+
+ reg_ptr->macstnaddr[0] = ((mac_addr[5] << 24)
+ | (mac_addr[4] << 16)
+ | (mac_addr[3] << 8)
+ | (mac_addr[2] << 0));
+ reg_ptr->macstnaddr[1] = ((mac_addr[1] << 24)
+ | (mac_addr[0] << 16));
+ /*
+ * clear hash filters
+ */
+ for (i = 0;
+ i < sizeof(reg_ptr->iaddr)/sizeof(reg_ptr->iaddr[0]);
+ i++) {
+ reg_ptr->iaddr[i] = 0;
+ }
+ for (i = 0;
+ i < sizeof(reg_ptr->gaddr)/sizeof(reg_ptr->gaddr[0]);
+ i++) {
+ reg_ptr->gaddr[i] = 0;
+ }
+}
+
+/***************************************************************************\
+| MII Management access functions |
+\***************************************************************************/
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_mdio_init
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| initialize the MIIM interface |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc /* control structure */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ /*
+ * set clock divider
+ */
+ sc->reg_ptr->miimcfg = 3;
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+int mpc83xx_tsec_mdio_read
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| read register of a phy |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ int phy, /* PHY number to access or -1 */
+ void *uarg, /* unit argument */
+ unsigned reg, /* register address */
+ uint32_t *pval /* ptr to read buffer */
+ )
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| 0, if ok, else error |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc = uarg;/* control structure */
+ m83xxTSEC_Registers_t *reg_ptr; /* pointer to TSEC registers */
+
+ reg_ptr = sc->reg_ptr;
+
+ /*
+ * make sure we work with a valid phy
+ */
+ if (phy == -1) {
+ /*
+ * set default phy number: 0 for TSEC1, 1 for TSEC2
+ */
+ phy = sc->phy_default;
+ }
+ if ( (phy < 0) || (phy > 31)) {
+ /*
+ * invalid phy number
+ */
+ return EINVAL;
+ }
+ /*
+ * set PHY/reg address
+ */
+ reg_ptr->miimadd = (M83xx_TSEC_MIIMADD_PHY(phy)
+ | M83xx_TSEC_MIIMADD_REGADDR(reg));
+ /*
+ * start read cycle
+ */
+ reg_ptr->miimcom = 0;
+ reg_ptr->miimcom = M83xx_TSEC_MIIMCOM_READ;
+
+ /*
+ * wait for cycle to terminate
+ */
+ do {
+ rtems_task_wake_after(2);
+ } while (0 != (reg_ptr->miimind & M83xx_TSEC_MIIMIND_BUSY));
+ reg_ptr->miimcom = 0;
+ /*
+ * fetch read data, if available
+ */
+ if (pval != NULL) {
+ *pval = reg_ptr->miimstat;
+ }
+ return 0;
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+int mpc83xx_tsec_mdio_write
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| write register of a phy |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ int phy, /* PHY number to access or -1 */
+ void *uarg, /* unit argument */
+ unsigned reg, /* register address */
+ uint32_t val /* write value */
+ )
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| 0, if ok, else error |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc = uarg;/* control structure */
+ m83xxTSEC_Registers_t *reg_ptr; /* pointer to TSEC registers */
+
+ reg_ptr = sc->reg_ptr;
+
+ /*
+ * make sure we work with a valid phy
+ */
+ if (phy == -1) {
+ /*
+ * set default phy number: 0 for TSEC1, 1 for TSEC2
+ */
+ phy = sc->phy_default;
+ }
+ if ( (phy < 0) || (phy > 31)) {
+ /*
+ * invalid phy number
+ */
+ return EINVAL;
+ }
+ /*
+ * set PHY/reg address
+ */
+ reg_ptr->miimadd = (M83xx_TSEC_MIIMADD_PHY(phy)
+ | M83xx_TSEC_MIIMADD_REGADDR(reg));
+ /*
+ * start write cycle
+ */
+ reg_ptr->miimcon = val;
+
+ /*
+ * wait for cycle to terminate
+ */
+ do {
+ rtems_task_wake_after(2);
+ } while (0 != (reg_ptr->miimind & M83xx_TSEC_MIIMIND_BUSY));
+ reg_ptr->miimcom = 0;
+ return 0;
+}
+
+
+/***************************************************************************\
+| RX receive functions |
+\***************************************************************************/
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static rtems_event_set mpc83xx_tsec_rx_wait_for_events
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| handle all rx events |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc, /* control structure */
+ rtems_event_set event_mask /* events to wait for */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| event set received |
+\*=========================================================================*/
+{
+ rtems_event_set events; /* events received */
+ /*
+ * enable Rx interrupts, make sure this is not interrupted :-)
+ */
+ M83xx_TSEC_IMASK_SET(sc->reg_ptr->imask,M83xx_IEVENT_RXALL,~0);
+
+ /*
+ * wait for events to come in
+ */
+ rtems_bsdnet_event_receive(event_mask,
+ RTEMS_EVENT_ANY | RTEMS_WAIT,
+ RTEMS_NO_TIMEOUT,
+ &events);
+ return events;
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_rxbd_alloc_clear
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| allocate space for Rx BDs, clear them |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc /* control structure */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ char *alloc_ptr;
+ PQBufferDescriptor_t *BD_ptr;
+ /*
+ * allocate proper space for Rx BDs
+ */
+ alloc_ptr = calloc((sc->rxBdCount+1),sizeof(PQBufferDescriptor_t));
+ if (alloc_ptr == NULL) {
+ rtems_panic("TSEC: cannot allocate space for Rx BDs");
+ }
+ alloc_ptr = (void *)((uint32_t )((alloc_ptr + (sizeof(PQBufferDescriptor_t)-1)))
+ & ~(sizeof(PQBufferDescriptor_t)-1));
+ /*
+ * store pointers to certain positions in BD chain
+ */
+ sc->Rx_Last_BD = ((PQBufferDescriptor_t *)alloc_ptr)+sc->rxBdCount-1;
+ sc->Rx_Frst_BD = (PQBufferDescriptor_t *)alloc_ptr;
+ sc->Rx_NxtUsed_BD = sc->Rx_Frst_BD;
+ sc->Rx_NxtFill_BD = sc->Rx_Frst_BD;
+
+ /*
+ * clear all BDs
+ */
+ for (BD_ptr = sc->Rx_Frst_BD;
+ BD_ptr <= sc->Rx_Last_BD;
+ BD_ptr++) {
+ BD_ptr->status = 0;
+ }
+ /*
+ * Init BD chain registers
+ */
+ sc->reg_ptr->rbase = (uint32_t) (sc->Rx_Frst_BD);
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_receive_packets
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| process any received packets |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc /* control structure */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ PQBufferDescriptor_t *BD_ptr;
+ struct mbuf *m,*n;
+ boolean finished = FALSE;
+ uint16_t status;
+ struct ether_header *eh;
+ int bd_idx;
+
+ BD_ptr = sc->Rx_NxtUsed_BD;
+
+ while ((0 == ((status = BD_ptr->status) & M83xx_BD_EMPTY)) &&
+ !finished &&
+ (BD_ptr->buffer != NULL)) {
+ /*
+ * get mbuf associated with BD
+ */
+ bd_idx = BD_ptr - sc->Rx_Frst_BD;
+ m = sc->Rx_mBuf_Ptr[bd_idx];
+ sc->Rx_mBuf_Ptr[bd_idx] = NULL;
+
+ /*
+ * Check that packet is valid
+ */
+ if ((status & (M83xx_BD_LAST |
+ M83xx_BD_FIRST_IN_FRAME |
+ M83xx_BD_LONG |
+ M83xx_BD_NONALIGNED |
+ M83xx_BD_CRC_ERROR |
+ M83xx_BD_OVERRUN ))
+ == (M83xx_BD_LAST |
+ M83xx_BD_FIRST_IN_FRAME ) ) {
+ /*
+ * send mbuf of this buffer to ether_input()
+ */
+ m->m_len = m->m_pkthdr.len = (BD_ptr->length
+ - sizeof(uint32_t)
+ - sizeof(struct ether_header));
+ eh = mtod(m, struct ether_header *);
+ m->m_data += sizeof(struct ether_header);
+ ether_input(&sc->arpcom.ac_if,eh,m);
+ }
+ else {
+ /*
+ * throw away mbuf
+ */
+ MFREE(m,n);
+ /*
+ * update statistics
+ */
+ if (0 != (status & M83xx_BD_LAST))
+ sc->rxNotLast++;
+ if (0 != (status & M83xx_BD_FIRST_IN_FRAME))
+ sc->rxNotFirst++;
+
+ if (0 == (status & M83xx_BD_LONG)) {
+ sc->rxGiant++;
+ }
+ if (0 == (status & M83xx_BD_NONALIGNED)) {
+ sc->rxNonOctet++;
+ }
+ if (0 == (status & M83xx_BD_CRC_ERROR)) {
+ sc->rxBadCRC++;
+ }
+ if (0 == (status & M83xx_BD_OVERRUN)) {
+ sc->rxOverrun++;
+ }
+ }
+ /*
+ * mark buffer as non-allocated (for refill)
+ */
+ BD_ptr->buffer = NULL;
+ /*
+ * Advance BD_ptr to next BD
+ */
+ BD_ptr = ((BD_ptr == sc->Rx_Last_BD)
+ ? sc->Rx_Frst_BD
+ : BD_ptr+1);
+ }
+ sc->Rx_NxtUsed_BD = BD_ptr;
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_refill_rxbds
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| link new buffers to rx BDs |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc /* control structure */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ PQBufferDescriptor_t *BD_ptr;
+ struct mbuf *m,*n;
+ boolean finished = FALSE;
+ int bd_idx;
+
+ BD_ptr = sc->Rx_NxtFill_BD;
+ while ((BD_ptr->buffer == NULL) &&
+ !finished) {
+ /*
+ * get new mbuf and attach a cluster
+ */
+ MGETHDR(m,M_DONTWAIT,MT_DATA);
+ if (m != NULL) {
+ MCLGET(m,M_DONTWAIT);
+ if ((m->m_flags & M_EXT) == 0) {
+ MFREE(m,n);
+ m = NULL;
+ }
+ }
+ if (m == NULL) {
+ finished = TRUE;
+ }
+ else {
+ bd_idx = BD_ptr - sc->Rx_Frst_BD;
+ sc->Rx_mBuf_Ptr[bd_idx] = m;
+
+ m->m_pkthdr.rcvif= &sc->arpcom.ac_if;
+ m->m_data = M83xx_TSEC_ALIGN_BUFFER(m->m_ext.ext_buf,64);
+ BD_ptr->buffer = m->m_data;
+ BD_ptr->length = 0;
+ BD_ptr->status = (M83xx_BD_EMPTY
+ | M83xx_BD_INTERRUPT
+ | ((BD_ptr == sc->Rx_Last_BD)
+ ? M83xx_BD_WRAP
+ : 0));
+ /*
+ * Advance BD_ptr to next BD
+ */
+ BD_ptr = ((BD_ptr == sc->Rx_Last_BD)
+ ? sc->Rx_Frst_BD
+ : BD_ptr+1);
+ }
+ }
+ sc->Rx_NxtFill_BD = BD_ptr;
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_rxDaemon
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| handle all rx buffers and events |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ void * arg /* argument, is sc structure ptr */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc =
+ (struct mpc83xx_tsec_struct *)arg;
+ int finished = FALSE;
+ rtems_event_set events;
+#if !defined(CLREVENT_IN_IRQ)
+ uint32_t irq_events;
+#endif
+ /*
+ * enable Rx in MACCFG1 register
+ */
+ sc->reg_ptr->maccfg1 |= M83xx_TSEC_MACCFG1_RXEN;
+ while (!finished) {
+ /*
+ * fetch MBufs, associate them to RxBDs
+ */
+ mpc83xx_tsec_refill_rxbds(sc);
+ /*
+ * wait for events to come in
+ */
+ events = mpc83xx_tsec_rx_wait_for_events(sc,INTERRUPT_EVENT);
+#if !defined(CLREVENT_IN_IRQ)
+ /*
+ * clear any pending RX events
+ */
+ irq_events = sc->reg_ptr->ievent & M83xx_IEVENT_RXALL;
+ sc->reg_ptr->ievent = irq_events;
+#endif
+ /*
+ * fetch any completed buffers/packets received
+ * and stuff them into the TCP/IP Stack
+ */
+ mpc83xx_tsec_receive_packets(sc);
+ }
+ /*
+ * disable Rx in MACCFG1 register
+ */
+ sc->reg_ptr->maccfg1 &= ~M83xx_TSEC_MACCFG1_RXEN;
+ /*
+ * terminate daemon
+ */
+ sc->rxDaemonTid = 0;
+ rtems_task_delete(RTEMS_SELF);
+}
+
+/***************************************************************************\
+| TX Transmit functions |
+\***************************************************************************/
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_txbd_alloc_clear
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| allocate space for Tx BDs, clear them |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc /* control structure */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ char *alloc_ptr;
+ PQBufferDescriptor_t *BD_ptr;
+ /*
+ * allocate proper space for Tx BDs
+ */
+ alloc_ptr = calloc((sc->txBdCount+1),sizeof(PQBufferDescriptor_t));
+ if (alloc_ptr == NULL) {
+ rtems_panic("TSEC: cannot allocate space for Tx BDs");
+ }
+ alloc_ptr = (void *)((uint32_t )((alloc_ptr + (sizeof(PQBufferDescriptor_t)-1)))
+ & ~(sizeof(PQBufferDescriptor_t)-1));
+ /*
+ * store pointers to certain positions in BD chain
+ */
+ sc->Tx_Last_BD = ((PQBufferDescriptor_t *)alloc_ptr)+sc->txBdCount-1;
+ sc->Tx_Frst_BD = (PQBufferDescriptor_t *)alloc_ptr;
+ sc->Tx_NxtUsed_BD = sc->Tx_Frst_BD;
+ sc->Tx_NxtFill_BD = sc->Tx_Frst_BD;
+
+ /*
+ * clear all BDs
+ */
+ for (BD_ptr = sc->Tx_Frst_BD;
+ BD_ptr <= sc->Tx_Last_BD;
+ BD_ptr++) {
+ BD_ptr->status = 0;
+ }
+ /*
+ * Init BD chain registers
+ */
+ sc->reg_ptr->tbase = (uint32_t)(sc->Tx_Frst_BD);
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+void mpc83xx_tsec_tx_start
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| start transmission |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+struct ifnet *ifp
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc = ifp->if_softc;
+
+ ifp->if_flags |= IFF_OACTIVE;
+
+ rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static rtems_event_set mpc83xx_tsec_tx_wait_for_events
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| handle all tx events |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc, /* control structure */
+ rtems_event_set event_mask /* events to wait for */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| event set received |
+\*=========================================================================*/
+{
+ rtems_event_set events; /* events received */
+ /*
+ * enable Tx interrupts, make sure this is not interrupted :-)
+ */
+ M83xx_TSEC_IMASK_SET(sc->reg_ptr->imask,M83xx_IEVENT_TXALL,~0);
+
+ /*
+ * wait for events to come in
+ */
+ rtems_bsdnet_event_receive(event_mask,
+ RTEMS_EVENT_ANY | RTEMS_WAIT,
+ RTEMS_NO_TIMEOUT,
+ &events);
+ return events;
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_tx_retire
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| handle all tx events |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc /* control structure */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ PQBufferDescriptor_t *RetBD;
+ RetBD = sc->Tx_NxtUsed_BD;
+ int bd_idx;
+ struct mbuf *m,*n;
+ /*
+ * check next BDs to be empty
+ */
+ while ((RetBD->buffer != NULL) /* BD is filled */
+ && (0 == (RetBD->status & M83xx_BD_READY ))) {/* BD no longer ready*/
+
+ bd_idx = RetBD - sc->Tx_Frst_BD;
+ m = sc->Tx_mBuf_Ptr[bd_idx];
+ sc->Tx_mBuf_Ptr[bd_idx] = NULL;
+
+ MFREE(m,n);
+ RetBD->buffer = NULL;
+ /*
+ * Advance CurrBD to next BD
+ */
+ RetBD = ((RetBD == sc->Tx_Last_BD)
+ ? sc->Tx_Frst_BD
+ : RetBD+1);
+ }
+ sc->Tx_NxtUsed_BD = RetBD;
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_sendpacket
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| handle all tx events |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc, /* control structure */
+ struct mbuf *m /* start of packet to send */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ PQBufferDescriptor_t *FrstBD = NULL;
+ PQBufferDescriptor_t *CurrBD;
+ uint16_t status;
+ struct mbuf *l = NULL; /* ptr to last non-freed (non-empty) mbuf */
+ int bd_idx;
+ /*
+ * get next Tx BD
+ */
+ CurrBD = sc->Tx_NxtFill_BD;
+ while (m) {
+ if(m->m_len == 0) {
+ /*
+ * Just toss empty mbufs
+ */
+ struct mbuf *n;
+ MFREE(m, n);
+ m = n;
+ if(l != NULL) {
+ l->m_next = m;
+ }
+ }
+ else {
+ /*
+ * this mbuf is non-empty, so send it
+ */
+ /*
+ * Is CurrBD still in Use/not yet retired?
+ */
+ while (CurrBD->buffer != NULL) {
+ /*
+ * Then try to retire it
+ * and to return its mbuf
+ */
+ mpc83xx_tsec_tx_retire(sc);
+ if (CurrBD->buffer != NULL) {
+ /*
+ * Wait for anything to happen...
+ */
+ mpc83xx_tsec_tx_wait_for_events(sc,INTERRUPT_EVENT);
+ }
+ }
+ status = ((M83xx_BD_PAD_CRC | M83xx_BD_TX_CRC)
+ | ((m->m_next == NULL)
+ ? M83xx_BD_LAST | M83xx_BD_INTERRUPT
+ : 0)
+ | ((CurrBD == sc->Tx_Last_BD) ? M83xx_BD_WRAP : 0));
+
+ /*
+ * link buffer to BD
+ */
+ CurrBD->buffer = mtod(m, void *);
+ CurrBD->length = (uint32_t)m->m_len;
+ l = m; /* remember: we use this mbuf */
+
+ bd_idx = CurrBD - sc->Tx_Frst_BD;
+ sc->Tx_mBuf_Ptr[bd_idx] = m;
+
+ m = m->m_next; /* advance to next mbuf of this packet */
+ /*
+ * is this the first BD of the packet?
+ * then don't set it to "READY" state,
+ * and remember this BD position
+ */
+ if (FrstBD == NULL) {
+ FrstBD = CurrBD;
+ }
+ else {
+ status |= M83xx_BD_READY;
+ }
+ CurrBD->status = status;
+ /*
+ * Advance CurrBD to next BD
+ */
+ CurrBD = ((CurrBD == sc->Tx_Last_BD)
+ ? sc->Tx_Frst_BD
+ : CurrBD+1);
+ }
+ }
+ /*
+ * mbuf chain of this packet
+ * has been translated
+ * to BD chain, so set first BD ready now
+ */
+ if (FrstBD != NULL) {
+ FrstBD->status |= M83xx_BD_READY;
+ }
+ sc->Tx_NxtFill_BD = CurrBD;
+ /*
+ * wake up transmitter (clear TSTAT[THLT])
+ */
+ sc->reg_ptr->tstat = M83xx_TSEC_TSTAT_THLT;
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_txDaemon
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| handle all tx events |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ void * arg /* argument, is sc structure ptr */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc =
+ (struct mpc83xx_tsec_struct *)arg;
+ struct ifnet *ifp = &sc->arpcom.ac_if;
+ struct mbuf *m;
+ int finished = FALSE;
+ rtems_event_set events;
+#if !defined(CLREVENT_IN_IRQ)
+ uint32_t irq_events;
+#endif
+
+ /*
+ * enable Tx in MACCFG1 register
+ * FIXME: make this irq save
+ */
+ sc->reg_ptr->maccfg1 |= M83xx_TSEC_MACCFG1_TXEN;
+ while (!finished) {
+ /*
+ * wait for events to come in
+ */
+ events = mpc83xx_tsec_tx_wait_for_events(sc,
+ START_TRANSMIT_EVENT
+ | INTERRUPT_EVENT);
+#if !defined(CLREVENT_IN_IRQ)
+ /*
+ * clear any pending TX events
+ */
+ irq_events = sc->reg_ptr->ievent & M83xx_IEVENT_TXALL;
+ sc->reg_ptr->ievent = irq_events;
+#endif
+ /*
+ * retire any sent tx BDs
+ */
+ mpc83xx_tsec_tx_retire(sc);
+ /*
+ * Send packets till queue is empty
+ */
+ do {
+ /*
+ * Get the next mbuf chain to transmit.
+ */
+ IF_DEQUEUE(&ifp->if_snd, m);
+
+ if (m) {
+ mpc83xx_tsec_sendpacket(sc,m);
+ }
+ } while (m != NULL);
+
+ ifp->if_flags &= ~IFF_OACTIVE;
+ }
+ /*
+ * disable Tx in MACCFG1 register
+ */
+ sc->reg_ptr->maccfg1 &= ~M83xx_TSEC_MACCFG1_TXEN;
+ /*
+ * terminate daemon
+ */
+ sc->txDaemonTid = 0;
+ rtems_task_delete(RTEMS_SELF);
+}
+
+/***************************************************************************\
+| Interrupt handlers and management routines |
+\***************************************************************************/
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_tx_irq_handler
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| handle tx interrupts |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ rtems_irq_hdl_param handle /* handle, is sc structure ptr */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc =
+ (struct mpc83xx_tsec_struct *)handle;
+#if defined(CLREVENT_IN_IRQ)
+ uint32_t irq_events;
+#endif
+
+ sc->txInterrupts++;
+ /*
+ * disable tx interrupts
+ */
+ M83xx_TSEC_IMASK_SET(sc->reg_ptr->imask,M83xx_IEVENT_TXALL,0);
+
+#if defined(CLREVENT_IN_IRQ)
+ /*
+ * clear any pending TX events
+ */
+ irq_events = sc->reg_ptr->ievent & M83xx_IEVENT_TXALL;
+ sc->reg_ptr->ievent = irq_events;
+#endif
+ /*
+ * wake up tx Daemon
+ */
+ rtems_event_send(sc->txDaemonTid, INTERRUPT_EVENT);
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_rx_irq_handler
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| handle rx interrupts |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ rtems_irq_hdl_param handle /* handle, is sc structure */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc =
+ (struct mpc83xx_tsec_struct *)handle;
+#if defined(CLREVENT_IN_IRQ)
+ uint32_t irq_events;
+#endif
+
+ sc->rxInterrupts++;
+ /*
+ * disable rx interrupts
+ */
+ M83xx_TSEC_IMASK_SET(sc->reg_ptr->imask,M83xx_IEVENT_RXALL,0);
+#if defined(CLREVENT_IN_IRQ)
+ /*
+ * clear any pending RX events
+ */
+ irq_events = sc->reg_ptr->ievent & M83xx_IEVENT_RXALL;
+ sc->reg_ptr->ievent = irq_events;
+#endif
+ /*
+ * wake up rx Daemon<
+ */
+ rtems_event_send(sc->rxDaemonTid, INTERRUPT_EVENT);
+}
+
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_err_irq_handler
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| handle error interrupts |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ rtems_irq_hdl_param handle /* handle, is sc structure */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ /*
+ * FIXME: check error conditions, do something useful
+ */
+#if 0
+ /*
+ * disable error interrupts
+ */
+ M83xx_TSEC_IMASK_SET(sc->reg_ptr->imask,M83xx_IEVENT_ERRALL,0);
+ /*
+ * FIXME: do something :-)
+ */
+#endif
+}
+
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static uint32_t mpc83xx_tsec_irq_mask
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| determine irq mask for given interrupt number |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ int irqnum,
+ struct mpc83xx_tsec_struct *sc
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| interrupt mask (for ievent/imask register) |
+\*=========================================================================*/
+{
+ return ((irqnum == sc->irq_num_tx)
+ ? M83xx_IEVENT_TXALL
+ : ((irqnum == sc->irq_num_rx)
+ ? M83xx_IEVENT_RXALL
+ : ((irqnum == sc->irq_num_err)
+ ? M83xx_IEVENT_ERRALL
+ : 0)));
+}
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_irq_on
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| enable interrupts in TSEC mask register |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ const
+ rtems_irq_connect_data *irq_conn_data /* irq connect data */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc =
+ (struct mpc83xx_tsec_struct *)(irq_conn_data->handle);
+
+ M83xx_TSEC_IMASK_SET(sc->reg_ptr->imask,
+ mpc83xx_tsec_irq_mask(irq_conn_data->name,sc),
+ ~0);
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_irq_off
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| disable TX interrupts in TSEC mask register |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ const
+ rtems_irq_connect_data *irq_conn_data /* irq connect data */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc =
+ (struct mpc83xx_tsec_struct *)irq_conn_data->handle;
+
+ M83xx_TSEC_IMASK_SET(sc->reg_ptr->imask,
+ mpc83xx_tsec_irq_mask(irq_conn_data->name,sc),
+ 0);
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static int mpc83xx_tsec_irq_isOn
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| check state of interrupts in TSEC mask register |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ const
+ rtems_irq_connect_data *irq_conn_data /* irq connect data */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc =
+ (struct mpc83xx_tsec_struct *)irq_conn_data->handle;
+
+ return (0 != (sc->reg_ptr->imask
+ & mpc83xx_tsec_irq_mask(irq_conn_data->name,sc)));
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_install_irq_handlers
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| (un-)install the interrupt handlers |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc, /* ptr to control structure */
+ int install /* TRUE: install, FALSE: remove */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ int i;
+
+ rtems_irq_connect_data irq_conn_data[3] = {
+ {
+ sc->irq_num_tx,
+ mpc83xx_tsec_tx_irq_handler, /* rtems_irq_hdl */
+ (rtems_irq_hdl_param)sc, /* (rtems_irq_hdl_param) */
+ mpc83xx_tsec_irq_on, /* (rtems_irq_enable) */
+ mpc83xx_tsec_irq_off, /* (rtems_irq_disable) */
+ mpc83xx_tsec_irq_isOn /* (rtems_irq_is_enabled) */
+ },{
+ sc->irq_num_rx,
+ mpc83xx_tsec_rx_irq_handler, /* rtems_irq_hdl */
+ (rtems_irq_hdl_param)sc, /* (rtems_irq_hdl_param) */
+ mpc83xx_tsec_irq_on, /* (rtems_irq_enable) */
+ mpc83xx_tsec_irq_off, /* (rtems_irq_disable) */
+ mpc83xx_tsec_irq_isOn /* (rtems_irq_is_enabled) */
+ },{
+ sc->irq_num_err,
+ mpc83xx_tsec_err_irq_handler, /* rtems_irq_hdl */
+ (rtems_irq_hdl_param)sc, /* (rtems_irq_hdl_param) */
+ mpc83xx_tsec_irq_on, /* (rtems_irq_enable) */
+ mpc83xx_tsec_irq_off, /* (rtems_irq_disable) */
+ mpc83xx_tsec_irq_isOn /* (rtems_irq_is_enabled) */
+ }
+ };
+
+ /*
+ * (un-)install handler for Tx/Rx/Error
+ */
+ for (i = 0;
+ i < sizeof(irq_conn_data)/sizeof(irq_conn_data[0]);
+ i++) {
+ if (install) {
+ if (!BSP_install_rtems_irq_handler (&irq_conn_data[i])) {
+ rtems_panic("TSEC: cannot install IRQ handler");
+ }
+ }
+ else {
+ if (!BSP_remove_rtems_irq_handler (&irq_conn_data[i])) {
+ rtems_panic("TSEC: cannot uninstall IRQ handler");
+ }
+ }
+ }
+}
+
+/***************************************************************************\
+| Initialization and interface routines |
+\***************************************************************************/
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_init
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| initialize the driver and the hardware |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ void *arg /* argument pointer, contains *sc */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| zero, if success |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc = (struct mpc83xx_tsec_struct *)arg;
+ struct ifnet *ifp = &sc->arpcom.ac_if;
+ /*
+ * check, whether device is not yet running
+ */
+ if (0 == sc->rxDaemonTid) {
+ /*
+ * allocate rx/tx BDs
+ */
+ mpc83xx_rxbd_alloc_clear(sc);
+ mpc83xx_txbd_alloc_clear(sc);
+ /*
+ * allocate storage for mbuf ptrs
+ */
+ sc->Rx_mBuf_Ptr = calloc(sc->rxBdCount,sizeof(struct mbuf *));
+ sc->Tx_mBuf_Ptr = calloc(sc->txBdCount,sizeof(struct mbuf *));
+ if ((sc->Rx_mBuf_Ptr == NULL) ||
+ (sc->Tx_mBuf_Ptr == NULL)) {
+ rtems_panic("TSEC: cannot allocate buffers for mbuf management");
+
+ }
+
+ /*
+ * initialize TSEC hardware:
+ * - set interrupt coalescing to BDCount/8, Time of 8 frames
+ * - enable DMA snooping
+ */
+ mpc83xx_tsec_hwinit(sc);
+ /*
+ * init access to phys
+ */
+ mpc83xx_tsec_mdio_init(sc);
+ /*
+ * Start driver tasks
+ */
+ sc->txDaemonTid = rtems_bsdnet_newproc("TStx",
+ 4096,
+ mpc83xx_tsec_txDaemon,
+ sc);
+ sc->rxDaemonTid = rtems_bsdnet_newproc("TSrx", 4096,
+ mpc83xx_tsec_rxDaemon,
+ sc);
+ /*
+ * install interrupt handlers
+ */
+ mpc83xx_tsec_install_irq_handlers(sc,1);
+ }
+ /*
+ * Set flags appropriately
+ */
+ if(ifp->if_flags & IFF_PROMISC) {
+ sc->reg_ptr->rctrl |= M83xx_TSEC_RCTRL_PROM;
+ }
+ else {
+ sc->reg_ptr->rctrl &= ~M83xx_TSEC_RCTRL_PROM;
+ }
+
+ /*
+ * init timer so the "watchdog function gets called periodically
+ */
+ ifp->if_timer = 1;
+ /*
+ * Tell the world that we're running.
+ */
+ ifp->if_flags |= IFF_RUNNING;
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_off
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| deinitialize the driver and the hardware |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc /* ptr to control structure */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ /*
+ * FIXME: deinitialize driver
+ */
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_stats
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| perform io control functions |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct mpc83xx_tsec_struct *sc /* ptr to control structure */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| <none> |
+\*=========================================================================*/
+{
+ int media;
+ int result;
+ /*
+ * fetch/print media info
+ */
+ media = IFM_MAKEWORD(0,0,0,sc->phy_default); /* fetch from default phy */
+
+ result = mpc83xx_tsec_ioctl(&(sc->arpcom.ac_if),
+ SIOCGIFMEDIA,
+ (caddr_t)&media);
+ if (result == 0) {
+ rtems_ifmedia2str(media,NULL,0);
+ printf ("\n");
+ }
+ /*
+ * print some statistics
+ */
+ printf (" Rx Interrupts:%-8lu", sc->rxInterrupts);
+ printf (" Not First:%-8lu", sc->rxNotFirst);
+ printf (" Not Last:%-8lu\n", sc->rxNotLast);
+ printf (" Giant:%-8lu", sc->rxGiant);
+ printf (" Non-octet:%-8lu\n", sc->rxNonOctet);
+ printf (" Bad CRC:%-8lu", sc->rxBadCRC);
+ printf (" Overrun:%-8lu", sc->rxOverrun);
+ printf (" Collision:%-8lu\n", sc->rxCollision);
+
+ printf (" Tx Interrupts:%-8lu", sc->txInterrupts);
+ printf (" Deferred:%-8lu", sc->txDeferred);
+ printf (" Late Collision:%-8lu\n", sc->txLateCollision);
+ printf ("Retransmit Limit:%-8lu", sc->txRetryLimit);
+ printf (" Underrun:%-8lu", sc->txUnderrun);
+ printf (" Misaligned:%-8lu\n", sc->txMisaligned);
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static int mpc83xx_tsec_ioctl
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| perform io control functions |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct ifnet *ifp, /* interface information */
+ ioctl_command_t command, /* ioctl command code */
+ caddr_t data /* optional data */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| zero, if success |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc = ifp->if_softc;
+ int error = 0;
+
+ switch(command) {
+ /*
+ * access PHY via MII
+ */
+ case SIOCGIFMEDIA:
+ case SIOCSIFMEDIA:
+ rtems_mii_ioctl (&(sc->mdio_info),sc,command,(void *)data);
+ break;
+ case SIOCGIFADDR:
+ case SIOCSIFADDR:
+ /*
+ * pass through to general ether_ioctl
+ */
+ ether_ioctl(ifp, command, data);
+ break;
+
+ case SIOCSIFFLAGS:
+ /*
+ * adjust active state
+ */
+ if (ifp->if_flags & IFF_RUNNING) {
+ mpc83xx_tsec_off(sc);
+ }
+ if (ifp->if_flags & IFF_UP) {
+ mpc83xx_tsec_off(sc);
+ }
+ break;
+
+ case SIO_RTEMS_SHOW_STATS:
+ /*
+ * show interface statistics
+ */
+ mpc83xx_tsec_stats(sc);
+ break;
+
+ /*
+ * FIXME: All sorts of multicast commands need to be added here!
+ */
+ default:
+ error = EINVAL;
+ break;
+ }
+
+ return error;
+}
+
+/* #define DEBUG */
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+int rtems_mpc83xx_tsec_mode_adapt
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| init the PHY and adapt TSEC settings |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct ifnet *ifp
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| 0, if success |
+\*=========================================================================*/
+{
+ int result;
+ int media;
+ struct mpc83xx_tsec_struct *sc = ifp->if_softc;
+
+#ifdef DEBUG
+ printf("c");
+#endif
+ /*
+ * fetch media status
+ */
+ result = mpc83xx_tsec_ioctl(ifp,SIOCGIFMEDIA,(caddr_t)&media);
+ if (result != 0) {
+ return result;
+ }
+#ifdef DEBUG
+ printf("C");
+#endif
+ /*
+ * status is unchanged? then do nothing
+ */
+ if (media == sc->media_state) {
+ return 0;
+ }
+ /*
+ * otherwise: for the first call, try to negotiate mode
+ */
+ if (sc->media_state == 0) {
+ /*
+ * set media status: set auto negotiation -> start auto-negotiation
+ */
+ media = IFM_MAKEWORD(0,IFM_AUTO,0,sc->phy_default);
+ result = mpc83xx_tsec_ioctl(ifp,SIOCSIFMEDIA,(caddr_t)&media);
+ if (result != 0) {
+ return result;
+ }
+ /*
+ * wait for auto-negotiation to terminate
+ */
+ do {
+ media = IFM_MAKEWORD(0,0,0,sc->phy_default);
+ result = mpc83xx_tsec_ioctl(ifp,SIOCGIFMEDIA,(caddr_t)&media);
+ if (result != 0) {
+ return result;
+ }
+#ifdef DEBUG
+ /*
+ * test: print current status
+ */
+ rtems_ifmedia2str(media,NULL,0);
+ printf ("\n");
+#endif
+ } while (IFM_NONE == IFM_SUBTYPE(media));
+ }
+
+ /*
+ * now set HW according to media results:
+ */
+ /*
+ * if we are 1000MBit, then switch IF to GMII/byte mode
+ */
+ if (IFM_1000_T == IFM_SUBTYPE(media)) {
+ sc->reg_ptr->maccfg2 =
+ ((sc->reg_ptr->maccfg2 & ~M83xx_TSEC_MACCFG2_IFMODE_MSK)
+ | M83xx_TSEC_MACCFG2_IFMODE_BYT);
+ }
+ else {
+ sc->reg_ptr->maccfg2 =
+ ((sc->reg_ptr->maccfg2 & ~M83xx_TSEC_MACCFG2_IFMODE_MSK)
+ | M83xx_TSEC_MACCFG2_IFMODE_NIB);
+ }
+ /*
+ * if we are half duplex then switch to half duplex
+ */
+ if (0 == (IFM_FDX & IFM_OPTIONS(media))) {
+ sc->reg_ptr->maccfg2 &= ~M83xx_TSEC_MACCFG2_FULLDUPLEX;
+ }
+ else {
+ sc->reg_ptr->maccfg2 |= M83xx_TSEC_MACCFG2_FULLDUPLEX;
+ }
+ /*
+ * store current media state for future compares
+ */
+ sc->media_state = media;
+
+ return 0;
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static void mpc83xx_tsec_watchdog
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| periodically poll the PHY. if mode has changed, |
+| then adjust the TSEC settings |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct ifnet *ifp
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| 1, if success |
+\*=========================================================================*/
+{
+ rtems_mpc83xx_tsec_mode_adapt(ifp);
+ ifp->if_timer = TSEC_WATCHDOG_TIMEOUT;
+}
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+static int mpc83xx_tsec_driver_attach
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| attach the driver |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct rtems_bsdnet_ifconfig *config /* interface configuration */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| zero, if success |
+\*=========================================================================*/
+{
+ struct mpc83xx_tsec_struct *sc;
+ struct ifnet *ifp;
+ int unitNumber;
+ char *unitName;
+
+ /*
+ * Parse driver name
+ */
+ if((unitNumber = rtems_bsdnet_parse_driver_name(config, &unitName)) < 0) {
+ return 0;
+ }
+
+ /*
+ * Is driver free?
+ */
+ if ((unitNumber <= 0) || (unitNumber > M83xx_TSEC_NIFACES)) {
+
+ printk ("Bad TSEC unit number.\n");
+ return 0;
+
+ }
+
+ sc = &tsec_driver[unitNumber - 1];
+ ifp = &sc->arpcom.ac_if;
+ /*
+ * add sc to config
+ */
+ config->drv_ctrl = sc;
+
+ if(ifp->if_softc != NULL) {
+ printk ("Driver already in use.\n");
+ return 0;
+ }
+
+ /*
+ * Process options
+ */
+ if(config->hardware_address) {
+ memcpy(sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
+ }
+ else {
+ rtems_panic("TSEC: No Ethernet address specified!\n");
+ }
+
+ sc->rxBdCount = (config->rbuf_count > 0) ? config->rbuf_count : RX_BUF_COUNT;
+ sc->txBdCount = (config->xbuf_count > 0) ? config->xbuf_count : TX_BUF_COUNT;
+ sc->acceptBroadcast = !config->ignore_broadcast;
+
+ /* get pointer to TSEC register block */
+ sc->reg_ptr = &mpc83xx.tsec[unitNumber-1];
+ /* get base interrupt number (for Tx irq, Rx=base+1,Err=base+2) */
+ sc->irq_num_tx = config->irno + 0; /* tx irq number from BSP */
+ sc->irq_num_rx = config->irno + 1; /* rx irq number from BSP */
+ sc->irq_num_err = config->irno + 2; /* err irq number from BSP */
+ if (config->irno == 0) {
+ rtems_panic("TSEC: interupt base number irno not defined");
+ }
+ /*
+ * setup info about mdio interface
+ */
+ sc->mdio_info.mdio_r = mpc83xx_tsec_mdio_read;
+ sc->mdio_info.mdio_w = mpc83xx_tsec_mdio_write;
+ sc->mdio_info.has_gmii = 1; /* we support gigabit IF */
+ /*
+ * XXX: Although most hardware builders will assign the PHY addresses
+ * like this, this should be more configurable
+ */
+ sc->phy_default = unitNumber-1;
+ /*
+ * Set up network interface values
+ */
+ ifp->if_softc = sc;
+ ifp->if_unit = unitNumber;
+ ifp->if_name = unitName;
+ ifp->if_mtu = (config->mtu > 0) ? config->mtu : ETHERMTU;
+ ifp->if_init = mpc83xx_tsec_init;
+ ifp->if_ioctl = mpc83xx_tsec_ioctl;
+ ifp->if_start = mpc83xx_tsec_tx_start;
+ ifp->if_output = ether_output;
+ ifp->if_watchdog = mpc83xx_tsec_watchdog; /* XXX: timer is set in "init" */
+
+ ifp->if_flags = (config->ignore_broadcast) ? 0 : IFF_BROADCAST;
+ /*ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;*/
+
+ if(ifp->if_snd.ifq_maxlen == 0) {
+ ifp->if_snd.ifq_maxlen = ifqmaxlen;
+ }
+
+ /*
+ * Attach the interface
+ */
+ if_attach(ifp);
+
+ ether_ifattach(ifp);
+
+ return 1;
+}
+
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+int rtems_mpc83xx_tsec_driver_attach_detach
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| attach or detach the driver |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct rtems_bsdnet_ifconfig *config, /* interface configuration */
+ int attaching /* 0 = detach, else attach */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| 1, if success |
+\*=========================================================================*/
+{
+ if (attaching) {
+ return mpc83xx_tsec_driver_attach(config);
+ }
+ else {
+ return 0;
+ }
+}
+
diff --git a/c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.h b/c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.h
new file mode 100644
index 0000000000..fa4a4e3e8a
--- /dev/null
+++ b/c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.h
@@ -0,0 +1,82 @@
+/*===============================================================*\
+| Project: RTEMS support for MPC83xx |
++-----------------------------------------------------------------+
+| Copyright (c) 2007 |
+| Embedded Brains GmbH |
+| Obere Lagerstr. 30 |
+| D-82178 Puchheim |
+| Germany |
+| rtems@embedded-brains.de |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be |
+| found in the file LICENSE in this distribution or at |
+| |
+| http://www.rtems.com/license/LICENSE. |
+| |
++-----------------------------------------------------------------+
+| this file declares the MPC83xx TSEC networking driver |
+\*===============================================================*/
+
+#include <rtems/rtems_bsdnet.h>
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+int mpc83xx_tsec_mdio_read
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| read register of a phy |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ int phy, /* PHY number to access or -1 */
+ void *uarg, /* unit argument */
+ unsigned reg, /* register address */
+ uint32_t *pval /* ptr to read buffer */
+ );
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| 0, if ok, -1 if failed |
+\*=========================================================================*/
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+int mpc83xx_tsec_mdio_write
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| write register of a phy |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ int phy, /* PHY number to access or -1 */
+ void *uarg, /* unit argument */
+ unsigned reg, /* register address */
+ uint32_t val /* write value */
+ );
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| 0, if ok, -1 if failed |
+\*=========================================================================*/
+
+/*=========================================================================*\
+| Function: |
+\*-------------------------------------------------------------------------*/
+int rtems_mpc83xx_tsec_driver_attach_detach
+(
+/*-------------------------------------------------------------------------*\
+| Purpose: |
+| attach or detach the driver |
++---------------------------------------------------------------------------+
+| Input Parameters: |
+\*-------------------------------------------------------------------------*/
+ struct rtems_bsdnet_ifconfig *config, /* interface configuration */
+ int attaching /* 0 = detach, else attach */
+ );
+/*-------------------------------------------------------------------------*\
+| Return Value: |
+| 1, if success |
+\*=========================================================================*/
+
diff --git a/c/src/lib/libcpu/powerpc/preinstall.am b/c/src/lib/libcpu/powerpc/preinstall.am
index 85531b8d83..bb30265c7d 100644
--- a/c/src/lib/libcpu/powerpc/preinstall.am
+++ b/c/src/lib/libcpu/powerpc/preinstall.am
@@ -192,3 +192,17 @@ $(PROJECT_INCLUDE)/mpc8260/mmu.h: mpc8260/include/mmu.h $(PROJECT_INCLUDE)/mpc82
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc8260/mmu.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc8260/mmu.h
endif
+if mpc83xx
+$(PROJECT_INCLUDE)/mpc83xx/$(dirstamp):
+ @$(MKDIR_P) $(PROJECT_INCLUDE)/mpc83xx
+ @: > $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp)
+
+$(PROJECT_INCLUDE)/mpc83xx/mpc83xx.h: mpc83xx/include/mpc83xx.h $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc83xx/mpc83xx.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc83xx/mpc83xx.h
+
+$(PROJECT_INCLUDE)/mpc83xx/tsec.h: mpc83xx/network/tsec.h $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc83xx/tsec.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc83xx/tsec.h
+endif
diff --git a/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h b/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h
index c7887a061f..cb79e4c34c 100644
--- a/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h
+++ b/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h
@@ -40,6 +40,9 @@ typedef enum
PPC_8240 = PPC_8260,
PPC_8245 = 0x8081,
PPC_603le = 0x8082, /* 603le core, in MGT5100 and MPC5200 */
+ PPC_e300c1 = 0x8083, /* e300c1 core, in MPC83xx*/
+ PPC_e300c2 = 0x8084, /* e300c2 core */
+ PPC_e300c3 = 0x8085, /* e300c3 core */
PPC_PSIM = 0xfffe, /* GDB PowerPC simulator -- fake version */
PPC_UNKNOWN = 0xffff
} ppc_cpu_id_t;
diff --git a/c/src/lib/libcpu/powerpc/shared/src/cache.c b/c/src/lib/libcpu/powerpc/shared/src/cache.c
index e0f1dd54b8..2c35430412 100644
--- a/c/src/lib/libcpu/powerpc/shared/src/cache.c
+++ b/c/src/lib/libcpu/powerpc/shared/src/cache.c
@@ -8,7 +8,7 @@
#include <rtems.h>
#include "cache_.h"
-
+#include <rtems/powerpc/registers.h>
/*
* CACHE MANAGER: The following functions are CPU-specific.
@@ -19,7 +19,7 @@
* FIXME: Some functions simply have not been implemented.
*/
-#if defined(ppc603) || defined(mpc8260) /* And possibly others */
+#if defined(ppc603) || defined(ppc603e) || defined(mpc8260) /* And possibly others */
/* Helpful macros */
#define PPC_Get_HID0( _value ) \
@@ -49,7 +49,7 @@ void _CPU_cache_enable_data (
{
uint32_t value;
PPC_Get_HID0( value );
- value |= 0x00004000; /* set DCE bit */
+ value |= HID0_DCE; /* set DCE bit */
PPC_Set_HID0( value );
}
@@ -58,10 +58,61 @@ void _CPU_cache_disable_data (
{
uint32_t value;
PPC_Get_HID0( value );
- value &= 0xFFFFBFFF; /* clear DCE bit */
+ value &= ~HID0_DCE; /* clear DCE bit */
+ PPC_Set_HID0( value );
+}
+
+void _CPU_cache_invalidate_1_data_line(
+ const void * _address )
+{
+ register const void *__address = _address;
+ asm volatile ( "dcbi 0,%0" :: "r"(__address) : "memory" );
+}
+
+void _CPU_cache_invalidate_entire_data (
+ void )
+{
+ uint32_t value;
+ PPC_Get_HID0( value );
+ value |= HID0_DCI; /* set data flash invalidate bit */
+ PPC_Set_HID0( value );
+ value &= ~HID0_DCI; /* clear data flash invalidate bit */
+ PPC_Set_HID0( value );
+}
+
+void _CPU_cache_freeze_data (
+ void )
+{
+ uint32_t value;
+ PPC_Get_HID0( value );
+ value |= HID0_DLOCK; /* set data cache lock bit */
+ PPC_Set_HID0( value );
+}
+
+void _CPU_cache_unfreeze_data (
+ void )
+{
+ uint32_t value;
+ PPC_Get_HID0( value );
+ value &= ~HID0_DLOCK; /* set data cache lock bit */
PPC_Set_HID0( value );
}
+void _CPU_cache_flush_1_data_line(
+ const void * _address )
+{
+ register const void *__address = _address;
+ asm volatile ( "dcbf 0,%0" :: "r" (__address) : "memory" );
+}
+
+void _CPU_cache_flush_entire_data (
+ void )
+{
+ /*
+ * FIXME: how can we do this?
+ */
+}
+
void _CPU_cache_enable_instruction (
void )
{
@@ -80,6 +131,42 @@ void _CPU_cache_disable_instruction (
PPC_Set_HID0( value );
}
+void _CPU_cache_invalidate_1_instruction_line(
+ const void * _address )
+{
+ register const void *__address = _address;
+ asm volatile ( "icbi 0,%0" :: "r" (__address) : "memory");
+}
+
+void _CPU_cache_invalidate_entire_instruction (
+ void )
+{
+ uint32_t value;
+ PPC_Get_HID0( value );
+ value |= HID0_ICFI; /* set data flash invalidate bit */
+ PPC_Set_HID0( value );
+ value &= ~HID0_ICFI; /* clear data flash invalidate bit */
+ PPC_Set_HID0( value );
+}
+
+void _CPU_cache_freeze_instruction (
+ void )
+{
+ uint32_t value;
+ PPC_Get_HID0( value );
+ value |= HID0_ILOCK; /* set instruction cache lock bit */
+ PPC_Set_HID0( value );
+}
+
+void _CPU_cache_unfreeze_instruction (
+ void )
+{
+ uint32_t value;
+ PPC_Get_HID0( value );
+ value &= ~HID0_ILOCK; /* set instruction cache lock bit */
+ PPC_Set_HID0( value );
+}
+
#elif ( defined(mpx8xx) || defined(mpc860) || defined(mpc821) )
#define mtspr(_spr,_reg) \
diff --git a/c/src/lib/libcpu/powerpc/shared/src/cache_.h b/c/src/lib/libcpu/powerpc/shared/src/cache_.h
index bff8874587..2477cf78f5 100644
--- a/c/src/lib/libcpu/powerpc/shared/src/cache_.h
+++ b/c/src/lib/libcpu/powerpc/shared/src/cache_.h
@@ -4,6 +4,11 @@
#ifndef __POWERPC_CACHE_h
#define __POWERPC_CACHE_h
+/*
+ * get definitions from the score/powerpc header
+ * about individual cache alignments
+ */
+#include <rtems/score/powerpc.h>
/*
* CACHE MANAGER: The following functions are CPU-specific.
@@ -14,17 +19,16 @@
* FIXME: Some functions simply have not been implemented.
*/
-#if defined(ppc603) /* And possibly others */
-#define CPU_DATA_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT
-#define CPU_INSTRUCTION_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT
+#if defined(ppc603) || defined(ppc603e) || defined(mpc8260)
+ /* And possibly others */
-#elif ( defined(mpc860) || defined(mpc821) )
+#if defined(PPC_CACHE_ALIGNMENT)
#define CPU_DATA_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT
#define CPU_INSTRUCTION_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT
#endif
-
+#endif
#include <libcpu/cache.h>
#endif
diff --git a/c/src/libchip/ide/ata.c b/c/src/libchip/ide/ata.c
index 708518bca3..9a59e14f88 100644
--- a/c/src/libchip/ide/ata.c
+++ b/c/src/libchip/ide/ata.c
@@ -1168,7 +1168,7 @@ ata_initialize(rtems_device_major_number major,
ata_irq_data.name =
IDE_Controller_Table[ctrl_minor].int_vec;
ata_irq_data.hdl = ata_interrupt_handler;
- ata_irq_data.handle = ctrl_minor;
+ ata_irq_data.handle = (rtems_irq_hdl_param) ctrl_minor;
status = ((0 == BSP_install_rtems_irq_handler(&ata_irq_data))
? RTEMS_INVALID_NUMBER
diff --git a/c/src/libchip/serial/ns16550.c b/c/src/libchip/serial/ns16550.c
index b25c650d4f..b988086b68 100644
--- a/c/src/libchip/serial/ns16550.c
+++ b/c/src/libchip/serial/ns16550.c
@@ -205,7 +205,7 @@ NS16550_STATIC void ns16550_write_polled(
/*
* wait for transmitter holding register to be empty
*/
- iTimeout=1000;
+ iTimeout=10000;
ucLineStatus = (*getReg)(pNS16550, NS16550_LINE_STATUS);
while ((ucLineStatus & SP_LSR_THOLD) == 0) {
/*
diff --git a/cpukit/score/cpu/powerpc/rtems/score/powerpc.h b/cpukit/score/cpu/powerpc/rtems/score/powerpc.h
index 0142e6fe6c..7de8cc5d49 100644
--- a/cpukit/score/cpu/powerpc/rtems/score/powerpc.h
+++ b/cpukit/score/cpu/powerpc/rtems/score/powerpc.h
@@ -144,6 +144,7 @@ extern "C" {
#define CPU_MODEL_NAME "PowerPC 603"
#define PPC_ALIGNMENT 8
+#define PPC_CACHE_ALIGNMENT 16
#elif defined(ppc603e)
@@ -155,6 +156,7 @@ extern "C" {
*/
#define PPC_ALIGNMENT 8
+#define PPC_CACHE_ALIGNMENT 16
#elif defined(mpc604)
/*
diff --git a/make/ChangeLog b/make/ChangeLog
index 44eb06aa2d..9117deb861 100644
--- a/make/ChangeLog
+++ b/make/ChangeLog
@@ -1,3 +1,8 @@
+2007-07-09 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
+
+ * custom/gen83xx.cfg, custom/mpc8349eamds: added file to support
+ MPC83xx controller based boards
+
2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* custom/vitex.cfg: added file to support PPC core in a xilinx
diff --git a/make/custom/gen83xx.cfg b/make/custom/gen83xx.cfg
new file mode 100644
index 0000000000..b6bccf8df6
--- /dev/null
+++ b/make/custom/gen83xx.cfg
@@ -0,0 +1,39 @@
+#
+# Shared base config file for GEN83xx BSPs
+#
+# $Id$
+#
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+#
+# FIXME: we might want to use the e300 CPU model explicitely,
+# using RTEMS_CPU_MODEL=e300 and -me300
+# but I doubt the compiler actually generates different code
+#
+RTEMS_CPU=powerpc
+RTEMS_CPU_MODEL=mpc83xx
+
+# This is the actual bsp directory used during the build process.
+RTEMS_BSP_FAMILY=gen83xx
+
+# This contains the compiler options necessary to select the CPU model
+# and (hopefully) optimize for it.
+#
+CPU_CFLAGS = -mcpu=603e -mstrict-align -fno-strict-aliasing\
+ -D$(RTEMS_BOARD_MODEL) -D$(RTEMS_83XX_DERIVATE)
+
+# optimize flag: typically -O2
+CFLAGS_OPTIMIZE_V = -O4 -g -fno-keep-inline-functions
+
+# The following are definitions of make-exe which will work using ld as
+# is currently required.
+
+define make-exe
+ $(LINK.c) $(AM_CFLAGS) $(AM_LDFLAGS) \
+ -qnolinkcmds -T $(RTEMS_LINKCMDS) -o $(basename $@).exe \
+ $(LINK_OBJS) $(LINK_LIBS)
+ $(NM) -g -n $(basename $@).exe > $(basename $@).num
+ $(SIZE) $(basename $@).exe
+endef
+
+# Miscellaneous additions go here
diff --git a/make/custom/mpc8349eamds.cfg b/make/custom/mpc8349eamds.cfg
new file mode 100644
index 0000000000..97775c3f59
--- /dev/null
+++ b/make/custom/mpc8349eamds.cfg
@@ -0,0 +1,16 @@
+#
+# Config file for customer specific MPC5200 board
+#
+# $Id$
+#
+
+#
+# All GEN83xx configurations share the same base file, only a few
+# parameters differ.
+#
+
+RTEMS_BOARD_MODEL=MPC8349EAMDS
+RTEMS_83XX_DERIVATE=MPC8349
+RTEMS_LINKCMDS=linkcmds.mpc8349eamds
+
+include $(RTEMS_ROOT)/make/custom/gen83xx.cfg