diff options
| -rw-r--r-- | c/src/exec/score/cpu/arm/cpu.c | 9 | ||||
| -rw-r--r-- | c/src/exec/score/cpu/arm/rtems/score/cpu.h | 1 | ||||
| -rw-r--r-- | cpukit/score/cpu/arm/cpu.c | 9 | ||||
| -rw-r--r-- | cpukit/score/cpu/arm/rtems/score/cpu.h | 1 |
4 files changed, 12 insertions, 8 deletions
diff --git a/c/src/exec/score/cpu/arm/cpu.c b/c/src/exec/score/cpu/arm/cpu.c index bb97346fe3..09caf9299e 100644 --- a/c/src/exec/score/cpu/arm/cpu.c +++ b/c/src/exec/score/cpu/arm/cpu.c @@ -13,7 +13,7 @@ #include <rtems/system.h> #include <rtems.h> -#include <bspio.h> +#include <bspIo.h> #include <rtems/score/isr.h> #include <rtems/score/wkspace.h> #include <rtems/score/thread.h> @@ -155,11 +155,12 @@ extern void _Exception_Handler_Abort(); void rtems_exception_init_mngt() { + ISR_Level level; _CPU_ISR_Disable(level); - _CPU_ISR_install_vector(ARM_EXCEPTION_UNDEF, _Exception_Handler_Undef_Swi, NULL); - _CPU_ISR_install_vector(ARM_EXCEPTION_SWI, _Exception_Handler_Undef_Swi, NULL); - _CPU_ISR_install_vector(ARM_EXCEPTION_PREF_ABORT, _Exception_Handler_Abort , NULL); + _CPU_ISR_install_vector(ARM_EXCEPTION_UNDEF, _Exception_Handler_Undef_Swi, NULL); + _CPU_ISR_install_vector(ARM_EXCEPTION_SWI, _Exception_Handler_Undef_Swi, NULL); + _CPU_ISR_install_vector(ARM_EXCEPTION_PREF_ABORT, _Exception_Handler_Abort , NULL); _CPU_ISR_install_vector(ARM_EXCEPTION_DATA_ABORT, _Exception_Handler_Abort , NULL); _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, _Exception_Handler_Abort , NULL); _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _Exception_Handler_Abort , NULL); diff --git a/c/src/exec/score/cpu/arm/rtems/score/cpu.h b/c/src/exec/score/cpu/arm/rtems/score/cpu.h index 820b72a0be..5e664818ea 100644 --- a/c/src/exec/score/cpu/arm/rtems/score/cpu.h +++ b/c/src/exec/score/cpu/arm/rtems/score/cpu.h @@ -525,6 +525,7 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)(); */ #define _CPU_ISR_Disable( _level ) \ { \ + (_level) = 0; \ asm volatile ("MRS r0, cpsr \n" ); \ asm volatile ("ORR r0, r0, #0xc0 \n" ); \ asm volatile ("MSR cpsr, r0 \n" ); \ diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c index bb97346fe3..09caf9299e 100644 --- a/cpukit/score/cpu/arm/cpu.c +++ b/cpukit/score/cpu/arm/cpu.c @@ -13,7 +13,7 @@ #include <rtems/system.h> #include <rtems.h> -#include <bspio.h> +#include <bspIo.h> #include <rtems/score/isr.h> #include <rtems/score/wkspace.h> #include <rtems/score/thread.h> @@ -155,11 +155,12 @@ extern void _Exception_Handler_Abort(); void rtems_exception_init_mngt() { + ISR_Level level; _CPU_ISR_Disable(level); - _CPU_ISR_install_vector(ARM_EXCEPTION_UNDEF, _Exception_Handler_Undef_Swi, NULL); - _CPU_ISR_install_vector(ARM_EXCEPTION_SWI, _Exception_Handler_Undef_Swi, NULL); - _CPU_ISR_install_vector(ARM_EXCEPTION_PREF_ABORT, _Exception_Handler_Abort , NULL); + _CPU_ISR_install_vector(ARM_EXCEPTION_UNDEF, _Exception_Handler_Undef_Swi, NULL); + _CPU_ISR_install_vector(ARM_EXCEPTION_SWI, _Exception_Handler_Undef_Swi, NULL); + _CPU_ISR_install_vector(ARM_EXCEPTION_PREF_ABORT, _Exception_Handler_Abort , NULL); _CPU_ISR_install_vector(ARM_EXCEPTION_DATA_ABORT, _Exception_Handler_Abort , NULL); _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, _Exception_Handler_Abort , NULL); _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _Exception_Handler_Abort , NULL); diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h index 820b72a0be..5e664818ea 100644 --- a/cpukit/score/cpu/arm/rtems/score/cpu.h +++ b/cpukit/score/cpu/arm/rtems/score/cpu.h @@ -525,6 +525,7 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)(); */ #define _CPU_ISR_Disable( _level ) \ { \ + (_level) = 0; \ asm volatile ("MRS r0, cpsr \n" ); \ asm volatile ("ORR r0, r0, #0xc0 \n" ); \ asm volatile ("MSR cpsr, r0 \n" ); \ |