diff options
| -rw-r--r-- | c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h | 21 | ||||
| -rw-r--r-- | c/src/lib/libbsp/arm/shared/include/arm-cache-l1.h | 9 |
2 files changed, 0 insertions, 30 deletions
diff --git a/c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h b/c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h index 0c3133ba2d..c8dd931353 100644 --- a/c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h +++ b/c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h @@ -1175,17 +1175,6 @@ cache_l2c_310_clean_and_invalidate_entire( void ) } static inline void -cache_l2c_310_store( const void *d_addr ) -{ - volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2CC_BASE; - - - l2cc->clean_pa = (uint32_t) d_addr; - - cache_l2c_310_sync(); -} - -static inline void cache_l2c_310_freeze( void ) { /* To be implemented as needed, if supported @@ -1458,16 +1447,6 @@ _CPU_cache_invalidate_entire_data( void ) } static inline void -_CPU_cache_store_data_line( const void *d_addr ) -{ - const void *ADX = - (const void *) ( (uint32_t) d_addr & ~CACHE_L2C_310_DATA_LINE_MASK ); - - arm_cache_l1_store_data( ADX ); - cache_l2c_310_store( ADX ); -} - -static inline void _CPU_cache_freeze_data( void ) { arm_cache_l1_freeze_data(); diff --git a/c/src/lib/libbsp/arm/shared/include/arm-cache-l1.h b/c/src/lib/libbsp/arm/shared/include/arm-cache-l1.h index e4a19ad6ff..5d23085fc4 100644 --- a/c/src/lib/libbsp/arm/shared/include/arm-cache-l1.h +++ b/c/src/lib/libbsp/arm/shared/include/arm-cache-l1.h @@ -229,15 +229,6 @@ static inline void arm_cache_l1_clean_and_invalidate_entire_data( void ) _ARM_Data_synchronization_barrier(); } -static inline void arm_cache_l1_store_data( const void *d_addr ) -{ - /* Store the Data cache line */ - arm_cp15_data_cache_clean_line( d_addr ); - - /* Wait for L1 store to complete */ - _ARM_Data_synchronization_barrier(); -} - static inline void arm_cache_l1_flush_data_range( const void *d_addr, size_t n_bytes |