diff options
Diffstat (limited to '')
22 files changed, 508 insertions, 150 deletions
diff --git a/bsps/arm/stm32h7/console/console-uart4-cfg.c b/bsps/arm/stm32h7/console/console-uart4-cfg.c new file mode 100644 index 0000000000..bef3bf0a4d --- /dev/null +++ b/bsps/arm/stm32h7/console/console-uart4-cfg.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <stm32h7/hal.h> + +const stm32h7_uart_config stm32h7_uart4_config = { + .gpio = { + .regs = GPIOH, + .config = { + .Pin = GPIO_PIN_13 | GPIO_PIN_14, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_NOPULL, + .Speed = GPIO_SPEED_FREQ_LOW, + .Alternate = GPIO_AF6_UART4 + } + }, + .irq = UART4_IRQn, + .device_index = 3 +}; diff --git a/bsps/arm/stm32h7/console/console-uart4.c b/bsps/arm/stm32h7/console/console-uart4.c index 40536d61cf..ab751d86ce 100644 --- a/bsps/arm/stm32h7/console/console-uart4.c +++ b/bsps/arm/stm32h7/console/console-uart4.c @@ -31,21 +31,6 @@ #include <stm32h7/hal.h> -static const stm32h7_uart_config stm32h7_uart4_config = { - .gpio = { - .regs = GPIOH, - .config = { - .Pin = GPIO_PIN_13 | GPIO_PIN_14, - .Mode = GPIO_MODE_AF_PP, - .Pull = GPIO_NOPULL, - .Speed = GPIO_SPEED_FREQ_LOW, - .Alternate = GPIO_AF6_UART4 - } - }, - .irq = UART4_IRQn, - .device_index = 3 -}; - stm32h7_uart_context stm32h7_uart4_instance = { .uart = { .Instance = UART4, diff --git a/bsps/arm/stm32h7/console/console-uart5-cfg.c b/bsps/arm/stm32h7/console/console-uart5-cfg.c new file mode 100644 index 0000000000..2723f918e7 --- /dev/null +++ b/bsps/arm/stm32h7/console/console-uart5-cfg.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <stm32h7/hal.h> + +const stm32h7_uart_config stm32h7_uart5_config = { + .gpio = { + .regs = GPIOD, + .config = { + .Pin = GPIO_PIN_1 | GPIO_PIN_2, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_NOPULL, + .Speed = GPIO_SPEED_FREQ_LOW, + .Alternate = GPIO_AF8_UART5 + } + }, + .irq = UART5_IRQn, + .device_index = 4 +}; diff --git a/bsps/arm/stm32h7/console/console-uart5.c b/bsps/arm/stm32h7/console/console-uart5.c index 45b1c04b7c..5c6417f22a 100644 --- a/bsps/arm/stm32h7/console/console-uart5.c +++ b/bsps/arm/stm32h7/console/console-uart5.c @@ -31,21 +31,6 @@ #include <stm32h7/hal.h> -static const stm32h7_uart_config stm32h7_uart5_config = { - .gpio = { - .regs = GPIOD, - .config = { - .Pin = GPIO_PIN_1 | GPIO_PIN_2, - .Mode = GPIO_MODE_AF_PP, - .Pull = GPIO_NOPULL, - .Speed = GPIO_SPEED_FREQ_LOW, - .Alternate = GPIO_AF8_UART5 - } - }, - .irq = UART5_IRQn, - .device_index = 4 -}; - stm32h7_uart_context stm32h7_uart5_instance = { .uart = { .Instance = UART5, diff --git a/bsps/arm/stm32h7/console/console-uart7-cfg.c b/bsps/arm/stm32h7/console/console-uart7-cfg.c new file mode 100644 index 0000000000..640fb358e3 --- /dev/null +++ b/bsps/arm/stm32h7/console/console-uart7-cfg.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <stm32h7/hal.h> + +const stm32h7_uart_config stm32h7_uart7_config = { + .gpio = { + .regs = GPIOB, + .config = { + .Pin = GPIO_PIN_3 | GPIO_PIN_4, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_NOPULL, + .Speed = GPIO_SPEED_FREQ_LOW, + .Alternate = GPIO_AF7_UART7 + } + }, + .irq = UART7_IRQn, + .device_index = 6 +}; diff --git a/bsps/arm/stm32h7/console/console-uart7.c b/bsps/arm/stm32h7/console/console-uart7.c index eadf7723c6..cc113340c3 100644 --- a/bsps/arm/stm32h7/console/console-uart7.c +++ b/bsps/arm/stm32h7/console/console-uart7.c @@ -31,21 +31,6 @@ #include <stm32h7/hal.h> -static const stm32h7_uart_config stm32h7_uart7_config = { - .gpio = { - .regs = GPIOB, - .config = { - .Pin = GPIO_PIN_3 | GPIO_PIN_4, - .Mode = GPIO_MODE_AF_PP, - .Pull = GPIO_NOPULL, - .Speed = GPIO_SPEED_FREQ_LOW, - .Alternate = GPIO_AF7_UART7 - } - }, - .irq = UART7_IRQn, - .device_index = 6 -}; - stm32h7_uart_context stm32h7_uart7_instance = { .uart = { .Instance = UART7, diff --git a/bsps/arm/stm32h7/console/console-uart8-cfg.c b/bsps/arm/stm32h7/console/console-uart8-cfg.c new file mode 100644 index 0000000000..080de49df4 --- /dev/null +++ b/bsps/arm/stm32h7/console/console-uart8-cfg.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <stm32h7/hal.h> + +const stm32h7_uart_config stm32h7_uart8_config = { + .gpio = { + .regs = GPIOE, + .config = { + .Pin = GPIO_PIN_0 | GPIO_PIN_1, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_NOPULL, + .Speed = GPIO_SPEED_FREQ_LOW, + .Alternate = GPIO_AF8_UART8 + } + }, + .irq = UART8_IRQn, + .device_index = 7 +}; diff --git a/bsps/arm/stm32h7/console/console-uart8.c b/bsps/arm/stm32h7/console/console-uart8.c index 5daa0e3635..e79d1e4d78 100644 --- a/bsps/arm/stm32h7/console/console-uart8.c +++ b/bsps/arm/stm32h7/console/console-uart8.c @@ -31,21 +31,6 @@ #include <stm32h7/hal.h> -static const stm32h7_uart_config stm32h7_uart8_config = { - .gpio = { - .regs = GPIOE, - .config = { - .Pin = GPIO_PIN_0 | GPIO_PIN_1, - .Mode = GPIO_MODE_AF_PP, - .Pull = GPIO_NOPULL, - .Speed = GPIO_SPEED_FREQ_LOW, - .Alternate = GPIO_AF8_UART8 - } - }, - .irq = UART8_IRQn, - .device_index = 7 -}; - stm32h7_uart_context stm32h7_uart8_instance = { .uart = { .Instance = UART8, diff --git a/bsps/arm/stm32h7/console/console-uart9-cfg.c b/bsps/arm/stm32h7/console/console-uart9-cfg.c new file mode 100644 index 0000000000..a382b869f1 --- /dev/null +++ b/bsps/arm/stm32h7/console/console-uart9-cfg.c @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <stm32h7/hal.h> + +#ifdef UART9 + +const stm32h7_uart_config stm32h7_uart9_config = { + .gpio = { + .regs = GPIOB, + .config = { + .Pin = GPIO_PIN_15 | GPIO_PIN_14, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_NOPULL, + .Speed = GPIO_SPEED_FREQ_LOW, + .Alternate = GPIO_AF11_UART9 + } + }, + .irq = UART9_IRQn, + .device_index = 8 +}; + +#endif /* UART9 */ diff --git a/bsps/arm/stm32h7/console/console-uart9.c b/bsps/arm/stm32h7/console/console-uart9.c index 821bc11bcc..b6bdcf61f2 100644 --- a/bsps/arm/stm32h7/console/console-uart9.c +++ b/bsps/arm/stm32h7/console/console-uart9.c @@ -33,21 +33,6 @@ #ifdef UART9 -static const stm32h7_uart_config stm32h7_uart9_config = { - .gpio = { - .regs = GPIOB, - .config = { - .Pin = GPIO_PIN_15 | GPIO_PIN_14, - .Mode = GPIO_MODE_AF_PP, - .Pull = GPIO_NOPULL, - .Speed = GPIO_SPEED_FREQ_LOW, - .Alternate = GPIO_AF11_UART9 - } - }, - .irq = UART9_IRQn, - .device_index = 8 -}; - stm32h7_uart_context stm32h7_uart9_instance = { .uart = { .Instance = UART9, diff --git a/bsps/arm/stm32h7/console/console-usart1-cfg.c b/bsps/arm/stm32h7/console/console-usart1-cfg.c new file mode 100644 index 0000000000..47c13b2f54 --- /dev/null +++ b/bsps/arm/stm32h7/console/console-usart1-cfg.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <stm32h7/hal.h> + +const stm32h7_uart_config stm32h7_usart1_config = { + .gpio = { + .regs = GPIOB, + .config = { + .Pin = GPIO_PIN_14 | GPIO_PIN_15, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_NOPULL, + .Speed = GPIO_SPEED_FREQ_LOW, + .Alternate = GPIO_AF4_USART1 + } + }, + .irq = USART1_IRQn, + .device_index = 0 +}; diff --git a/bsps/arm/stm32h7/console/console-usart1.c b/bsps/arm/stm32h7/console/console-usart1.c index 6dec753d7d..fa83001c33 100644 --- a/bsps/arm/stm32h7/console/console-usart1.c +++ b/bsps/arm/stm32h7/console/console-usart1.c @@ -31,21 +31,6 @@ #include <stm32h7/hal.h> -static const stm32h7_uart_config stm32h7_usart1_config = { - .gpio = { - .regs = GPIOB, - .config = { - .Pin = GPIO_PIN_14 | GPIO_PIN_15, - .Mode = GPIO_MODE_AF_PP, - .Pull = GPIO_NOPULL, - .Speed = GPIO_SPEED_FREQ_LOW, - .Alternate = GPIO_AF4_USART1 - } - }, - .irq = USART1_IRQn, - .device_index = 0 -}; - stm32h7_uart_context stm32h7_usart1_instance = { .uart = { .Instance = USART1, diff --git a/bsps/arm/stm32h7/console/console-usart10-cfg.c b/bsps/arm/stm32h7/console/console-usart10-cfg.c new file mode 100644 index 0000000000..72fe2541f3 --- /dev/null +++ b/bsps/arm/stm32h7/console/console-usart10-cfg.c @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <stm32h7/hal.h> + +#ifdef USART10 + +const stm32h7_uart_config stm32h7_usart10_config = { + .gpio = { + .regs = GPIOB, + .config = { + .Pin = GPIO_PIN_15 | GPIO_PIN_14, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_NOPULL, + .Speed = GPIO_SPEED_FREQ_LOW, + .Alternate = GPIO_AF11_USART10 + } + }, + .irq = USART10_IRQn, + .device_index = 9 +}; + +#endif /* USART10 */ diff --git a/bsps/arm/stm32h7/console/console-usart10.c b/bsps/arm/stm32h7/console/console-usart10.c index b73346e2cf..7ba2e45433 100644 --- a/bsps/arm/stm32h7/console/console-usart10.c +++ b/bsps/arm/stm32h7/console/console-usart10.c @@ -33,21 +33,6 @@ #ifdef USART10 -static const stm32h7_uart_config stm32h7_usart10_config = { - .gpio = { - .regs = GPIOB, - .config = { - .Pin = GPIO_PIN_15 | GPIO_PIN_14, - .Mode = GPIO_MODE_AF_PP, - .Pull = GPIO_NOPULL, - .Speed = GPIO_SPEED_FREQ_LOW, - .Alternate = GPIO_AF11_USART10 - } - }, - .irq = USART10_IRQn, - .device_index = 9 -}; - stm32h7_uart_context stm32h7_usart10_instance = { .uart = { .Instance = USART10, diff --git a/bsps/arm/stm32h7/console/console-usart2-cfg.c b/bsps/arm/stm32h7/console/console-usart2-cfg.c new file mode 100644 index 0000000000..b17561982b --- /dev/null +++ b/bsps/arm/stm32h7/console/console-usart2-cfg.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <stm32h7/hal.h> + +const stm32h7_uart_config stm32h7_usart2_config = { + .gpio = { + .regs = GPIOA, + .config = { + .Pin = GPIO_PIN_2 | GPIO_PIN_3, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_NOPULL, + .Speed = GPIO_SPEED_FREQ_LOW, + .Alternate = GPIO_AF7_USART2 + } + }, + .irq = USART2_IRQn, + .device_index = 1 +}; diff --git a/bsps/arm/stm32h7/console/console-usart2.c b/bsps/arm/stm32h7/console/console-usart2.c index 291dbc044d..b14be49d08 100644 --- a/bsps/arm/stm32h7/console/console-usart2.c +++ b/bsps/arm/stm32h7/console/console-usart2.c @@ -31,21 +31,6 @@ #include <stm32h7/hal.h> -static const stm32h7_uart_config stm32h7_usart2_config = { - .gpio = { - .regs = GPIOA, - .config = { - .Pin = GPIO_PIN_2 | GPIO_PIN_3, - .Mode = GPIO_MODE_AF_PP, - .Pull = GPIO_NOPULL, - .Speed = GPIO_SPEED_FREQ_LOW, - .Alternate = GPIO_AF7_USART2 - } - }, - .irq = USART2_IRQn, - .device_index = 1 -}; - stm32h7_uart_context stm32h7_usart2_instance = { .uart = { .Instance = USART2, diff --git a/bsps/arm/stm32h7/console/console-usart3-cfg.c b/bsps/arm/stm32h7/console/console-usart3-cfg.c new file mode 100644 index 0000000000..b40f6da5aa --- /dev/null +++ b/bsps/arm/stm32h7/console/console-usart3-cfg.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <stm32h7/hal.h> + +const stm32h7_uart_config stm32h7_usart3_config = { + .gpio = { + .regs = GPIOB, + .config = { + .Pin = GPIO_PIN_9 | GPIO_PIN_10, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_NOPULL, + .Speed = GPIO_SPEED_FREQ_LOW, + .Alternate = GPIO_AF7_USART3 + } + }, + .irq = USART3_IRQn, + .device_index = 2 +}; diff --git a/bsps/arm/stm32h7/console/console-usart3.c b/bsps/arm/stm32h7/console/console-usart3.c index 6e0a10fe46..4fb8c7de55 100644 --- a/bsps/arm/stm32h7/console/console-usart3.c +++ b/bsps/arm/stm32h7/console/console-usart3.c @@ -31,21 +31,6 @@ #include <stm32h7/hal.h> -static const stm32h7_uart_config stm32h7_usart3_config = { - .gpio = { - .regs = GPIOB, - .config = { - .Pin = GPIO_PIN_9 | GPIO_PIN_10, - .Mode = GPIO_MODE_AF_PP, - .Pull = GPIO_NOPULL, - .Speed = GPIO_SPEED_FREQ_LOW, - .Alternate = GPIO_AF7_USART3 - } - }, - .irq = USART3_IRQn, - .device_index = 2 -}; - stm32h7_uart_context stm32h7_usart3_instance = { .uart = { .Instance = USART3, diff --git a/bsps/arm/stm32h7/console/console-usart6-cfg.c b/bsps/arm/stm32h7/console/console-usart6-cfg.c new file mode 100644 index 0000000000..f41a2c737f --- /dev/null +++ b/bsps/arm/stm32h7/console/console-usart6-cfg.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <stm32h7/hal.h> + +const stm32h7_uart_config stm32h7_usart6_config = { + .gpio = { + .regs = GPIOC, + .config = { + .Pin = GPIO_PIN_6 | GPIO_PIN_7, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_NOPULL, + .Speed = GPIO_SPEED_FREQ_LOW, + .Alternate = GPIO_AF7_USART6 + } + }, + .irq = USART6_IRQn, + .device_index = 5 +}; diff --git a/bsps/arm/stm32h7/console/console-usart6.c b/bsps/arm/stm32h7/console/console-usart6.c index d43d8dfbf5..91d9d0302f 100644 --- a/bsps/arm/stm32h7/console/console-usart6.c +++ b/bsps/arm/stm32h7/console/console-usart6.c @@ -31,21 +31,6 @@ #include <stm32h7/hal.h> -static const stm32h7_uart_config stm32h7_usart6_config = { - .gpio = { - .regs = GPIOC, - .config = { - .Pin = GPIO_PIN_6 | GPIO_PIN_7, - .Mode = GPIO_MODE_AF_PP, - .Pull = GPIO_NOPULL, - .Speed = GPIO_SPEED_FREQ_LOW, - .Alternate = GPIO_AF7_USART6 - } - }, - .irq = USART6_IRQn, - .device_index = 5 -}; - stm32h7_uart_context stm32h7_usart6_instance = { .uart = { .Instance = USART6, diff --git a/bsps/arm/stm32h7/include/stm32h7/hal.h b/bsps/arm/stm32h7/include/stm32h7/hal.h index fe37f03c04..de38f1a5e8 100644 --- a/bsps/arm/stm32h7/include/stm32h7/hal.h +++ b/bsps/arm/stm32h7/include/stm32h7/hal.h @@ -112,24 +112,44 @@ int stm32h7_uart_polled_read(rtems_termios_device_context *base); extern stm32h7_uart_context stm32h7_usart1_instance; +extern const stm32h7_uart_config stm32h7_usart1_config; + extern stm32h7_uart_context stm32h7_usart2_instance; +extern const stm32h7_uart_config stm32h7_usart2_config; + extern stm32h7_uart_context stm32h7_usart3_instance; +extern const stm32h7_uart_config stm32h7_usart3_config; + extern stm32h7_uart_context stm32h7_uart4_instance; +extern const stm32h7_uart_config stm32h7_uart4_config; + extern stm32h7_uart_context stm32h7_uart5_instance; +extern const stm32h7_uart_config stm32h7_uart5_config; + extern stm32h7_uart_context stm32h7_usart6_instance; +extern const stm32h7_uart_config stm32h7_usart6_config; + extern stm32h7_uart_context stm32h7_uart7_instance; +extern const stm32h7_uart_config stm32h7_uart7_config; + extern stm32h7_uart_context stm32h7_uart8_instance; +extern const stm32h7_uart_config stm32h7_uart8_config; + extern stm32h7_uart_context stm32h7_uart9_instance; +extern const stm32h7_uart_config stm32h7_uart9_config; + extern stm32h7_uart_context stm32h7_usart10_instance; +extern const stm32h7_uart_config stm32h7_usart10_config; + extern const uint32_t stm32h7_config_pwr_regulator_voltagescaling; extern const RCC_OscInitTypeDef stm32h7_config_oscillator; diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml index 6424de3c3f..1e54838c66 100644 --- a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml +++ b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml @@ -268,15 +268,25 @@ source: - bsps/arm/shared/start/bsp-start-memcpy.S - bsps/arm/stm32h7/console/console.c - bsps/arm/stm32h7/console/console-uart4.c +- bsps/arm/stm32h7/console/console-uart4-cfg.c - bsps/arm/stm32h7/console/console-uart5.c +- bsps/arm/stm32h7/console/console-uart5-cfg.c - bsps/arm/stm32h7/console/console-uart7.c +- bsps/arm/stm32h7/console/console-uart7-cfg.c - bsps/arm/stm32h7/console/console-uart8.c +- bsps/arm/stm32h7/console/console-uart8-cfg.c - bsps/arm/stm32h7/console/console-uart9.c +- bsps/arm/stm32h7/console/console-uart9-cfg.c - bsps/arm/stm32h7/console/console-usart10.c +- bsps/arm/stm32h7/console/console-usart10-cfg.c - bsps/arm/stm32h7/console/console-usart1.c +- bsps/arm/stm32h7/console/console-usart1-cfg.c - bsps/arm/stm32h7/console/console-usart2.c +- bsps/arm/stm32h7/console/console-usart2-cfg.c - bsps/arm/stm32h7/console/console-usart3.c +- bsps/arm/stm32h7/console/console-usart3-cfg.c - bsps/arm/stm32h7/console/console-usart6.c +- bsps/arm/stm32h7/console/console-usart6-cfg.c - bsps/arm/stm32h7/console/printk-support.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_adc.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_adc_ex.c |