diff options
-rw-r--r-- | c/src/lib/libbsp/arm/nds/ChangeLog | 4 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/nds/startup/linkcmds | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/nds/ChangeLog b/c/src/lib/libbsp/arm/nds/ChangeLog index 3c5e017e28..6989048213 100644 --- a/c/src/lib/libbsp/arm/nds/ChangeLog +++ b/c/src/lib/libbsp/arm/nds/ChangeLog @@ -1,3 +1,7 @@ +2011-08-23 Julien Delange <julien.delange@gmail.com> + + * startup/linkcmds: Fixed instruction cache size. + 2011-08-22 Sebastian Huber <sebastian.huber@embedded-brains.de> * start/start.S: Fixed code section. diff --git a/c/src/lib/libbsp/arm/nds/startup/linkcmds b/c/src/lib/libbsp/arm/nds/startup/linkcmds index f9d863c337..f8cf10197b 100644 --- a/c/src/lib/libbsp/arm/nds/startup/linkcmds +++ b/c/src/lib/libbsp/arm/nds/startup/linkcmds @@ -2,7 +2,7 @@ MEMORY { ROM : ORIGIN = 0x08000000, LENGTH = 32M EWRAM : ORIGIN = 0x02000000, LENGTH = 4M - 4k DTCM : ORIGIN = 0x0b000000, LENGTH = 16k - ITCM : ORIGIN = 0x01000000, LENGTH = 16k + ITCM : ORIGIN = 0x01000000, LENGTH = 32k NIRVANA : ORIGIN = 0, LENGTH = 0 } |