diff options
166 files changed, 511 insertions, 2439 deletions
diff --git a/bsps/arm/altera-cyclone-v/config/altcycv_devkit_smp.cfg b/bsps/arm/altera-cyclone-v/config/altcycv_devkit_smp.cfg deleted file mode 100644 index ed54edfedd..0000000000 --- a/bsps/arm/altera-cyclone-v/config/altcycv_devkit_smp.cfg +++ /dev/null @@ -1 +0,0 @@ -include $(RTEMS_ROOT)/make/custom/altcycv.inc diff --git a/bsps/arm/altera-cyclone-v/start/linkcmds.altcycv_devkit_smp b/bsps/arm/altera-cyclone-v/start/linkcmds.altcycv_devkit_smp deleted file mode 100644 index 2da086579f..0000000000 --- a/bsps/arm/altera-cyclone-v/start/linkcmds.altcycv_devkit_smp +++ /dev/null @@ -1,3 +0,0 @@ -bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : 2; - -INCLUDE linkcmds.altcycv_devkit diff --git a/bsps/arm/csb336/start/start.S b/bsps/arm/csb336/start/start.S index ce452f52a2..2ef4cb71fa 100644 --- a/bsps/arm/csb336/start/start.S +++ b/bsps/arm/csb336/start/start.S @@ -8,20 +8,8 @@ * http://www.rtems.org/license/LICENSE. */ -#include <bsp/linker-symbols.h> - -/* Some standard definitions...*/ -.equ PSR_MODE_USR, 0x10 -.equ PSR_MODE_FIQ, 0x11 -.equ PSR_MODE_IRQ, 0x12 -.equ PSR_MODE_SVC, 0x13 -.equ PSR_MODE_ABT, 0x17 -.equ PSR_MODE_UNDEF, 0x1B -.equ PSR_MODE_SYS, 0x1F - -.equ PSR_I, 0x80 -.equ PSR_F, 0x40 -.equ PSR_T, 0x20 +#include <rtems/asm.h> +#include <rtems/score/cpu.h> .section .bsp_start_text,"ax" .code 32 @@ -36,60 +24,56 @@ _start: /* * Since I don't plan to return to the bootloader, * I don't have to save the registers. - * - * I'll just set the CPSR for SVC mode, interrupts - * off, and ARM instructions. */ - mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) - msr cpsr, r0 - - /* zero the bss */ - ldr r1, =bsp_section_bss_end - ldr r0, =bsp_section_bss_begin - -_bss_init: - mov r2, #0 - cmp r0, r1 - strlot r2, [r0], #4 - blo _bss_init /* loop while r0 < r1 */ - - /* --- Initialize stack pointer registers */ - /* Enter IRQ mode and set up the IRQ stack pointer */ - mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) /* No interrupts */ - msr cpsr, r0 - ldr r1, =bsp_stack_irq_size - ldr sp, =bsp_stack_irq_begin - add sp, sp, r1 + /* Set end of interrupt stack area */ + ldr r7, =_Configuration_Interrupt_stack_area_end /* Enter FIQ mode and set up the FIQ stack pointer */ - mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F) /* No interrupts */ + mov r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 ldr r1, =bsp_stack_fiq_size - ldr sp, =bsp_stack_fiq_begin - add sp, sp, r1 + mov sp, r7 + sub r7, r7, r1 /* Enter ABT mode and set up the ABT stack pointer */ - mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F) /* No interrupts */ + mov r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 ldr r1, =bsp_stack_abt_size - ldr sp, =bsp_stack_abt_begin - add sp, sp, r1 + mov sp, r7 + sub r7, r7, r1 - /* Enter UNDEF mode and set up the UNDEF stack pointer */ - mov r0, #(PSR_MODE_UNDEF | PSR_I | PSR_F) /* No interrupts */ + /* Enter UND mode and set up the UND stack pointer */ + mov r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 ldr r1, =bsp_stack_und_size - ldr sp, =bsp_stack_und_begin - add sp, sp, r1 + mov sp, r7 + sub r7, r7, r1 - /* Set up the SVC stack pointer last and stay in SVC mode */ - mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */ + /* Enter IRQ mode and set up the IRQ stack pointer */ + mov r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + mov sp, r7 + + /* + * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack + * (interrupts are disabled). + */ + mov r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 - ldr r1, =bsp_stack_svc_size - ldr sp, =bsp_stack_svc_begin - add sp, sp, r1 - sub sp, sp, #0x64 + mov sp, r7 + + /* Stay in SVC mode */ + + /* zero the bss */ + ldr r1, =bsp_section_bss_end + ldr r0, =bsp_section_bss_begin + +_bss_init: + mov r2, #0 + cmp r0, r1 + strlot r2, [r0], #4 + blo _bss_init /* loop while r0 < r1 */ /* * Initialize the MMU. After we return, the MMU is enabled, diff --git a/bsps/arm/csb337/start/start.S b/bsps/arm/csb337/start/start.S index f88cf41d78..a755864d0d 100644 --- a/bsps/arm/csb337/start/start.S +++ b/bsps/arm/csb337/start/start.S @@ -8,20 +8,8 @@ * http://www.rtems.org/license/LICENSE. */ -#include <bsp/linker-symbols.h> - -/* Some standard definitions...*/ -.equ PSR_MODE_USR, 0x10 -.equ PSR_MODE_FIQ, 0x11 -.equ PSR_MODE_IRQ, 0x12 -.equ PSR_MODE_SVC, 0x13 -.equ PSR_MODE_ABT, 0x17 -.equ PSR_MODE_UNDEF, 0x1B -.equ PSR_MODE_SYS, 0x1F - -.equ PSR_I, 0x80 -.equ PSR_F, 0x40 -.equ PSR_T, 0x20 +#include <rtems/asm.h> +#include <rtems/score/cpu.h> .text .globl _start @@ -29,53 +17,56 @@ _start: /* * Since I don't plan to return to the bootloader, * I don't have to save the registers. - * - * I'll just set the CPSR for SVC mode, interrupts - * off, and ARM instructions. */ - mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) - msr cpsr, r0 - /* zero the bss */ - ldr r1, =bsp_section_bss_end - ldr r0, =bsp_section_bss_begin - -_bss_init: - mov r2, #0 - cmp r0, r1 - strlot r2, [r0], #4 - blo _bss_init /* loop while r0 < r1 */ - - - /* --- Initialize stack pointer registers */ - /* Enter IRQ mode and set up the IRQ stack pointer */ - mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) /* No interrupts */ - msr cpsr, r0 - ldr r1, =bsp_stack_irq_size - ldr sp, =bsp_stack_irq_begin - add sp, sp, r1 + /* Set end of interrupt stack area */ + ldr r7, =_Configuration_Interrupt_stack_area_end /* Enter FIQ mode and set up the FIQ stack pointer */ - mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F) /* No interrupts */ + mov r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 ldr r1, =bsp_stack_fiq_size - ldr sp, =bsp_stack_fiq_begin - add sp, sp, r1 + mov sp, r7 + sub r7, r7, r1 /* Enter ABT mode and set up the ABT stack pointer */ - mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F) /* No interrupts */ + mov r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 ldr r1, =bsp_stack_abt_size - ldr sp, =bsp_stack_abt_begin - add sp, sp, r1 + mov sp, r7 + sub r7, r7, r1 + + /* Enter UND mode and set up the UND stack pointer */ + mov r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + ldr r1, =bsp_stack_und_size + mov sp, r7 + sub r7, r7, r1 - /* Set up the SVC stack pointer last and stay in SVC mode */ - mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */ + /* Enter IRQ mode and set up the IRQ stack pointer */ + mov r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 - ldr r1, =bsp_stack_svc_size - ldr sp, =bsp_stack_svc_begin - add sp, sp, r1 - sub sp, sp, #0x64 + mov sp, r7 + + /* + * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack + * (interrupts are disabled). + */ + mov r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + mov sp, r7 + + /* Stay in SVC mode */ + + /* zero the bss */ + ldr r1, =bsp_section_bss_end + ldr r0, =bsp_section_bss_begin + +_bss_init: + mov r2, #0 + cmp r0, r1 + strlot r2, [r0], #4 + blo _bss_init /* loop while r0 < r1 */ /* * Initialize the MMU. After we return, the MMU is enabled, diff --git a/bsps/arm/edb7312/start/start.S b/bsps/arm/edb7312/start/start.S index e03707bfcf..5806d41ce4 100644 --- a/bsps/arm/edb7312/start/start.S +++ b/bsps/arm/edb7312/start/start.S @@ -12,21 +12,8 @@ * http://www.rtems.org/license/LICENSE. */ -#include <bsp/linker-symbols.h> - -/* Some standard definitions...*/ - -.equ Mode_USR, 0x10 -.equ Mode_FIQ, 0x11 -.equ Mode_IRQ, 0x12 -.equ Mode_SVC, 0x13 -.equ Mode_ABT, 0x17 -.equ Mode_ABORT, 0x17 -.equ Mode_UNDEF, 0x1B -.equ Mode_SYS, 0x1F /*only available on ARM Arch. v4*/ - -.equ I_Bit, 0x80 -.equ F_Bit, 0x40 +#include <rtems/asm.h> +#include <rtems/score/cpu.h> .section ".bsp_start_text", "ax" .arm @@ -72,8 +59,44 @@ handler_addr_fiq: .globl _start _start: - /* store the sp */ - mov r12, sp + /* Set end of interrupt stack area */ + ldr r7, =_Configuration_Interrupt_stack_area_end + + /* Enter FIQ mode and set up the FIQ stack pointer */ + mov r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + ldr r1, =bsp_stack_fiq_size + mov sp, r7 + sub r7, r7, r1 + + /* Enter ABT mode and set up the ABT stack pointer */ + mov r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + ldr r1, =bsp_stack_abt_size + mov sp, r7 + sub r7, r7, r1 + + /* Enter UND mode and set up the UND stack pointer */ + mov r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + ldr r1, =bsp_stack_und_size + mov sp, r7 + sub r7, r7, r1 + + /* Enter IRQ mode and set up the IRQ stack pointer */ + mov r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + mov sp, r7 + + /* + * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack + * (interrupts are disabled). + */ + mov r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + mov sp, r7 + + /* Stay in SVC mode */ /* * Here is the code to initialize the low-level BSP environment * (Chip Select, PLL, ....?) @@ -89,48 +112,7 @@ zi_init: STRLOT r2, [r0], #4 BLO zi_init -/* --- Initialise stack pointer registers */ - -/* Enter IRQ mode and set up the IRQ stack pointer */ - MOV r0, #Mode_IRQ | I_Bit | F_Bit /* No interrupts */ - MSR cpsr, r0 - ldr r1, =bsp_stack_irq_size - LDR sp, =bsp_stack_irq_begin - add sp, sp, r1 - sub sp, sp, #0x64 - -/* Enter FIQ mode and set up the FIQ stack pointer */ - MOV r0, #Mode_FIQ | I_Bit | F_Bit /* No interrupts */ - MSR cpsr, r0 - ldr r1, =bsp_stack_fiq_size - LDR sp, =bsp_stack_fiq_begin - add sp, sp, r1 - sub sp, sp, #0x64 - -/* Enter ABT mode and set up the ABT stack pointer */ - MOV r0, #Mode_ABT | I_Bit | F_Bit /* No interrupts */ - MSR cpsr, r0 - ldr r1, =bsp_stack_abt_size - LDR sp, =bsp_stack_abt_begin - add sp, sp, r1 - sub sp, sp, #0x64 - -/* Set up the SVC stack pointer last and stay in SVC mode */ - MOV r0, #Mode_SVC | I_Bit | F_Bit /* No interrupts */ - MSR cpsr, r0 - ldr r1, =bsp_stack_svc_size - LDR sp, =bsp_stack_svc_begin - add sp, sp, r1 - sub sp, sp, #0x64 - - /* save the original registers */ - stmdb sp!, {r4-r12, lr} - /* --- Now we enter the C code */ mov r0, #0 bl boot_card - - ldmia sp!, {r4-r12, lr} - mov sp, r12 - mov pc, lr diff --git a/bsps/arm/gumstix/start/start.S b/bsps/arm/gumstix/start/start.S index dccc99993e..7c71bdacf1 100644 --- a/bsps/arm/gumstix/start/start.S +++ b/bsps/arm/gumstix/start/start.S @@ -7,20 +7,8 @@ * http://www.rtems.org/license/LICENSE. */ -#include <bsp/linker-symbols.h> - -/* Some standard definitions...*/ -.equ PSR_MODE_USR, 0x10 -.equ PSR_MODE_FIQ, 0x11 -.equ PSR_MODE_IRQ, 0x12 -.equ PSR_MODE_SVC, 0x13 -.equ PSR_MODE_ABT, 0x17 -.equ PSR_MODE_UNDEF, 0x1B -.equ PSR_MODE_SYS, 0x1F - -.equ PSR_I, 0x80 -.equ PSR_F, 0x40 -.equ PSR_T, 0x20 +#include <rtems/asm.h> +#include <rtems/score/cpu.h> .text .globl _start @@ -28,53 +16,56 @@ _start: /* * Since I don't plan to return to the bootloader, * I don't have to save the registers. - * - * I'll just set the CPSR for SVC mode, interrupts - * off, and ARM instructions. */ - mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) - msr cpsr, r0 - - /* zero the bss */ - ldr r1, =bsp_section_bss_end - ldr r0, =bsp_section_bss_begin - -_bss_init: - mov r2, #0 - cmp r0, r1 - strlot r2, [r0], #4 - blo _bss_init /* loop while r0 < r1 */ - - /* --- Initialize stack pointer registers */ - /* Enter IRQ mode and set up the IRQ stack pointer */ - mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) /* No interrupts */ - msr cpsr, r0 - ldr r1, =bsp_stack_irq_size - ldr sp, =bsp_stack_irq_begin - add sp, sp, r1 + /* Set end of interrupt stack area */ + ldr r7, =_Configuration_Interrupt_stack_area_end /* Enter FIQ mode and set up the FIQ stack pointer */ - mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F) /* No interrupts */ + mov r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 ldr r1, =bsp_stack_fiq_size - ldr sp, =bsp_stack_fiq_begin - add sp, sp, r1 + mov sp, r7 + sub r7, r7, r1 /* Enter ABT mode and set up the ABT stack pointer */ - mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F) /* No interrupts */ + mov r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 ldr r1, =bsp_stack_abt_size - ldr sp, =bsp_stack_abt_begin - add sp, sp, r1 + mov sp, r7 + sub r7, r7, r1 - /* Set up the SVC stack pointer last and stay in SVC mode */ - mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */ + /* Enter UND mode and set up the UND stack pointer */ + mov r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 ldr r1, =bsp_stack_und_size - ldr sp, =bsp_stack_und_begin - add sp, sp, r1 - sub sp, sp, #0x64 + mov sp, r7 + sub r7, r7, r1 + + /* Enter IRQ mode and set up the IRQ stack pointer */ + mov r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + mov sp, r7 + + /* + * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack + * (interrupts are disabled). + */ + mov r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + mov sp, r7 + + /* Stay in SVC mode */ + + /* zero the bss */ + ldr r1, =bsp_section_bss_end + ldr r0, =bsp_section_bss_begin + +_bss_init: + mov r2, #0 + cmp r0, r1 + strlot r2, [r0], #4 + blo _bss_init /* loop while r0 < r1 */ /* * Initialize the MMU. After we return, the MMU is enabled, diff --git a/bsps/arm/imx/start/linkcmds.imx7 b/bsps/arm/imx/start/linkcmds.imx7 index 750e1def1d..0d9fe48bf9 100644 --- a/bsps/arm/imx/start/linkcmds.imx7 +++ b/bsps/arm/imx/start/linkcmds.imx7 @@ -22,9 +22,6 @@ REGION_ALIAS ("REGION_STACK", RAM); REGION_ALIAS ("REGION_NOCACHE", NOCACHE); REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE); -bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : 2; - -bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096; bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024; bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M; diff --git a/bsps/arm/include/bsp/linker-symbols.h b/bsps/arm/include/bsp/linker-symbols.h index 1a996f51f2..135c85f215 100644 --- a/bsps/arm/include/bsp/linker-symbols.h +++ b/bsps/arm/include/bsp/linker-symbols.h @@ -43,30 +43,11 @@ extern "C" { #define LINKER_SYMBOL(sym) .extern sym #endif -LINKER_SYMBOL(bsp_stack_irq_begin) -LINKER_SYMBOL(bsp_stack_irq_end) -LINKER_SYMBOL(bsp_stack_irq_size) - -LINKER_SYMBOL(bsp_stack_fiq_begin) -LINKER_SYMBOL(bsp_stack_fiq_end) -LINKER_SYMBOL(bsp_stack_irq_size) - -LINKER_SYMBOL(bsp_stack_abt_begin) -LINKER_SYMBOL(bsp_stack_abt_end) +LINKER_SYMBOL(bsp_stack_fiq_size) LINKER_SYMBOL(bsp_stack_abt_size) - -LINKER_SYMBOL(bsp_stack_und_begin) -LINKER_SYMBOL(bsp_stack_und_end) LINKER_SYMBOL(bsp_stack_und_size) - -LINKER_SYMBOL(bsp_stack_hyp_begin) -LINKER_SYMBOL(bsp_stack_hyp_end) LINKER_SYMBOL(bsp_stack_hyp_size) -LINKER_SYMBOL(bsp_stack_svc_begin) -LINKER_SYMBOL(bsp_stack_svc_end) -LINKER_SYMBOL(bsp_stack_svc_size) - LINKER_SYMBOL(bsp_section_start_begin) LINKER_SYMBOL(bsp_section_start_end) LINKER_SYMBOL(bsp_section_start_size) @@ -156,8 +137,6 @@ LINKER_SYMBOL(bsp_translation_table_end) #define BSP_NOCACHENOLOAD_SUBSECTION(subsection) \ __attribute__((section(".bsp_noload_nocache." # subsection))) -LINKER_SYMBOL(bsp_processor_count) - /** @} */ #ifdef __cplusplus diff --git a/bsps/arm/raspberrypi/start/bspsmp.c b/bsps/arm/raspberrypi/start/bspsmp.c index c3e5451442..44f7a1d376 100644 --- a/bsps/arm/raspberrypi/start/bspsmp.c +++ b/bsps/arm/raspberrypi/start/bspsmp.c @@ -57,12 +57,7 @@ bool _CPU_SMP_Start_processor( uint32_t cpu_index ) uint32_t _CPU_SMP_Initialize(void) { - uint32_t cpu_count = (uint32_t)bsp_processor_count; - - if ( cpu_count > 4 ) - cpu_count = 4; - - return cpu_count; + return 4; } void _CPU_SMP_Finalize_initialization( uint32_t cpu_count ) diff --git a/bsps/arm/raspberrypi/start/linkcmds.in b/bsps/arm/raspberrypi/start/linkcmds index 829716c11c..58423abecb 100644 --- a/bsps/arm/raspberrypi/start/linkcmds.in +++ b/bsps/arm/raspberrypi/start/linkcmds @@ -41,8 +41,6 @@ MEMORY { RAM (AIW) : ORIGIN = 0x00008000, LENGTH = 128M - 32k } -bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : @RASPBERRYPI_CPUS@; - REGION_ALIAS ("REGION_START", RAM); REGION_ALIAS ("REGION_VECTOR", VECTOR_RAM); REGION_ALIAS ("REGION_TEXT", RAM); @@ -61,7 +59,6 @@ REGION_ALIAS ("REGION_STACK", RAM); REGION_ALIAS ("REGION_NOCACHE", RAM); REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM); -bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 3008; bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024; bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1M; diff --git a/bsps/arm/realview-pbx-a9/config/realview_pbx_a9_qemu_smp.cfg b/bsps/arm/realview-pbx-a9/config/realview_pbx_a9_qemu_smp.cfg deleted file mode 100644 index fd51a18004..0000000000 --- a/bsps/arm/realview-pbx-a9/config/realview_pbx_a9_qemu_smp.cfg +++ /dev/null @@ -1 +0,0 @@ -include $(RTEMS_ROOT)/make/custom/realview_pbx_a9_qemu.cfg diff --git a/bsps/arm/realview-pbx-a9/start/linkcmds.realview_pbx_a9_qemu_smp b/bsps/arm/realview-pbx-a9/start/linkcmds.realview_pbx_a9_qemu_smp deleted file mode 100644 index d31c4f08ae..0000000000 --- a/bsps/arm/realview-pbx-a9/start/linkcmds.realview_pbx_a9_qemu_smp +++ /dev/null @@ -1,3 +0,0 @@ -bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : 8; - -INCLUDE linkcmds.realview_pbx_a9_qemu diff --git a/bsps/arm/rtl22xx/start/start.S b/bsps/arm/rtl22xx/start/start.S index c038198aff..0fc265493d 100644 --- a/bsps/arm/rtl22xx/start/start.S +++ b/bsps/arm/rtl22xx/start/start.S @@ -8,20 +8,8 @@ * http://www.rtems.org/license/LICENSE. */ -#include <bsp/linker-symbols.h> - -/* Some standard definitions...*/ -.equ PSR_MODE_USR, 0x10 -.equ PSR_MODE_FIQ, 0x11 -.equ PSR_MODE_IRQ, 0x12 -.equ PSR_MODE_SVC, 0x13 -.equ PSR_MODE_ABT, 0x17 -.equ PSR_MODE_UNDEF, 0x1B -.equ PSR_MODE_SYS, 0x1F - -.equ PSR_I, 0x80 -.equ PSR_F, 0x40 -.equ PSR_T, 0x20 +#include <rtems/asm.h> +#include <rtems/score/cpu.h> .text .code 32 @@ -30,45 +18,46 @@ _start: /* * Since I don't plan to return to the bootloader, * I don't have to save the registers. - * - * I'll just set the CPSR for SVC mode, interrupts - * off, and ARM instructions. */ - /* --- Initialize stack pointer registers */ - /* Enter IRQ mode and set up the IRQ stack pointer */ - mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) /* No interrupts */ - bic r0, r0, #PSR_T - msr cpsr, r0 - ldr r1, =bsp_stack_irq_size - ldr sp, =bsp_stack_irq_begin - add sp, sp, r1 + /* Set end of interrupt stack area */ + ldr r7, =_Configuration_Interrupt_stack_area_end /* Enter FIQ mode and set up the FIQ stack pointer */ - mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F) /* No interrupts */ - bic r0, r0, #PSR_T + mov r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 ldr r1, =bsp_stack_fiq_size - ldr sp, =bsp_stack_fiq_begin - add sp, sp, r1 + mov sp, r7 + sub r7, r7, r1 /* Enter ABT mode and set up the ABT stack pointer */ - mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F) /* No interrupts */ - bic r0, r0, #PSR_T + mov r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 - bic r0, r0, #PSR_T ldr r1, =bsp_stack_abt_size - ldr sp, =bsp_stack_abt_begin - add sp, sp, r1 + mov sp, r7 + sub r7, r7, r1 + + /* Enter UND mode and set up the UND stack pointer */ + mov r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + ldr r1, =bsp_stack_und_size + mov sp, r7 + sub r7, r7, r1 - /* Set up the SVC stack pointer last and stay in SVC mode */ - mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */ - bic r0, r0, #PSR_T + /* Enter IRQ mode and set up the IRQ stack pointer */ + mov r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + mov sp, r7 + + /* + * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack + * (interrupts are disabled). + */ + mov r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 - ldr r1, =bsp_stack_svc_size - ldr sp, =bsp_stack_svc_begin - add sp, sp, r1 - sub sp, sp, #0x64 + mov sp, r7 + + /* Stay in SVC mode */ /* * Initialize the exception vectors. This includes the diff --git a/bsps/arm/shared/start/arm-a9mpcore-smp.c b/bsps/arm/shared/start/arm-a9mpcore-smp.c index a3a95f4ea2..a8d3a541d4 100644 --- a/bsps/arm/shared/start/arm-a9mpcore-smp.c +++ b/bsps/arm/shared/start/arm-a9mpcore-smp.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2015 embedded brains GmbH. All rights reserved. + * Copyright (c) 2013, 2018 embedded brains GmbH. All rights reserved. * * embedded brains GmbH * Dornierstr. 4 @@ -19,7 +19,6 @@ #include <libcpu/arm-cp15.h> #include <bsp/irq.h> -#include <bsp/linker-symbols.h> static void bsp_inter_processor_interrupt(void *arg) { @@ -28,10 +27,7 @@ static void bsp_inter_processor_interrupt(void *arg) uint32_t _CPU_SMP_Initialize(void) { - uint32_t hardware_count = arm_gic_irq_processor_count(); - uint32_t linker_count = (uint32_t) bsp_processor_count; - - return hardware_count <= linker_count ? hardware_count : linker_count; + return arm_gic_irq_processor_count(); } void _CPU_SMP_Finalize_initialization(uint32_t cpu_count) diff --git a/bsps/arm/shared/start/linkcmds.base b/bsps/arm/shared/start/linkcmds.base index 5a669d87a8..cab8e85674 100644 --- a/bsps/arm/shared/start/linkcmds.base +++ b/bsps/arm/shared/start/linkcmds.base @@ -45,25 +45,12 @@ bsp_stack_abt_size = ALIGN (bsp_stack_abt_size, bsp_stack_align); bsp_stack_fiq_size = DEFINED (bsp_stack_fiq_size) ? bsp_stack_fiq_size : 0; bsp_stack_fiq_size = ALIGN (bsp_stack_fiq_size, bsp_stack_align); -bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 0; -bsp_stack_irq_size = ALIGN (bsp_stack_irq_size, bsp_stack_align); - -bsp_stack_svc_size = DEFINED (bsp_stack_svc_size) ? bsp_stack_svc_size : 0; -bsp_stack_svc_size = ALIGN (bsp_stack_svc_size, bsp_stack_align); - bsp_stack_und_size = DEFINED (bsp_stack_und_size) ? bsp_stack_und_size : 0; bsp_stack_und_size = ALIGN (bsp_stack_und_size, bsp_stack_align); bsp_stack_hyp_size = DEFINED (bsp_stack_hyp_size) ? bsp_stack_hyp_size : 0; bsp_stack_hyp_size = ALIGN (bsp_stack_hyp_size, bsp_stack_align); -bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 0; -bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align); - -bsp_stack_all_size = bsp_stack_abt_size + bsp_stack_fiq_size + bsp_stack_irq_size + bsp_stack_svc_size + bsp_stack_und_size + bsp_stack_hyp_size + bsp_stack_main_size; - -bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : 1; - MEMORY { UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0 } @@ -297,44 +284,7 @@ SECTIONS { .vector : ALIGN_WITH_INPUT { bsp_section_vector_begin = .; - . = . + DEFINED (bsp_vector_table_in_start_section) ? 0 : bsp_vector_table_size; - - . = ALIGN (bsp_stack_align); - - bsp_stack_irq_begin = .; - . = . + bsp_stack_irq_size; - bsp_stack_irq_end = .; - - bsp_stack_svc_begin = .; - . = . + bsp_stack_svc_size; - bsp_stack_svc_end = .; - - bsp_stack_fiq_begin = .; - . = . + bsp_stack_fiq_size; - bsp_stack_fiq_end = .; - - bsp_stack_und_begin = .; - . = . + bsp_stack_und_size; - bsp_stack_und_end = .; - - bsp_stack_hyp_begin = .; - . = . + bsp_stack_hyp_size; - bsp_stack_hyp_end = .; - - bsp_stack_abt_begin = .; - . = . + bsp_stack_abt_size; - bsp_stack_abt_end = .; - - bsp_stack_main_begin = .; - . = . + bsp_stack_main_size; - bsp_stack_main_end = .; - - bsp_stack_secondary_processors_begin = .; - . = . + (bsp_processor_count - 1) * bsp_stack_all_size; - bsp_stack_secondary_processors_end = .; - - *(.bsp_vector) } > REGION_VECTOR AT > REGION_VECTOR .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) diff --git a/bsps/arm/shared/start/start.S b/bsps/arm/shared/start/start.S index aa0f3782c9..148625ff97 100644 --- a/bsps/arm/shared/start/start.S +++ b/bsps/arm/shared/start/start.S @@ -5,7 +5,7 @@ */ /* - * Copyright (c) 2008, 2016 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008, 2018 embedded brains GmbH. All rights reserved. * * embedded brains GmbH * Dornierstr. 4 @@ -19,45 +19,10 @@ */ #include <rtems/asm.h> -#include <rtems/system.h> #include <rtems/score/percpu.h> - + #include <bspopts.h> #include <bsp/irq.h> -#include <bsp/linker-symbols.h> - - /* External symbols */ - .extern bsp_reset - .extern boot_card - .extern bsp_start_hook_0 - .extern bsp_start_hook_1 - .extern bsp_stack_irq_end - .extern bsp_stack_fiq_end - .extern bsp_stack_abt_end - .extern bsp_stack_und_end - .extern bsp_stack_svc_end -#ifdef RTEMS_SMP - .extern bsp_stack_all_size -#endif - .extern _ARMV4_Exception_undef_default - .extern _ARMV4_Exception_swi_default - .extern _ARMV4_Exception_data_abort_default - .extern _ARMV4_Exception_pref_abort_default - .extern _ARMV4_Exception_reserved_default - .extern _ARMV4_Exception_interrupt - .extern _ARMV4_Exception_fiq_default - .extern _ARMV7M_Exception_default - -#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION - .extern bsp_start_init_registers_core - .extern bsp_start_init_registers_banked_fiq - .extern bsp_start_init_registers_vfp -#endif - -#ifdef BSP_START_IN_HYP_SUPPORT - .extern bsp_start_arm_drop_hyp_mode - .globl bsp_start_hyp_vector_table_begin -#endif /* Global symbols */ .globl _start @@ -65,12 +30,17 @@ .globl bsp_start_vector_table_end .globl bsp_start_vector_table_size .globl bsp_vector_table_size - .globl bsp_start_hook_0_done .section ".bsp_start_text", "ax" #if defined(ARM_MULTILIB_ARCH_V4) + .globl bsp_start_hook_0_done + +#ifdef BSP_START_IN_HYP_SUPPORT + .globl bsp_start_hyp_vector_table_begin +#endif + .arm /* @@ -208,12 +178,20 @@ _start: add r1, r1, r7, asl #PER_CPU_CONTROL_SIZE_LOG2 mcr p15, 0, r1, c13, c0, 4 - /* Calculate stack offset */ - ldr r1, =bsp_stack_all_size - mul r1, r7 #endif - mrs r4, cpsr /* save original procesor status value */ + /* Calculate interrupt stack area end for current processor */ + ldr r1, =_Configuration_Interrupt_stack_size +#ifdef RTEMS_SMP + add r7, #1 + mul r1, r1, r7 +#endif + ldr r2, =_Configuration_Interrupt_stack_area_begin + add r7, r1, r2 + + /* Save original CPSR value */ + mrs r4, cpsr + #ifdef BSP_START_IN_HYP_SUPPORT orr r0, r4, #(ARM_PSR_I | ARM_PSR_F) msr cpsr, r4 @@ -222,38 +200,22 @@ _start: cmp r0, #ARM_PSR_M_HYP bne bsp_start_skip_hyp_svc_switch - /* Boot loader stats kernel in HYP mode, switch to SVC necessary */ - ldr sp, =bsp_stack_hyp_end -#ifdef RTEMS_SMP - add sp, r1 -#endif + /* Boot loader starts kernel in HYP mode, switch to SVC necessary */ + ldr r1, =bsp_stack_hyp_size + mov sp, r7 + sub r7, r7, r1 bl bsp_start_arm_drop_hyp_mode bsp_start_skip_hyp_svc_switch: #endif - /* - * Set SVC mode, disable interrupts and enable ARM instructions. - */ - mov r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F) - msr cpsr, r0 - /* Initialize stack pointer registers for the various modes */ - /* Enter IRQ mode and set up the IRQ stack pointer */ - mov r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F) - msr cpsr, r0 - ldr sp, =bsp_stack_irq_end -#ifdef RTEMS_SMP - add sp, r1 -#endif - /* Enter FIQ mode and set up the FIQ stack pointer */ mov r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 - ldr sp, =bsp_stack_fiq_end -#ifdef RTEMS_SMP - add sp, r1 -#endif + ldr r1, =bsp_stack_fiq_size + mov sp, r7 + sub r7, r7, r1 #ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION bl bsp_start_init_registers_banked_fiq @@ -262,26 +224,29 @@ bsp_start_skip_hyp_svc_switch: /* Enter ABT mode and set up the ABT stack pointer */ mov r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 - ldr sp, =bsp_stack_abt_end -#ifdef RTEMS_SMP - add sp, r1 -#endif + ldr r1, =bsp_stack_abt_size + mov sp, r7 + sub r7, r7, r1 /* Enter UND mode and set up the UND stack pointer */ mov r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 - ldr sp, =bsp_stack_und_end -#ifdef RTEMS_SMP - add sp, r1 -#endif + ldr r1, =bsp_stack_und_size + mov sp, r7 + sub r7, r7, r1 + + /* Enter IRQ mode and set up the IRQ stack pointer */ + mov r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + mov sp, r7 - /* Enter SVC mode and set up the SVC stack pointer */ + /* + * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack + * (interrupts are disabled). + */ mov r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 - ldr sp, =bsp_stack_svc_end -#ifdef RTEMS_SMP - add sp, r1 -#endif + mov sp, r7 /* Stay in SVC mode */ @@ -333,7 +298,7 @@ bsp_start_skip_hyp_svc_switch: SWITCH_FROM_ARM_TO_THUMB r0 - mov r0, r4 /* original cpsr value */ + mov r0, r4 /* original CPSR value */ mov r1, r5 /* machine type number or ~0 for DT boot */ mov r2, r6 /* physical address of ATAGs or DTB */ @@ -385,13 +350,11 @@ twiddle: .syntax unified - .extern bsp_stack_main_end - .thumb bsp_start_vector_table_begin: - .word bsp_stack_main_end + .word _Configuration_Interrupt_stack_area_end .word _start /* Reset */ .word _ARMV7M_Exception_default /* NMI */ .word _ARMV7M_Exception_default /* Hard Fault */ @@ -441,7 +404,7 @@ _start: #endif /* ARM_MULTILIB_VFP */ - ldr sp, =bsp_stack_main_end + ldr sp, =_Configuration_Interrupt_stack_area_end ldr lr, =bsp_start_hook_0_done + 1 b bsp_start_hook_0 diff --git a/bsps/arm/smdk2410/start/start.S b/bsps/arm/smdk2410/start/start.S index 95d781cb89..b8d1ddefa0 100644 --- a/bsps/arm/smdk2410/start/start.S +++ b/bsps/arm/smdk2410/start/start.S @@ -8,20 +8,8 @@ * http://www.rtems.org/license/LICENSE. */ -#include <bsp/linker-symbols.h> - -/* Some standard definitions...*/ -.equ PSR_MODE_USR, 0x10 -.equ PSR_MODE_FIQ, 0x11 -.equ PSR_MODE_IRQ, 0x12 -.equ PSR_MODE_SVC, 0x13 -.equ PSR_MODE_ABT, 0x17 -.equ PSR_MODE_UNDEF, 0x1B -.equ PSR_MODE_SYS, 0x1F - -.equ PSR_I, 0x80 -.equ PSR_F, 0x40 -.equ PSR_T, 0x20 +#include <rtems/asm.h> +#include <rtems/score/cpu.h> .text .globl _start @@ -65,43 +53,46 @@ _start2: /* * Since I don't plan to return to the bootloader, * I don't have to save the registers. - * - * I'll just set the CPSR for SVC mode, interrupts - * off, and ARM instructions. */ - mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) - msr cpsr, r0 - /* --- Initialize stack pointer registers */ - /* Enter IRQ mode and set up the IRQ stack pointer */ - mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) /* No interrupts */ - msr cpsr, r0 - ldr r1, =bsp_stack_irq_size - ldr sp, =bsp_stack_irq_begin - add sp, sp, r1 + /* Set end of interrupt stack area */ + ldr r7, =_Configuration_Interrupt_stack_area_end /* Enter FIQ mode and set up the FIQ stack pointer */ - mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F) /* No interrupts */ + mov r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 ldr r1, =bsp_stack_fiq_size - ldr sp, =bsp_stack_fiq_begin - add sp, sp, r1 + mov sp, r7 + sub r7, r7, r1 /* Enter ABT mode and set up the ABT stack pointer */ - mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F) /* No interrupts */ + mov r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 ldr r1, =bsp_stack_abt_size - ldr sp, =bsp_stack_abt_begin - add sp, sp, r1 + mov sp, r7 + sub r7, r7, r1 + + /* Enter UND mode and set up the UND stack pointer */ + mov r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + ldr r1, =bsp_stack_und_size + mov sp, r7 + sub r7, r7, r1 + + /* Enter IRQ mode and set up the IRQ stack pointer */ + mov r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F) + msr cpsr, r0 + mov sp, r7 - /* Set up the SVC stack pointer last and stay in SVC mode */ - mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */ + /* + * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack + * (interrupts are disabled). + */ + mov r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 - ldr r1, =bsp_stack_svc_size - ldr sp, =bsp_stack_svc_begin - add sp, sp, r1 - sub sp, sp, #0x64 + mov sp, r7 + /* Stay in SVC mode */ /* disable mmu, I and D caches*/ nop diff --git a/bsps/arm/xilinx-zynq/start/linkcmds.in b/bsps/arm/xilinx-zynq/start/linkcmds.in index 7fd6e2772d..b56309bf37 100644 --- a/bsps/arm/xilinx-zynq/start/linkcmds.in +++ b/bsps/arm/xilinx-zynq/start/linkcmds.in @@ -6,8 +6,6 @@ MEMORY { NOCACHE : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@ + @ZYNQ_RAM_LENGTH_AVAILABLE@ - @ZYNQ_RAM_NOCACHE_LENGTH@, LENGTH = @ZYNQ_RAM_NOCACHE_LENGTH@ } -bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : @ZYNQ_CPUS@; - REGION_ALIAS ("REGION_START", RAM); REGION_ALIAS ("REGION_VECTOR", RAM); REGION_ALIAS ("REGION_TEXT", RAM); @@ -26,7 +24,6 @@ REGION_ALIAS ("REGION_STACK", RAM); REGION_ALIAS ("REGION_NOCACHE", NOCACHE); REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE); -bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096; bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024; bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M; diff --git a/bsps/bfin/TLL6527M/start/linkcmds b/bsps/bfin/TLL6527M/start/linkcmds index 8c7b373864..17b9e244ca 100644 --- a/bsps/bfin/TLL6527M/start/linkcmds +++ b/bsps/bfin/TLL6527M/start/linkcmds @@ -11,7 +11,6 @@ STARTUP(start.o) _RamBase = DEFINED(_RamBase) ? _RamBase : 0x0; _RamSize = DEFINED(_RamSize) ? _RamSize : 0x04000000; _HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x10000; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x10000; MEMORY { @@ -123,8 +122,6 @@ SECTIONS *(.gnu.linkonce.b.*) *(COMMON) . = ALIGN (64); - _stack_init = .; - . += _StackSize; _clear_end = .; _end = .; __end = .; @@ -170,7 +167,6 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - /*.stack 0x80000 : { _stack = .; *(.stack) }*/ /* These must appear regardless of . */ } diff --git a/bsps/bfin/bf537Stamp/start/linkcmds b/bsps/bfin/bf537Stamp/start/linkcmds index c9925525c9..1492da027a 100644 --- a/bsps/bfin/bf537Stamp/start/linkcmds +++ b/bsps/bfin/bf537Stamp/start/linkcmds @@ -15,7 +15,6 @@ _RamBase = DEFINED(_RamBase) ? _RamBase : 0x0; to free up mmu entries. */ _RamSize = DEFINED(_RamSize) ? _RamSize : 0x03400000; _HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000; MEMORY { @@ -131,8 +130,6 @@ SECTIONS *(.gnu.linkonce.b.*) *(COMMON) . = ALIGN (64); - _stack_init = .; - . += _StackSize; _clear_end = .; _end = .; __end = .; @@ -178,7 +175,6 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - /*.stack 0x80000 : { _stack = .; *(.stack) }*/ /* These must appear regardless of . */ } diff --git a/bsps/bfin/eZKit533/start/linkcmds b/bsps/bfin/eZKit533/start/linkcmds index 0fc2da123d..90451bd46a 100644 --- a/bsps/bfin/eZKit533/start/linkcmds +++ b/bsps/bfin/eZKit533/start/linkcmds @@ -11,7 +11,6 @@ STARTUP(start.o) _RamBase = DEFINED(_RamBase) ? _RamBase : 0x0; _RamSize = DEFINED(_RamSize) ? _RamSize : 0x01000000; _HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000; MEMORY { @@ -120,8 +119,6 @@ SECTIONS *(.gnu.linkonce.b.*) *(COMMON) . = ALIGN (64); - _stack_init = .; - . += _StackSize; _clear_end = .; _end = .; __end = .; @@ -167,7 +164,6 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - /*.stack 0x80000 : { _stack = .; *(.stack) }*/ /* These must appear regardless of . */ } diff --git a/bsps/lm32/lm32_evr/start/linkcmds b/bsps/lm32/lm32_evr/start/linkcmds index d4b3147c63..c89940dd1c 100644 --- a/bsps/lm32/lm32_evr/start/linkcmds +++ b/bsps/lm32/lm32_evr/start/linkcmds @@ -12,9 +12,7 @@ STARTUP(start.o) RamBase = DEFINED(RamBase) ? RamBase : 0x08000000; RamSize = DEFINED(RamSize) ? RamSize : 32M; HeapSize = DEFINED(HeapSize) ? HeapSize : 2M; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x2000; -PROVIDE (__stack = 0); MEMORY { ebr : ORIGIN = 0x04000000 , LENGTH = 32k sdram : ORIGIN = 0x08000000 , LENGTH = 32M @@ -249,11 +247,7 @@ SECTIONS __rtems_end = . ; PROVIDE (end = .); - . += _StackSize; - _fstack = .; - . = ALIGN (16); - _stack_init = .; _clear_end = .; } > sdram diff --git a/bsps/lm32/milkymist/start/linkcmds b/bsps/lm32/milkymist/start/linkcmds index 6a2721005a..28779a80a8 100644 --- a/bsps/lm32/milkymist/start/linkcmds +++ b/bsps/lm32/milkymist/start/linkcmds @@ -12,9 +12,7 @@ STARTUP(start.o) RamBase = DEFINED(RamBase) ? RamBase : 0x40000000; RamSize = DEFINED(RamSize) ? RamSize : 128M; HeapSize = DEFINED(HeapSize) ? HeapSize : 92M; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x2000; -PROVIDE (__stack = 0); MEMORY { sdram : ORIGIN = 0x40000000 , LENGTH = 128M } @@ -248,11 +246,7 @@ SECTIONS __rtems_end = . ; PROVIDE (end = .); - . += _StackSize; - _fstack = .; - . = ALIGN (16); - _stack_init = .; _clear_end = .; } > sdram diff --git a/bsps/lm32/shared/start/start.S b/bsps/lm32/shared/start/start.S index 71cbb54119..3f4a6c672b 100644 --- a/bsps/lm32/shared/start/start.S +++ b/bsps/lm32/shared/start/start.S @@ -126,8 +126,8 @@ crt0: nop nop /* Initialize stack pointer */ - mvhi sp, hi(_fstack-4) - ori sp, sp, lo(_fstack-4) + mvhi sp, hi(_Configuration_Interrupt_stack_area_end-4) + ori sp, sp, lo(_Configuration_Interrupt_stack_area_end-4) /* Initialize global pointer */ mvhi gp, hi(_edata) ori gp, gp, lo(_edata) diff --git a/bsps/m32c/m32cbsp/start/linkcmds b/bsps/m32c/m32cbsp/start/linkcmds index 201b26fb2c..9863f360b0 100644 --- a/bsps/m32c/m32cbsp/start/linkcmds +++ b/bsps/m32c/m32cbsp/start/linkcmds @@ -4,8 +4,6 @@ _RamBase = DEFINED(_RamBase) ? _RamBase : 0x200000; _RamSize = DEFINED(_RamSize) ? _RamSize : 0x800000; _HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000; - /* Default linker script, for normal executables */ OUTPUT_FORMAT("elf32-m32c", "elf32-m32c", @@ -153,10 +151,6 @@ SECTIONS PROVIDE (end = .); } > RAM PROVIDE (__bsssize = 0); - . = ALIGN(16); - - . += _StackSize; - PROVIDE (__stack = .); .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) @@ -167,14 +161,6 @@ SECTIONS PROVIDE (_WorkAreaEnd = .); PROVIDE (_WorkAreaSize = _WorkAreaEnd - _WorkAreaBase); -/* - .stack (0x200000 + 0x800000 - 2) : - { - PROVIDE (__stack = .); - *(.stack) - } -*/ - .vec : { *(.vec) } > VEC diff --git a/bsps/m32c/m32cbsp/start/start.S b/bsps/m32c/m32cbsp/start/start.S index e8268a7bec..029cc09a58 100644 --- a/bsps/m32c/m32cbsp/start/start.S +++ b/bsps/m32c/m32cbsp/start/start.S @@ -48,7 +48,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. _start: .LFB2: fset U /* User stack */ - ldc #__stack,sp + ldc #__Configuration_Interrupt_stack_area_end,sp #ifdef A16 mov.b #%hi8(__romdatastart),r1h diff --git a/bsps/m68k/gen68340/start/linkcmds b/bsps/m68k/gen68340/start/linkcmds index 99eeb3bf70..3621474fe8 100644 --- a/bsps/m68k/gen68340/start/linkcmds +++ b/bsps/m68k/gen68340/start/linkcmds @@ -21,7 +21,6 @@ RamBase = DEFINED(RamBase) ? RamBase : 0x10000000; RamSize = DEFINED(RamSize) ? RamSize : 4M; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000; /* * Declare on-board memory. @@ -186,10 +185,6 @@ SECTIONS { *(COMMON) . = ALIGN (16); PROVIDE (end = .); - - . += _StackSize; - . = ALIGN (16); - _stack_init = .; _clear_end = .; } >ram diff --git a/bsps/m68k/gen68340/start/start.S b/bsps/m68k/gen68340/start/start.S index 794c6d75b6..85b9aa86fa 100644 --- a/bsps/m68k/gen68340/start/start.S +++ b/bsps/m68k/gen68340/start/start.S @@ -850,7 +850,7 @@ ZEROLOOPTEST: cmpl a1,a0 | Done? bcs.s ZEROLOOP | No, skip - movel #_stack_init,a7 | set master stack pointer + movel #_Configuration_Interrupt_stack_area_end,a7 | set master stack pointer movel d0,a7@- | command line jsr SYM(boot_card) | Call C main diff --git a/bsps/m68k/gen68360/start/linkcmds b/bsps/m68k/gen68360/start/linkcmds index f3d6712988..f2858137d7 100644 --- a/bsps/m68k/gen68360/start/linkcmds +++ b/bsps/m68k/gen68360/start/linkcmds @@ -16,7 +16,6 @@ RamBase = DEFINED(RamBase) ? RamBase : 0x0; RamSize = DEFINED(RamSize) ? RamSize : 64M; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000; /* * Declare on-board memory. @@ -150,10 +149,6 @@ SECTIONS { *(COMMON) . = ALIGN (16); PROVIDE (end = .); - - . += _StackSize; - . = ALIGN (16); - _stack_init = .; _clear_end = .; } >ram diff --git a/bsps/m68k/gen68360/start/linkcmds.bootp b/bsps/m68k/gen68360/start/linkcmds.bootp index b97c66f3a1..a05573cb2c 100644 --- a/bsps/m68k/gen68360/start/linkcmds.bootp +++ b/bsps/m68k/gen68360/start/linkcmds.bootp @@ -20,7 +20,6 @@ RamBase = DEFINED(RamBase) ? RamBase : 0x0; RamSize = DEFINED(RamSize) ? RamSize : 64M; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000; /* * Declare on-board memory. @@ -152,10 +151,6 @@ SECTIONS { *(COMMON) . = ALIGN (16); PROVIDE (end = .); - - . += _StackSize; - . = ALIGN (16); - _stack_init = .; _clear_end = .; } >myram diff --git a/bsps/m68k/gen68360/start/linkcmds.prom b/bsps/m68k/gen68360/start/linkcmds.prom index 6513ccd544..0e68300de7 100644 --- a/bsps/m68k/gen68360/start/linkcmds.prom +++ b/bsps/m68k/gen68360/start/linkcmds.prom @@ -20,7 +20,6 @@ RamBase = DEFINED(RamBase) ? RamBase : 0x0; RamSize = DEFINED(RamSize) ? RamSize : 64M; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000; /* * Declare on-board memory. @@ -150,10 +149,6 @@ SECTIONS { *(COMMON) . = ALIGN (16); PROVIDE (end = .); - - . += _StackSize; - . = ALIGN (16); - _stack_init = .; _clear_end = .; } >ram diff --git a/bsps/m68k/gen68360/start/start.S b/bsps/m68k/gen68360/start/start.S index 8511960e16..7549f08af8 100644 --- a/bsps/m68k/gen68360/start/start.S +++ b/bsps/m68k/gen68360/start/start.S @@ -390,7 +390,7 @@ ZEROLOOPTEST: cmpl a1,a0 | Done? bcs.s ZEROLOOP | No, skip - movel #_stack_init,a7 | set master stack pointer + movel #_Configuration_Interrupt_stack_area_end,a7 | set master stack pointer movel d0,a7@- | command line jsr boot_card | Call C main diff --git a/bsps/m68k/genmcf548x/start/linkcmds.COBRA5475 b/bsps/m68k/genmcf548x/start/linkcmds.COBRA5475 index 52bca8d018..1e817d01ee 100644 --- a/bsps/m68k/genmcf548x/start/linkcmds.COBRA5475 +++ b/bsps/m68k/genmcf548x/start/linkcmds.COBRA5475 @@ -62,8 +62,6 @@ _CoreSramSize1 = DEFINED(_CoreSramSize1) ? _CoreSramSize1 : (4 * 1024); _BootFlashBase = DEFINED(_BootFlashBase) ? _BootFlashBase : 0xFC000000; _BootFlashSize = DEFINED(_BootFlashSize) ? _BootFlashSize : (32 * 1024*1024); -bsp_initstack_size = DEFINED(StackSize) ? StackSize : 0x800; /* 2 kB */ - _VBR = DEFINED(_VBR) ? _VBR : _SdramBase; __MBAR = DEFINED(__MBAR) ? __MBAR : 0xFE000000; diff --git a/bsps/m68k/genmcf548x/start/linkcmds.m5484FireEngine b/bsps/m68k/genmcf548x/start/linkcmds.m5484FireEngine index be746af7ff..ee873c4681 100644 --- a/bsps/m68k/genmcf548x/start/linkcmds.m5484FireEngine +++ b/bsps/m68k/genmcf548x/start/linkcmds.m5484FireEngine @@ -63,8 +63,6 @@ _BootFlashSize = DEFINED(_BootFlashSize) ? _BootFlashSize : (2 * 1024*1024); _CodeFlashBase = DEFINED(_CodeFlashBase) ? _CodeFlashBase : 0xE0000000; _CodeFlashSize = DEFINED(_CodeFlashSize) ? _CodeFlashSize : (16 * 1024*1024); -bsp_initstack_size = DEFINED(StackSize) ? StackSize : 0x800; /* 2 kB */ - _VBR = DEFINED(_VBR) ? _VBR : _SdramBase; __MBAR = DEFINED(__MBAR) ? __MBAR : 0x10000000; diff --git a/bsps/m68k/genmcf548x/start/linkcmds.m5484FireEngine.flash b/bsps/m68k/genmcf548x/start/linkcmds.m5484FireEngine.flash index 4db960f111..30df1e4bd7 100644 --- a/bsps/m68k/genmcf548x/start/linkcmds.m5484FireEngine.flash +++ b/bsps/m68k/genmcf548x/start/linkcmds.m5484FireEngine.flash @@ -63,8 +63,6 @@ _BootFlashSize = DEFINED(_BootFlashSize) ? _BootFlashSize : (2 * 1024 * 1024); _CodeFlashBase = DEFINED(_CodeFlashBase) ? _CodeFlashBase : 0xE0000000; _CodeFlashSize = DEFINED(_CodeFlashSize) ? _CodeFlashSize : (16 * 1024 * 1024); -bsp_initstack_size = DEFINED(StackSize) ? StackSize : 0x800; /* 2 kB */ - _VBR = DEFINED(_VBR) ? _VBR : _SdramBase; __MBAR = DEFINED(__MBAR) ? __MBAR : 0x10000000; diff --git a/bsps/m68k/genmcf548x/start/start.S b/bsps/m68k/genmcf548x/start/start.S index d4d1d9b273..1bc09a0118 100644 --- a/bsps/m68k/genmcf548x/start/start.S +++ b/bsps/m68k/genmcf548x/start/start.S @@ -75,7 +75,7 @@ .section ".vectors","ax" /* begin of vectors section */ PUBLIC (InterruptVectorTable) SYM(InterruptVectorTable): -INITSP: .long bsp_initstack_end /* Initial SP */ +INITSP: .long _Configuration_Interrupt_stack_area_end /* Initial SP */ INITPC: .long start /* Initial PC */ vector002: .long asm_default_interrupt /* Access Error */ vector003: .long asm_default_interrupt /* Address Error */ @@ -411,7 +411,7 @@ SYM(start_init): jsr mcf548x_init /* Initialize mcf548x peripherals */ - move.l #bsp_initstack_end,sp /* relocate sp */ + move.l #_Configuration_Interrupt_stack_area_end,sp /* relocate sp */ clrl d0 /* clear d0 */ movel d0,a7@- /* command line == 0 */ diff --git a/bsps/m68k/mcf52235/start/linkcmds b/bsps/m68k/mcf52235/start/linkcmds index 3e912a210f..0c4d15fe08 100644 --- a/bsps/m68k/mcf52235/start/linkcmds +++ b/bsps/m68k/mcf52235/start/linkcmds @@ -16,7 +16,6 @@ RamBase = DEFINED(RamBase) ? RamBase : 0x20000000; RamSize = DEFINED(RamSize) ? RamSize : 32K; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x400; _FlashBase = DEFINED(_FlashBase) ? _FlashBase : 0x00000000; _VBR = 0x20000000; @@ -171,16 +170,6 @@ SECTIONS PROVIDE (_clear_end = .); } >sram - .stack : - { - /* - * Starting Stack - */ - . += _StackSize; - . = ALIGN (16); - PROVIDE(_StackInit = .); - } >sram - .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) PROVIDE(WorkAreaBase = .); diff --git a/bsps/m68k/mcf52235/start/start.S b/bsps/m68k/mcf52235/start/start.S index e1d837cab5..ecb2c5c980 100644 --- a/bsps/m68k/mcf52235/start/start.S +++ b/bsps/m68k/mcf52235/start/start.S @@ -16,14 +16,12 @@ #include <rtems/asm.h> -.extern _StackInit - BEGIN_CODE PUBLIC (_INTERRUPT_VECTOR) SYM(_INTERRUPT_VECTOR): - .long _StackInit /* 00 Initial 'SSP' */ + .long _Configuration_Interrupt_stack_area_end /* 00 Initial 'SSP' */ .long SYM(start) /* 01 Initial PC */ .long SYM(_uhoh) /* 02 Access Error */ .long SYM(_uhoh) /* 03 Address Error */ @@ -357,7 +355,7 @@ SYM(start): movec d0, %rambar /* Locate Stack Pointer */ - move.l #_StackInit, sp + move.l #_Configuration_Interrupt_stack_area_end, sp /* Initialize FLASHBAR */ move.l #_FlashBase, d0 @@ -369,7 +367,7 @@ SYM(start): _continue_startup: /* Locate Stack Pointer */ - move.l #_StackInit, sp + move.l #_Configuration_Interrupt_stack_area_end, sp /* Save off intial D0 and D1 to RAM */ move.l d6, SYM(_d0_reset) diff --git a/bsps/m68k/mcf5225x/start/linkcmds b/bsps/m68k/mcf5225x/start/linkcmds index a2ad1ec047..563aede8eb 100644 --- a/bsps/m68k/mcf5225x/start/linkcmds +++ b/bsps/m68k/mcf5225x/start/linkcmds @@ -16,7 +16,6 @@ RamBase = DEFINED(RamBase) ? RamBase : 0x20000000; RamSize = DEFINED(RamSize) ? RamSize : 64K; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x400; _FlashBase = DEFINED(_FlashBase) ? _FlashBase : 0x00000000; _VBR = 0x20000000; @@ -171,16 +170,6 @@ SECTIONS PROVIDE (_clear_end = .); } >sram - .stack : - { - /* - * Starting Stack - */ - . += _StackSize; - . = ALIGN (16); - PROVIDE(_StackInit = .); - } >sram - .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) PROVIDE(WorkAreaBase = .); diff --git a/bsps/m68k/mcf5225x/start/start.S b/bsps/m68k/mcf5225x/start/start.S index abc7bb99cc..19d9038431 100644 --- a/bsps/m68k/mcf5225x/start/start.S +++ b/bsps/m68k/mcf5225x/start/start.S @@ -16,14 +16,12 @@ #include <rtems/asm.h> -.extern _StackInit - BEGIN_CODE PUBLIC (_INTERRUPT_VECTOR) SYM(_INTERRUPT_VECTOR): - .long _StackInit /* 00 Initial 'SSP' */ + .long _Configuration_Interrupt_stack_area_end /* 00 Initial 'SSP' */ .long SYM(start) /* 01 Initial PC */ .long SYM(_uhoh) /* 02 Access Error */ .long SYM(_uhoh) /* 03 Address Error */ @@ -361,7 +359,7 @@ SYM(start): movec d7, %rambar /* Locate Stack Pointer */ - move.l #_StackInit, sp + move.l #_Configuration_Interrupt_stack_area_end, sp /* Initialize FLASHBAR */ move.l #_FlashBase, d7 @@ -373,7 +371,7 @@ SYM(start): _continue_startup: /* Locate Stack Pointer */ -// move.l #_StackInit, sp //is done automatically by the CPU +// move.l #_Configuration_Interrupt_stack_area_end, sp //is done automatically by the CPU /* * Remainder of the startup code is handled by C code diff --git a/bsps/m68k/mcf5329/start/linkcmds b/bsps/m68k/mcf5329/start/linkcmds index bed8dfe0fe..78fc50c22a 100644 --- a/bsps/m68k/mcf5329/start/linkcmds +++ b/bsps/m68k/mcf5329/start/linkcmds @@ -23,7 +23,6 @@ _BootFlashBase = DEFINED(_FlashBase) ? _FlashBase : 0x00000000; _BootFlashSize = DEFINED(_FlashBase) ? _FlashBase : 2M; HeapSize = DEFINED(HeapSize) ? HeapSize : 0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x400; _VBR = 0x40000000; @@ -178,23 +177,12 @@ SECTIONS *(COMMON) . = ALIGN (16); PROVIDE (_end = .); - _clear_end = .; + WorkAreaBase = .; } > dram .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) - WorkAreaBase = .; - } > dram - - .start_stack : - { - /* - * Starting Stack - */ - . += _StackSize; - . = ALIGN (16); - PROVIDE(_StackInit = .); } > core_sram /* Stabs debugging sections. */ diff --git a/bsps/m68k/mcf5329/start/linkcmdsflash b/bsps/m68k/mcf5329/start/linkcmdsflash index 88a6f96ff0..adfb3bacfb 100644 --- a/bsps/m68k/mcf5329/start/linkcmdsflash +++ b/bsps/m68k/mcf5329/start/linkcmdsflash @@ -23,7 +23,6 @@ _BootFlashBase = DEFINED(_FlashBase) ? _FlashBase : 0x00000000; _BootFlashSize = DEFINED(_FlashBase) ? _FlashBase : 2M; HeapSize = DEFINED(HeapSize) ? HeapSize : 0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x400; _VBR = 0x40000000; @@ -174,23 +173,12 @@ SECTIONS *(COMMON) . = ALIGN (16); PROVIDE (_end = .); - _clear_end = .; + WorkAreaBase = .; } > dram .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) - WorkAreaBase = .; - } > dram - - .start_stack : - { - /* - * Starting Stack - */ - . += _StackSize; - . = ALIGN (16); - PROVIDE(_StackInit = .); } > core_sram /* Stabs debugging sections. */ diff --git a/bsps/m68k/mcf5329/start/start.S b/bsps/m68k/mcf5329/start/start.S index 6063fdac74..659c617272 100644 --- a/bsps/m68k/mcf5329/start/start.S +++ b/bsps/m68k/mcf5329/start/start.S @@ -16,14 +16,12 @@ #include <rtems/asm.h> -.extern _StackInit - BEGIN_CODE PUBLIC (_INTERRUPT_VECTOR) SYM(_INTERRUPT_VECTOR): - .long _StackInit /* 00 Initial 'SSP' */ + .long _Configuration_Interrupt_stack_area_end /* 00 Initial 'SSP' */ .long SYM(start) /* 01 Initial PC */ .long SYM(_uhoh) /* 02 Access Error */ .long SYM(_uhoh) /* 03 Address Error */ @@ -346,7 +344,7 @@ SYM(start): move.l d7, SYM(_d1_reset) /* Locate Stack Pointer */ - move.l #_StackInit,sp + move.l #_Configuration_Interrupt_stack_area_end,sp /* * Remainder of the startup code is handled by C code diff --git a/bsps/m68k/mrm332/start/linkcmds b/bsps/m68k/mrm332/start/linkcmds index f86e80dd02..125538c50c 100644 --- a/bsps/m68k/mrm332/start/linkcmds +++ b/bsps/m68k/mrm332/start/linkcmds @@ -32,7 +32,6 @@ __DYNAMIC = 0; * | heap space | * | _ENDHEAP | * | stack space | - * | __stack | top of stack * +--------------------+ <- high memory */ @@ -52,7 +51,6 @@ MEMORY _copy_data_from_rom = 1; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x2000; /* @@ -194,9 +192,6 @@ SECTIONS *(COMMON) . = ALIGN (16); PROVIDE (end = .); - . += _StackSize; - . = ALIGN (16); - _stack_init = .; _clear_end = .; } > ram .rtemsstack (NOLOAD) : { diff --git a/bsps/m68k/mrm332/start/start.S b/bsps/m68k/mrm332/start/start.S index 5e2bbebc8e..300b74fc78 100644 --- a/bsps/m68k/mrm332/start/start.S +++ b/bsps/m68k/mrm332/start/start.S @@ -37,10 +37,10 @@ BEGIN_CODE movel #0x0,d0 /* Use the initial vectors until we get going */ movecl d0,vbr - movel #end, d0 /* Next 3 instructions set stack pointer */ - addl #_StackSize,d0 /* sp = end + _StackSize from linker script */ - movel d0,sp - movel d0,a6 + /* Set stack pointer */ + movel #_Configuration_Interrupt_stack_area_end,d0 + movel d0,sp + movel d0,a6 /* include in ram_init.S */ /* diff --git a/bsps/m68k/shared/start/linkcmds.base b/bsps/m68k/shared/start/linkcmds.base index ee1d6ea4e2..fc726b4419 100644 --- a/bsps/m68k/shared/start/linkcmds.base +++ b/bsps/m68k/shared/start/linkcmds.base @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008-2013 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008, 2018 embedded brains GmbH. All rights reserved. * * embedded brains GmbH * Dornierstr. 4 @@ -19,8 +19,6 @@ OUTPUT_ARCH(m68k) ENTRY(start) STARTUP(start.o) -bsp_initstack_size = DEFINED (bsp_initstack_size) ? bsp_initstack_size : 2048; - MEMORY { UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0 } @@ -226,12 +224,6 @@ SECTIONS { } > REGION_DATA AT > REGION_DATA bsp_vector1_size = bsp_vector1_end - bsp_vector1_begin; - .initstack : ALIGN_WITH_INPUT { - bsp_initstack_begin = .; - . = . + bsp_initstack_size; - bsp_initstack_end = .; - } > REGION_DATA AT > REGION_DATA - .data : ALIGN_WITH_INPUT { bsp_section_data_begin = .; *(.data .data.* .gnu.linkonce.d.*) diff --git a/bsps/m68k/shared/start/start.S b/bsps/m68k/shared/start/start.S index b3a3c8b664..9c40cbc3da 100644 --- a/bsps/m68k/shared/start/start.S +++ b/bsps/m68k/shared/start/start.S @@ -74,7 +74,7 @@ loop: movel #0,a1@+ | to zero out uninitialized cmpal a0,a1 jlt loop | loop until _end reached - movel # SYM (_stack_init),d0 | d0 = stop of stack + movel # SYM (_Configuration_Interrupt_stack_area_end),d0 | d0 = stop of stack movw #0x3700,sr | SUPV MODE,INTERRUPTS OFF!!! movel d0,a7 | set master stack pointer movel d0,a6 | set base pointer @@ -135,13 +135,6 @@ SYM (initial_usp): SYM (initial_sr): .space 2 - .align 16 - PUBLIC (starting_stack) -SYM (starting_stack): - .space 0x1000 - PUBLIC (_stack_init) -SYM (_stack_init): - END_DATA #endif END diff --git a/bsps/mips/csb350/start/linkcmds b/bsps/mips/csb350/start/linkcmds index d9d2d1c815..961ada650e 100644 --- a/bsps/mips/csb350/start/linkcmds +++ b/bsps/mips/csb350/start/linkcmds @@ -15,7 +15,6 @@ _sdram_size = DEFINED(_sdram_size) ? _sdram_size : 12M; RamBase = _sdram_base; RamSize = _sdram_size; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x4000; ENTRY(_start) STARTUP(start.o) @@ -187,10 +186,6 @@ SECTIONS *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON) . = ALIGN (64); - _stack_limit = .; - . += _StackSize; - __stack = .; - _stack_init = .; _clear_end = .; end = .; _end = .; diff --git a/bsps/mips/csb350/start/start.S b/bsps/mips/csb350/start/start.S index 9aea3f4cae..dc92f1a430 100644 --- a/bsps/mips/csb350/start/start.S +++ b/bsps/mips/csb350/start/start.S @@ -67,7 +67,7 @@ zerobss: bltu v0,v1,3b addiu v0,v0,4 /* executed in delay slot */ - la t0, _stack_init /* initialize stack so we */ + la t0, _Configuration_Interrupt_stack_area_end /* initialize stack so we */ /* We must subtract 24 bytes for the 3 8 byte arguments to main, in case main wants to write them back to the stack. The caller is supposed to allocate stack space for parameters in registers in diff --git a/bsps/mips/hurricane/start/linkcmds b/bsps/mips/hurricane/start/linkcmds index 3ffaf52710..51e47158d3 100644 --- a/bsps/mips/hurricane/start/linkcmds +++ b/bsps/mips/hurricane/start/linkcmds @@ -8,7 +8,6 @@ RamBase = DEFINED(RamBase) ? RamBase : 0x80000000; RamSize = DEFINED(RamSize) ? RamSize : 4M; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000; ENTRY(start) STARTUP(start.o) @@ -166,10 +165,6 @@ SECTIONS *(.bss) *(COMMON) . = ALIGN (64); - _stack_limit = .; - . += _StackSize; - __stack = .; - _stack_init = .; end = .; _end = .; } diff --git a/bsps/mips/jmr3904/start/linkcmds b/bsps/mips/jmr3904/start/linkcmds index a3d64a4284..0becab1e6f 100644 --- a/bsps/mips/jmr3904/start/linkcmds +++ b/bsps/mips/jmr3904/start/linkcmds @@ -8,7 +8,6 @@ RamBase = DEFINED(RamBase) ? RamBase : 0x88000000; RamSize = DEFINED(RamSize) ? RamSize : 4M; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000; ENTRY(_start) STARTUP(start.o) @@ -164,10 +163,6 @@ SECTIONS *(.bss*) *(COMMON) . = ALIGN (64); - _stack_limit = .; - . += _StackSize; - __stack = .; - _stack_init = .; _clear_end = .; } @@ -181,9 +176,6 @@ SECTIONS _end = .; -/* Put starting stack in SRAM (8 Kb); this size is the same as the stack from - the original script (when everything was in SRAM). */ - /* __stack = 0x8000A000; */ /* DWARF debug sections. Symbols in the DWARF debugging sections are relative to the beginning of the section so we begin them at 0. */ diff --git a/bsps/mips/jmr3904/start/start.S b/bsps/mips/jmr3904/start/start.S index 92c0ddd956..9e1fa4182b 100644 --- a/bsps/mips/jmr3904/start/start.S +++ b/bsps/mips/jmr3904/start/start.S @@ -139,7 +139,7 @@ zerobss: bltu v0,v1,3b addiu v0,v0,4 # executed in delay slot - la t0, _stack_init # initialize stack so we + la t0, _Configuration_Interrupt_stack_area_end # initialize stack so we /* We must subtract 24 bytes for the 3 8 byte arguments to main, in case main wants to write them back to the stack. The caller is supposed to allocate stack space for parameters in registers in diff --git a/bsps/mips/malta/start/linkcmds b/bsps/mips/malta/start/linkcmds index 4e44bce110..1d6745cfe1 100644 --- a/bsps/mips/malta/start/linkcmds +++ b/bsps/mips/malta/start/linkcmds @@ -8,7 +8,6 @@ RamBase = DEFINED(RamBase) ? RamBase : 0x80000000; RamSize = DEFINED(RamSize) ? RamSize : 128M; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x2000; ENTRY(_start) STARTUP(start.o) @@ -165,10 +164,6 @@ SECTIONS *(.bss*) *(COMMON) . = ALIGN (64); - _stack_limit = .; - . += _StackSize; - __stack = .; - _stack_init = .; _clear_end = .; } @@ -182,9 +177,6 @@ SECTIONS _end = .; -/* Put starting stack in SRAM (8 Kb); this size is the same as the stack from - the original script (when everything was in SRAM). */ - /* __stack = 0x8000A000; */ /* DWARF debug sections. Symbols in the DWARF debugging sections are relative to the beginning of the section so we begin them at 0. */ diff --git a/bsps/mips/malta/start/start.S b/bsps/mips/malta/start/start.S index 8f5f96489f..d437575cca 100644 --- a/bsps/mips/malta/start/start.S +++ b/bsps/mips/malta/start/start.S @@ -166,7 +166,7 @@ zerobss: bltu v0,v1,3b addiu v0,v0,4 # executed in delay slot - la t0, _stack_init # initialize stack so we + la t0, _Configuration_Interrupt_stack_area_end # initialize stack so we /* We must subtract 24 bytes for the 3 8 byte arguments to main, in case main wants to write them back to the stack. The caller is supposed to allocate stack space for parameters in registers in diff --git a/bsps/mips/rbtx4925/start/linkcmds b/bsps/mips/rbtx4925/start/linkcmds index 7c75cb5d59..3042176adf 100644 --- a/bsps/mips/rbtx4925/start/linkcmds +++ b/bsps/mips/rbtx4925/start/linkcmds @@ -8,7 +8,6 @@ RamBase = DEFINED(RamBase) ? RamBase : 0x80000000; RamSize = DEFINED(RamSize) ? RamSize : 4M; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000; ENTRY(start) STARTUP(start.o) @@ -166,10 +165,6 @@ SECTIONS *(.bss) *(COMMON) . = ALIGN (64); - _stack_limit = .; - . += _StackSize; - __stack = .; - _stack_init = .; end = .; _end = .; } diff --git a/bsps/mips/rbtx4938/start/linkcmds b/bsps/mips/rbtx4938/start/linkcmds index a9deef8cd9..e11d1dcee2 100644 --- a/bsps/mips/rbtx4938/start/linkcmds +++ b/bsps/mips/rbtx4938/start/linkcmds @@ -8,7 +8,6 @@ RamBase = DEFINED(RamBase) ? RamBase : 0x80000000; RamSize = DEFINED(RamSize) ? RamSize : 4M; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000; ENTRY(start) STARTUP(start.o) @@ -166,10 +165,6 @@ SECTIONS *(.bss) *(COMMON) . = ALIGN (64); - _stack_limit = .; - . += _StackSize; - __stack = .; - _stack_init = .; end = .; _end = .; } diff --git a/bsps/mips/shared/irq/exception.S b/bsps/mips/shared/irq/exception.S index e916ae55fe..30c733b05e 100644 --- a/bsps/mips/shared/irq/exception.S +++ b/bsps/mips/shared/irq/exception.S @@ -214,10 +214,8 @@ _chk_int: /* * - * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) - * if ( _ISR_Nest_level == 0 ) - * switch to software interrupt stack - * #endif + * if ( _ISR_Nest_level == 0 ) + * switch to software interrupt stack */ /* @@ -307,9 +305,7 @@ _ISR_Handler_cleanup: /* - * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) - * restore stack - * #endif + * restore stack * * if ( !_Thread_Dispatch_necessary ) * goto the label "exit interrupt (simple case)" diff --git a/bsps/nios2/nios2_iss/start/linkcmds b/bsps/nios2/nios2_iss/start/linkcmds index b900718b6d..bcbfeafe1f 100644 --- a/bsps/nios2/nios2_iss/start/linkcmds +++ b/bsps/nios2/nios2_iss/start/linkcmds @@ -24,7 +24,6 @@ DO NOT MODIFY THIS FILE RamBase = DEFINED(RamBase) ? RamBase : 0x00000000; RamSize = DEFINED(RamSize) ? RamSize : 0x00800000; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; -StackSize = DEFINED(StackSize) ? HeapSize : 1024; MEMORY { @@ -265,13 +264,12 @@ SECTIONS . = ALIGN(32 / 8); __bss_end = ABSOLUTE(.); - _stack_low = ABSOLUTE(.); - . += StackSize; - _stack_high = ABSOLUTE(.); } > onchip_memory_0 .rtemsstack (NOLOAD) : { + _stack_low = ABSOLUTE(.); *(SORT(.rtemsstack.*)) + _stack_high = ABSOLUTE(.); WorkAreaBase = .; } > onchip_memory_0 diff --git a/bsps/powerpc/beatnik/start/bspstart.c b/bsps/powerpc/beatnik/start/bspstart.c index 83c6d2efa6..91913cd0ed 100644 --- a/bsps/powerpc/beatnik/start/bspstart.c +++ b/bsps/powerpc/beatnik/start/bspstart.c @@ -177,8 +177,8 @@ void bsp_start( void ) { unsigned char *stack; char *chpt; - uint32_t intrStackStart; - uint32_t intrStackSize; + uintptr_t intrStackStart; + uintptr_t intrStackSize; Triv121PgTbl pt=0; @@ -239,7 +239,7 @@ void bsp_start( void ) * This could be done latter (e.g in IRQ_INIT) but it helps to understand * some settings below... */ - intrStackStart = (uint32_t)__rtems_end; + intrStackStart = (uintptr_t)_Configuration_Interrupt_stack_area_begin; intrStackSize = rtems_configuration_get_interrupt_stack_size(); /* diff --git a/bsps/powerpc/gen5200/include/bsp.h b/bsps/powerpc/gen5200/include/bsp.h index 40ac1116c5..015a8b1f3b 100644 --- a/bsps/powerpc/gen5200/include/bsp.h +++ b/bsps/powerpc/gen5200/include/bsp.h @@ -55,10 +55,6 @@ LINKER_SYMBOL(bsp_section_bss_start); LINKER_SYMBOL(bsp_section_bss_end); LINKER_SYMBOL(bsp_section_bss_size); -LINKER_SYMBOL(bsp_interrupt_stack_start); -LINKER_SYMBOL(bsp_interrupt_stack_end); -LINKER_SYMBOL(bsp_interrupt_stack_size); - LINKER_SYMBOL(bsp_work_area_start); LINKER_SYMBOL(MBAR); diff --git a/bsps/powerpc/gen5200/start/bspstart.c b/bsps/powerpc/gen5200/start/bspstart.c index 8b1558ce7b..0f981ffee0 100644 --- a/bsps/powerpc/gen5200/start/bspstart.c +++ b/bsps/powerpc/gen5200/start/bspstart.c @@ -154,8 +154,8 @@ void bsp_start(void) /* Initialize exception handler */ ppc_exc_cache_wb_check = 0; ppc_exc_initialize( - (uintptr_t) bsp_interrupt_stack_start, - (uintptr_t) bsp_interrupt_stack_size + (uintptr_t) _Configuration_Interrupt_stack_area_begin, + rtems_configuration_get_interrupt_stack_size() ); ppc_exc_set_handler(ASM_ALIGN_VECTOR, ppc_exc_alignment_handler); diff --git a/bsps/powerpc/gen5200/start/linkcmds.gen5200_base b/bsps/powerpc/gen5200/start/linkcmds.gen5200_base index a8841d2586..5ab30882ce 100644 --- a/bsps/powerpc/gen5200/start/linkcmds.gen5200_base +++ b/bsps/powerpc/gen5200/start/linkcmds.gen5200_base @@ -288,13 +288,6 @@ SECTIONS { bsp_section_data_size = bsp_section_data_end - bsp_section_data_start; bsp_section_bss_size = bsp_section_bss_end - bsp_section_bss_start; - /* - * BSP: Interrupt stack - */ - bsp_interrupt_stack_start = bsp_section_bss_end; - bsp_interrupt_stack_end = bsp_interrupt_stack_start + 32k; - bsp_interrupt_stack_size = bsp_interrupt_stack_end - bsp_interrupt_stack_start; - .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) } > RAM diff --git a/bsps/powerpc/gen83xx/include/bsp.h b/bsps/powerpc/gen83xx/include/bsp.h index 59fd20de54..682dfc2986 100644 --- a/bsps/powerpc/gen83xx/include/bsp.h +++ b/bsps/powerpc/gen83xx/include/bsp.h @@ -53,10 +53,6 @@ LINKER_SYMBOL(bsp_section_bss_start); LINKER_SYMBOL(bsp_section_bss_end); LINKER_SYMBOL(bsp_section_bss_size); -LINKER_SYMBOL(bsp_interrupt_stack_start); -LINKER_SYMBOL(bsp_interrupt_stack_end); -LINKER_SYMBOL(bsp_interrupt_stack_size); - LINKER_SYMBOL(bsp_work_area_start); LINKER_SYMBOL(IMMRBAR); diff --git a/bsps/powerpc/gen83xx/start/start.S b/bsps/powerpc/gen83xx/start/start.S index b48a26b7c3..9272702d6b 100644 --- a/bsps/powerpc/gen83xx/start/start.S +++ b/bsps/powerpc/gen83xx/start/start.S @@ -417,7 +417,7 @@ start_code_in_ram: li r3, 0 /* Set start stack pointer */ - LA r1, start_stack_end + LA r1, _Configuration_Interrupt_stack_area_end stwu r3, -4(r1) stwu r3, -4(r1) @@ -520,10 +520,3 @@ mpc83xx_zero_4_tail: /* Return */ blr - -.section ".bsp_rwextra", "aw", @nobits - - /* Start stack area */ -.align 4 -.space 4096 -start_stack_end: diff --git a/bsps/powerpc/haleakala/start/bspstart.c b/bsps/powerpc/haleakala/start/bspstart.c index 5f7f5efb95..986582955a 100644 --- a/bsps/powerpc/haleakala/start/bspstart.c +++ b/bsps/powerpc/haleakala/start/bspstart.c @@ -66,9 +66,6 @@ #include <ppc4xx/ppc405ex.h> #include <stdio.h> - -LINKER_SYMBOL(intrStack_start); -LINKER_SYMBOL(intrStack_size); /* * Driver configuration parameters */ @@ -188,8 +185,8 @@ void bsp_start( void ) * Initialize default raw exception handlers. */ ppc_exc_initialize( - (uintptr_t) intrStack_start, - (uintptr_t) intrStack_size + (uintptr_t) _Configuration_Interrupt_stack_area_begin, + rtems_configuration_get_interrupt_stack_size() ); /* diff --git a/bsps/powerpc/haleakala/start/dlentry.S b/bsps/powerpc/haleakala/start/dlentry.S index 2395d89886..54fbb7668b 100644 --- a/bsps/powerpc/haleakala/start/dlentry.S +++ b/bsps/powerpc/haleakala/start/dlentry.S @@ -54,7 +54,7 @@ * .bss * see linker command file for section placement * - * The initial stack is set to stack.end + * The initial stack is set to _Configuration_Interrupt_stack_area_end. * * All the entry veneer has to do is to clear the BSS. */ @@ -98,7 +98,7 @@ sbss_length: sbss_addr: .long sbss.start stack_top: - .long stack.end + .long _Configuration_Interrupt_stack_area_end PUBLIC_VAR (text_addr) text_addr: .long text.start diff --git a/bsps/powerpc/haleakala/start/linkcmds b/bsps/powerpc/haleakala/start/linkcmds index 98fea7f990..3bccc97c38 100644 --- a/bsps/powerpc/haleakala/start/linkcmds +++ b/bsps/powerpc/haleakala/start/linkcmds @@ -14,9 +14,6 @@ OUTPUT_ARCH(powerpc) ENTRY(download_entry) EXTERN(__vectors) -kIntrStackSize = 16K; -kMainStackSize = 64K; - RamBase = DEFINED(RamBase) ? RamBase : 0; RamSize = DEFINED(RamSize) ? RamSize : 256M; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; @@ -246,19 +243,6 @@ SECTIONS bss.size = bss.end - bss.start; sbss.size = sbss.end - sbss.start; - - /* Interrupt stack: align to a cache-line boundary */ - IntrStack_start = ALIGN(0x20); - . += kIntrStackSize; - intrStack = .; - PROVIDE(intrStackPtr = intrStack); - PROVIDE(intrStack_start = IntrStack_start); - PROVIDE(intrStack_size = kIntrStackSize); - - /* Main stack: align to a cache-line boundary */ - stack.start = ALIGN(0x20); - . += kMainStackSize; - stack.end = .; .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) diff --git a/bsps/powerpc/motorola_powerpc/start/bspstart.c b/bsps/powerpc/motorola_powerpc/start/bspstart.c index 7fb684c759..c420f6c19b 100644 --- a/bsps/powerpc/motorola_powerpc/start/bspstart.c +++ b/bsps/powerpc/motorola_powerpc/start/bspstart.c @@ -220,7 +220,7 @@ void bsp_start( void ) /* * Initialize the interrupt related settings. */ - intrStackStart = (uintptr_t) __rtems_end; + intrStackStart = (uintptr_t)_Configuration_Interrupt_stack_area_begin; intrStackSize = rtems_configuration_get_interrupt_stack_size(); /* diff --git a/bsps/powerpc/mpc55xxevb/start/start.S b/bsps/powerpc/mpc55xxevb/start/start.S index 0a757e7ada..81893b6276 100644 --- a/bsps/powerpc/mpc55xxevb/start/start.S +++ b/bsps/powerpc/mpc55xxevb/start/start.S @@ -228,7 +228,7 @@ zero_intermediate_stack_loop: bl mpc55xx_start_early /* Initialize start stack */ - LA r1, start_stack_end + LA r1, _Configuration_Interrupt_stack_area_end subi r1, r1, 16 li r0, 0 stw r0, 0(r1) @@ -289,11 +289,3 @@ mpc55xx_start_load_section: cmpw cr7, r3, r4 beqlr cr7 b memcpy - - /* Start stack area */ - - .section ".bsp_rwextra", "aw", @nobits - .align 4 - .space 4096 - -start_stack_end: diff --git a/bsps/powerpc/mpc8260ads/start/bspstart.c b/bsps/powerpc/mpc8260ads/start/bspstart.c index 6f1cc72a2c..503d96b8a1 100644 --- a/bsps/powerpc/mpc8260ads/start/bspstart.c +++ b/bsps/powerpc/mpc8260ads/start/bspstart.c @@ -69,9 +69,6 @@ bool bsp_serial_xon_xoff; bool bsp_serial_cts_rts; uint32_t bsp_serial_rate; -extern char IntrStack_start []; -extern char intrStack []; - static void _BSP_GPLED0_on(void) { BCSR *csr; @@ -142,10 +139,9 @@ void bsp_start(void) */ /* Initialize exception handler */ - /* FIXME: Interrupt stack begin and size */ ppc_exc_initialize( - (uintptr_t) IntrStack_start, - (uintptr_t) intrStack - (uintptr_t) IntrStack_start + (uintptr_t) _Configuration_Interrupt_stack_area_begin, + rtems_configuration_get_interrupt_stack_size() ); /* Initalize interrupt support */ diff --git a/bsps/powerpc/mpc8260ads/start/linkcmds b/bsps/powerpc/mpc8260ads/start/linkcmds index 34fb69149b..84933b48e9 100644 --- a/bsps/powerpc/mpc8260ads/start/linkcmds +++ b/bsps/powerpc/mpc8260ads/start/linkcmds @@ -17,7 +17,6 @@ EXTERN(__vectors) * number used there is not constant. If this happens to you, edit * the lines marked XXX below to use a constant value. */ -StackSize = DEFINED(StackSize) ? StackSize : 0x8000; RamBase = DEFINED(RamBase) ? RamBase : 0x0; RamSize = DEFINED(RamSize) ? RamDiskSize : 0x0800000; /* 8M program ram */ HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; @@ -289,16 +288,6 @@ SECTIONS _startmalloc = .; } >ram - - /* - * Interrupt stack setup - */ - IntrStack_start = ALIGN(0x10); - . += 0x4000; - intrStack = .; - PROVIDE(intrStackPtr = intrStack); - - clear_end = .; .rtemsstack (NOLOAD) : { diff --git a/bsps/powerpc/mvme3100/start/bspstart.c b/bsps/powerpc/mvme3100/start/bspstart.c index a073baa784..6f15b2d7a3 100644 --- a/bsps/powerpc/mvme3100/start/bspstart.c +++ b/bsps/powerpc/mvme3100/start/bspstart.c @@ -255,7 +255,7 @@ VpdBufRec vpdData [] = { /* * Initialize the interrupt related settings. */ - intrStackStart = (uintptr_t) __rtems_end; + intrStackStart = (uintptr_t) _Configuration_Interrupt_stack_area_begin; intrStackSize = rtems_configuration_get_interrupt_stack_size(); /* diff --git a/bsps/powerpc/mvme5500/start/bspstart.c b/bsps/powerpc/mvme5500/start/bspstart.c index fc7057613a..47d413bc91 100644 --- a/bsps/powerpc/mvme5500/start/bspstart.c +++ b/bsps/powerpc/mvme5500/start/bspstart.c @@ -225,7 +225,7 @@ void bsp_start( void ) /* * Initialize the interrupt related settings. */ - intrStackStart = (uintptr_t) __rtems_end; + intrStackStart = (uintptr_t) _Configuration_Interrupt_stack_area_begin; intrStackSize = rtems_configuration_get_interrupt_stack_size(); /* diff --git a/bsps/powerpc/psim/start/start.S b/bsps/powerpc/psim/start/start.S index 918321af5f..03cbdedc5b 100644 --- a/bsps/powerpc/psim/start/start.S +++ b/bsps/powerpc/psim/start/start.S @@ -47,7 +47,7 @@ FUNC_NAME(__atexit): /* tell C's eabi-ctor's we have an atexit function */ .long bsp_section_bss_end .Lstack = .-.LCTOC1 /* stack address if set by user */ - .long __stack + .long _Configuration_Interrupt_stack_area_end .text .Lptr: @@ -89,7 +89,7 @@ _start: .Ldone: - lwz r0,.Lstack(r5) /* stack address or 0 */ + lwz r0,.Lstack(r5) /* stack area or 0 */ cmplwi 1,r0,0 /* equal to 0? */ bc 12,6,.Lnostack /* use default stack if == 0 */ mr sp,r0 /* use user defined stack */ @@ -133,9 +133,3 @@ FUNC_NAME(bsp_reset): .Lstart: .size _start,.Lstart-_start - - /* Start stack area */ -.section ".bsp_rwextra", "aw", @nobits -.align 4 -.space 4096 -__stack: diff --git a/bsps/powerpc/qemuppc/start/bspstart.c b/bsps/powerpc/qemuppc/start/bspstart.c index 15cf9d4207..de3bba0797 100644 --- a/bsps/powerpc/qemuppc/start/bspstart.c +++ b/bsps/powerpc/qemuppc/start/bspstart.c @@ -42,8 +42,6 @@ uint32_t bsp_clicks_per_usec; * Memory on this board. */ extern char RamSize[]; -extern char bsp_interrupt_stack_start[]; -extern char bsp_interrupt_stack_end[]; uint32_t BSP_mem_size = (uint32_t)RamSize; /* Default decrementer exception handler */ @@ -89,8 +87,8 @@ void bsp_start( void ) /* * Initialize the interrupt related settings. */ - intrStackStart = (uintptr_t) bsp_interrupt_stack_start; - intrStackSize = (uintptr_t) bsp_interrupt_stack_end - intrStackStart; + intrStackStart = (uintptr_t) _Configuration_Interrupt_stack_area_begin; + intrStackSize = rtems_configuration_get_interrupt_stack_size(); BSP_mem_size = (uint32_t )RamSize; diff --git a/bsps/powerpc/qemuppc/start/start.S b/bsps/powerpc/qemuppc/start/start.S index 1ef7a3a02a..66cedca9a2 100644 --- a/bsps/powerpc/qemuppc/start/start.S +++ b/bsps/powerpc/qemuppc/start/start.S @@ -1,17 +1,13 @@ #include <rtems/score/cpu.h> #include <rtems/powerpc/powerpc.h> -#include <bspopts.h> - - .global bsp_interrupt_stack_start - .global bsp_interrupt_stack_end .global _start .section .bsp_start_text,"awx",@progbits _start: - lis %r1,bsp_interrupt_stack_start@h - ori %r1,%r1,bsp_interrupt_stack_start@l + lis %r1,_Configuration_Interrupt_stack_area_end@h + ori %r1,%r1,_Configuration_Interrupt_stack_area_end@l /* Make sure stack is properly aligned */ li %r3, CPU_STACK_ALIGNMENT - 1 andc %r1, %r1, %r3 @@ -42,11 +38,3 @@ __eabi: _reset: b _start .size _reset, . - _reset - - /* Start stack area */ - .section ".bsp_rwextra", "aw", @nobits - .align 4 - .space 4096 -bsp_interrupt_stack_start: - .space 32768 -bsp_interrupt_stack_end: diff --git a/bsps/powerpc/qoriq/start/start.S b/bsps/powerpc/qoriq/start/start.S index 02505a6262..96e00bf38b 100644 --- a/bsps/powerpc/qoriq/start/start.S +++ b/bsps/powerpc/qoriq/start/start.S @@ -55,7 +55,9 @@ _start: bl .Linitearly /* Get start stack */ - LA START_STACK, start_stack_end + LA START_STACK, _Configuration_Interrupt_stack_area_begin + LA r3, _Configuration_Interrupt_stack_size + add START_STACK, START_STACK, r3 bl .Linitmore @@ -226,12 +228,10 @@ _start: isync /* - * Initialize start stack. Make sure that we do not share a cache line - * with the heap block management, since initial stacks for the - * secondary processors are allocated from the workspace. + * Initialize start stack. The stacks are statically allocated and + * properly aligned. */ - subi r1, START_STACK, 2 * PPC_DEFAULT_CACHE_LINE_SIZE - clrrwi r1, r1, PPC_DEFAULT_CACHE_LINE_POWER + subi r1, START_STACK, PPC_DEFAULT_CACHE_LINE_SIZE li r0, 0 PPC_REG_STORE r0, 0(r1) @@ -540,9 +540,3 @@ bsp_exc_vector_base: /* Symbol provided for debugging and tracing */ bsp_exc_vector_end: - - /* Start stack area */ - .section ".bsp_rwextra", "aw", @nobits - .align 4 - .space 4096 -start_stack_end: diff --git a/bsps/powerpc/shared/start/linkcmds.base b/bsps/powerpc/shared/start/linkcmds.base index fa49edf7dd..4ad302e86b 100644 --- a/bsps/powerpc/shared/start/linkcmds.base +++ b/bsps/powerpc/shared/start/linkcmds.base @@ -321,7 +321,6 @@ SECTIONS { .rtemsstack (NOLOAD) : ALIGN_WITH_INPUT { bsp_section_rtemsstack_begin = .; - *(.bsp_rwextra) *(SORT(.rtemsstack.*)) bsp_section_rtemsstack_end = .; } > REGION_RTEMSSTACK AT > REGION_RTEMSSTACK diff --git a/bsps/powerpc/ss555/start/bspstart.c b/bsps/powerpc/ss555/start/bspstart.c index cf54d61d9e..5943e2bbd6 100644 --- a/bsps/powerpc/ss555/start/bspstart.c +++ b/bsps/powerpc/ss555/start/bspstart.c @@ -32,8 +32,6 @@ SPR_RW(SPRG1) -extern unsigned long intrStackPtr; - /* * Driver configuration parameters */ @@ -67,7 +65,7 @@ uint32_t _CPU_Counter_frequency(void) */ void bsp_start(void) { - register unsigned char* intrStack; + char* intrStack; /* * Get CPU identification dynamically. Note that the get_ppc_cpu_type() @@ -80,7 +78,8 @@ void bsp_start(void) /* * Initialize some SPRG registers related to irq handling */ - intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE); + intrStack = (char *)_Configuration_Interrupt_stack_area_end - + PPC_MINIMUM_STACK_FRAME_SIZE; _write_SPRG1((unsigned int)intrStack); /* diff --git a/bsps/powerpc/ss555/start/linkcmds b/bsps/powerpc/ss555/start/linkcmds index 079dc84924..f3a41dd3a9 100644 --- a/bsps/powerpc/ss555/start/linkcmds +++ b/bsps/powerpc/ss555/start/linkcmds @@ -232,22 +232,6 @@ SECTIONS PROVIDE(_end = bss.end); - /* - * Initialization stack - */ - InitStack_start = ALIGN(0x10); - . += 0x1000; - initStack = .; - PROVIDE(initStackPtr = initStack); - - /* - * Interrupt stack - */ - IntrStack_start = ALIGN(0x10); - . += 0x4000; - intrStack = .; - PROVIDE(intrStackPtr = intrStack); - .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) } diff --git a/bsps/powerpc/ss555/start/start.S b/bsps/powerpc/ss555/start/start.S index 6a8ef85afc..f17c918b3e 100644 --- a/bsps/powerpc/ss555/start/start.S +++ b/bsps/powerpc/ss555/start/start.S @@ -220,7 +220,7 @@ base_addr: * Parameters from linker */ stack_top: - .long initStackPtr + .long _Configuration_Interrupt_stack_area_end toc_pointer: .long __GOT_START__ diff --git a/bsps/powerpc/t32mppc/start/start.S b/bsps/powerpc/t32mppc/start/start.S index 7c32343f3d..e4066adb6f 100644 --- a/bsps/powerpc/t32mppc/start/start.S +++ b/bsps/powerpc/t32mppc/start/start.S @@ -34,7 +34,7 @@ _start: mtspr HID0, r0 /* Initialize start stack */ - LWI r1, start_stack_end + LA r1, _Configuration_Interrupt_stack_area_end subi r1, r1, 16 li r0, 0 stw r0, 0(r1) @@ -195,9 +195,3 @@ bsp_exc_vector_base: PPC_REG_STORE r3, GPR3_OFFSET(r1) li r3, 35 b ppc_exc_fatal_normal - - /* Start stack area */ - .section ".bsp_rwextra", "aw", @nobits - .align 4 - .space 4096 -start_stack_end: diff --git a/bsps/powerpc/tqm8xx/include/bsp.h b/bsps/powerpc/tqm8xx/include/bsp.h index 5c8eae81b4..8e84ee883e 100644 --- a/bsps/powerpc/tqm8xx/include/bsp.h +++ b/bsps/powerpc/tqm8xx/include/bsp.h @@ -53,10 +53,6 @@ LINKER_SYMBOL( bsp_section_bss_start); LINKER_SYMBOL( bsp_section_bss_end); LINKER_SYMBOL( bsp_section_bss_size); -LINKER_SYMBOL( bsp_interrupt_stack_start); -LINKER_SYMBOL( bsp_interrupt_stack_end); -LINKER_SYMBOL( bsp_interrupt_stack_size); - LINKER_SYMBOL( bsp_work_area_start); #ifndef ASM diff --git a/bsps/powerpc/tqm8xx/start/bspstart.c b/bsps/powerpc/tqm8xx/start/bspstart.c index b2d765c9c4..2d0b8e3c7e 100644 --- a/bsps/powerpc/tqm8xx/start/bspstart.c +++ b/bsps/powerpc/tqm8xx/start/bspstart.c @@ -99,11 +99,6 @@ uint32_t _CPU_Counter_frequency(void) void bsp_start( void) { - - uintptr_t interrupt_stack_start = (uintptr_t) bsp_interrupt_stack_start; - uintptr_t interrupt_stack_size = (uintptr_t) bsp_interrupt_stack_end - - interrupt_stack_start; - /* * Get CPU identification dynamically. Note that the get_ppc_cpu_type() * function stores the result in global variables so that it can be used @@ -149,7 +144,10 @@ void bsp_start( void) bsp_clicks_per_usec = bsp_time_base_frequency / 1000000; /* Initialize exception handler */ - ppc_exc_initialize(interrupt_stack_start, interrupt_stack_size); + ppc_exc_initialize( + (uintptr_t) _Configuration_Interrupt_stack_area_begin, + rtems_configuration_get_interrupt_stack_size() + ); /* Initalize interrupt support */ bsp_interrupt_initialize(); diff --git a/bsps/powerpc/tqm8xx/start/start.S b/bsps/powerpc/tqm8xx/start/start.S index 92bda3fd6d..b16b92e1e2 100644 --- a/bsps/powerpc/tqm8xx/start/start.S +++ b/bsps/powerpc/tqm8xx/start/start.S @@ -26,8 +26,6 @@ .extern boot_card PUBLIC_VAR (_start) -PUBLIC_VAR (bsp_interrupt_stack_start) -PUBLIC_VAR (bsp_interrupt_stack_end) .section ".bsp_start_text", "ax" _start: @@ -119,8 +117,8 @@ start_code_in_ram: */ /* Set stack pointer (common for RAM/ROM startup) */ - LA r1, bsp_section_text_begin - addi r1, r1, -0x10 /* Set up stack pointer = beginning of text section - 0x10 */ + LA r1, _Configuration_Interrupt_stack_area_end + addi r1, r1, -0x10 /* Create NULL */ li r0, 0 @@ -285,10 +283,3 @@ mpc8xx_zero_4_tail: blr end_reloc_startup: - - /* Interrupt stack */ - .section ".bsp_rwextra", "aw", @nobits - .align 4 -bsp_interrupt_stack_start: - .space 32768 -bsp_interrupt_stack_end: diff --git a/bsps/powerpc/virtex4/start/bspstart.c b/bsps/powerpc/virtex4/start/bspstart.c index 40cd710a58..93890c1623 100644 --- a/bsps/powerpc/virtex4/start/bspstart.c +++ b/bsps/powerpc/virtex4/start/bspstart.c @@ -85,9 +85,6 @@ LINKER_SYMBOL(RamSize); LINKER_SYMBOL(__bsp_ram_start); LINKER_SYMBOL(__bsp_ram_end); LINKER_SYMBOL(__rtems_end); -LINKER_SYMBOL(_stack); -LINKER_SYMBOL(StackSize); -LINKER_SYMBOL(__stack_base); LINKER_SYMBOL(WorkAreaBase); LINKER_SYMBOL(MsgAreaBase); LINKER_SYMBOL(MsgAreaSize); @@ -174,7 +171,7 @@ void bsp_start(void) /* * Initialize the interrupt related settings. */ - intrStackStart = CPU_UP_ALIGN((uint32_t)__bsp_ram_start); + intrStackStart = (uintptr_t) _Configuration_Interrupt_stack_area_begin; intrStackSize = rtems_configuration_get_interrupt_stack_size(); ppc_exc_initialize(intrStackStart, intrStackSize); @@ -184,14 +181,12 @@ void bsp_start(void) "RAM: %p %p\n" "RTEMS: %p\n" "Interrupt Stack: 0x%08x 0x%x\n" - "Stack: %p %p %p\n" "Workspace: %p %p\n" "MsgArea: %p %p\n" "Physical RAM %p\n", RamBase, RamSize, __rtems_end, intrStackStart, intrStackSize, - __stack_base, _stack, StackSize, WorkAreaBase, __bsp_ram_end, MsgAreaBase, MsgAreaSize, __phy_ram_end); diff --git a/bsps/powerpc/virtex4/start/linkcmds b/bsps/powerpc/virtex4/start/linkcmds index 472c797fd2..66705168ef 100644 --- a/bsps/powerpc/virtex4/start/linkcmds +++ b/bsps/powerpc/virtex4/start/linkcmds @@ -15,8 +15,6 @@ EXTERN(__vectors) MsgAreaSize = DEFINED(MsgAreaSize) ? MsgAreaSize : 1M; RamBase = DEFINED(RamBase) ? RamBase : 0x0; RamSize = DEFINED(RamSize) ? RamSize : 128M - MsgAreaSize; -IntrStackSize = DEFINED(IntrStackSize) ? IntrStackSize : 16K; -StackSize = DEFINED(StackSize) ? StackSize : 64K; HeapSize = DEFINED(HeapSize) ? HeapSize : 0; /* 0=Use def */ @@ -251,15 +249,6 @@ SECTIONS . = ALIGN(0x10); /* Align to a cache-line boundary */ PROVIDE(__bsp_ram_start = .); - /* Interrupt stack: aligned on a cache-line boundary */ - . += IntrStackSize; - __intrStack = .; - - /* Main stack lives here */ - _stack = ALIGN(0x10); /* Align to a cache-line boundary */ - . += StackSize; - __stack_base = .; /* Initial stack builds downwards */ - .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) } >RAM diff --git a/bsps/powerpc/virtex4/start/start.S b/bsps/powerpc/virtex4/start/start.S index 21948409bf..d4b8419551 100644 --- a/bsps/powerpc/virtex4/start/start.S +++ b/bsps/powerpc/virtex4/start/start.S @@ -82,7 +82,7 @@ * .bss * see linker command file for section placement * - * The initial stack is set to __stack_base. + * The initial stack is set to _Configuration_Interrupt_stack_area_end. * */ @@ -109,7 +109,7 @@ bss_length: bss_addr: .long __bss_start stack_top: - .long __stack_base + .long _Configuration_Interrupt_stack_area_end dccr_contents: .long __dccr iccr_contents: diff --git a/bsps/powerpc/virtex5/start/bspstart.c b/bsps/powerpc/virtex5/start/bspstart.c index 6457143d20..8297b164b6 100644 --- a/bsps/powerpc/virtex5/start/bspstart.c +++ b/bsps/powerpc/virtex5/start/bspstart.c @@ -86,9 +86,6 @@ LINKER_SYMBOL(RamSize); LINKER_SYMBOL(__bsp_ram_start); LINKER_SYMBOL(__bsp_ram_end); LINKER_SYMBOL(__rtems_end); -LINKER_SYMBOL(_stack); -LINKER_SYMBOL(StackSize); -LINKER_SYMBOL(__stack_base); LINKER_SYMBOL(WorkAreaBase); LINKER_SYMBOL(MsgAreaBase); LINKER_SYMBOL(MsgAreaSize); @@ -193,7 +190,7 @@ void bsp_start(void) /* * Initialize the interrupt related settings. */ - intrStackStart = CPU_UP_ALIGN((uint32_t)__bsp_ram_start); + intrStackStart = (uintptr_t)_Configuration_Interrupt_stack_area_begin; intrStackSize = rtems_configuration_get_interrupt_stack_size(); ppc_exc_initialize(intrStackStart, intrStackSize); @@ -203,14 +200,12 @@ void bsp_start(void) "RAM: %p %p\n" "RTEMS: %p\n" "Interrupt Stack: 0x%08x 0x%x\n" - "Stack: %p %p %p\n" "Workspace: %p %p\n" "MsgArea: %p %p\n" "Physical RAM %p\n", RamBase, RamSize, __rtems_end, intrStackStart, intrStackSize, - __stack_base, _stack, StackSize, WorkAreaBase, __bsp_ram_end, MsgAreaBase, MsgAreaSize, __phy_ram_end); diff --git a/bsps/powerpc/virtex5/start/linkcmds b/bsps/powerpc/virtex5/start/linkcmds index 4fd5243f3f..0cb4b4e752 100644 --- a/bsps/powerpc/virtex5/start/linkcmds +++ b/bsps/powerpc/virtex5/start/linkcmds @@ -15,8 +15,6 @@ EXTERN(__vectors) MsgAreaSize = DEFINED(MsgAreaSize) ? MsgAreaSize : 1M; RamBase = DEFINED(RamBase) ? RamBase : 0x0; RamSize = DEFINED(RamSize) ? RamSize : 2048M - MsgAreaSize; -IntrStackSize = DEFINED(IntrStackSize) ? IntrStackSize : 16K; -StackSize = DEFINED(StackSize) ? StackSize : 64K; HeapSize = DEFINED(HeapSize) ? HeapSize : 0; /* 0=Use def */ @@ -251,15 +249,6 @@ SECTIONS . = ALIGN(0x20); /* Align to a cache-line boundary */ PROVIDE(__bsp_ram_start = .); - /* Interrupt stack: aligned on a cache-line boundary */ - . += IntrStackSize; - __intrStack = .; - - /* Main stack lives here */ - _stack = ALIGN(0x20); /* Align to a cache-line boundary */ - . += StackSize; - __stack_base = .; /* Initial stack builds downwards */ - .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) } >RAM diff --git a/bsps/powerpc/virtex5/start/start.S b/bsps/powerpc/virtex5/start/start.S index 2b12c18c89..b63c103b14 100644 --- a/bsps/powerpc/virtex5/start/start.S +++ b/bsps/powerpc/virtex5/start/start.S @@ -86,7 +86,7 @@ * .bss * see linker command file for section placement * - * The initial stack is set to __stack_base + * The initial stack is set to _Configuration_Interrupt_stack_area_end. * * All the entry veneer has to do is to clear the BSS. */ @@ -114,7 +114,7 @@ bss_length: bss_addr: .long __bss_start stack_top: - .long __stack_base + .long _Configuration_Interrupt_stack_area_end .eject diff --git a/bsps/riscv/riscv_generic/start/start.S b/bsps/riscv/riscv_generic/start/start.S index ccefb818bd..8e2ac2440d 100644 --- a/bsps/riscv/riscv_generic/start/start.S +++ b/bsps/riscv/riscv_generic/start/start.S @@ -80,7 +80,7 @@ SYM(_start): csrw mtvec, t0 /* load stack and frame pointers */ - la sp, bsp_section_stack_begin + la sp, _Configuration_Interrupt_stack_area_end /* Clearing .bss */ la t0, bsp_section_bss_begin diff --git a/bsps/sh/gensh1/include/bsp.h b/bsps/sh/gensh1/include/bsp.h index b757a010d6..b70e8382a5 100644 --- a/bsps/sh/gensh1/include/bsp.h +++ b/bsps/sh/gensh1/include/bsp.h @@ -49,13 +49,6 @@ extern "C" { /* Constants */ /* - * Defined in the linker script 'linkcmds' - */ - -extern void *CPU_Interrupt_stack_low; -extern void *CPU_Interrupt_stack_high; - -/* * BSP methods that cross file boundaries. */ void bsp_hw_init(void); diff --git a/bsps/sh/gensh1/start/cpu_asm.c b/bsps/sh/gensh1/start/cpu_asm.c index 99d9cc9a6a..57c5c11796 100644 --- a/bsps/sh/gensh1/start/cpu_asm.c +++ b/bsps/sh/gensh1/start/cpu_asm.c @@ -44,9 +44,7 @@ /* from cpu_isps.c */ extern proc_ptr _Hardware_isr_Table[]; -#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) - unsigned long *_old_stack_ptr; -#endif +unsigned long *_old_stack_ptr; register unsigned long *stack_ptr __asm__ ("r15"); @@ -135,7 +133,6 @@ void __ISR_Handler( uint32_t vector) _Thread_Dispatch_disable(); -#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) if ( _ISR_Nest_level == 0 ) { /* Install irq stack */ @@ -143,8 +140,6 @@ void __ISR_Handler( uint32_t vector) stack_ptr = _CPU_Interrupt_stack_high; } -#endif - _ISR_Nest_level++; _ISR_Local_enable( level ); @@ -159,12 +154,9 @@ void __ISR_Handler( uint32_t vector) _ISR_Nest_level--; -#if(CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) - if ( _ISR_Nest_level == 0 ) /* restore old stack pointer */ stack_ptr = _old_stack_ptr; -#endif _ISR_Local_enable( level ); diff --git a/bsps/sh/gensh1/start/linkcmds b/bsps/sh/gensh1/start/linkcmds index bb190f8c5a..1ede3a2fb9 100644 --- a/bsps/sh/gensh1/start/linkcmds +++ b/bsps/sh/gensh1/start/linkcmds @@ -192,9 +192,6 @@ SECTIONS *(SORT(.rtemsstack.*)) } > onchip_ram - _CPU_Interrupt_stack_low = 0x0f000000 ; - _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ; - /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } @@ -228,7 +225,5 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - - stack : { _stack = .; *(.stack) } > onchip_ram /* These must appear regardless of . */ } diff --git a/bsps/sh/gensh1/start/start.S b/bsps/sh/gensh1/start/start.S index 66b1c4e091..6a2941c7e2 100644 --- a/bsps/sh/gensh1/start/start.S +++ b/bsps/sh/gensh1/start/start.S @@ -66,7 +66,7 @@ SYM (start): .align 2 stack_k: - .long SYM(stack) + .long SYM(_Configuration_Interrupt_stack_area_end) edata_k: .long SYM(edata) end_k: @@ -80,11 +80,3 @@ vects_k: .long SYM(vectab) vects_size: .word 255 - -#ifdef __ELF__ - .section .stack,"aw" -#else - .section .stack -#endif -SYM(stack): - .long 0xdeaddead diff --git a/bsps/sh/gensh2/include/bsp.h b/bsps/sh/gensh2/include/bsp.h index 1a08df9a43..38e2c49208 100644 --- a/bsps/sh/gensh2/include/bsp.h +++ b/bsps/sh/gensh2/include/bsp.h @@ -63,12 +63,6 @@ extern "C" { /* Constants */ /* - * Defined in the linker script 'linkcmds' - */ -extern void *CPU_Interrupt_stack_low; -extern void *CPU_Interrupt_stack_high; - -/* * BSP methods that cross file boundaries. */ void bsp_hw_init(void); diff --git a/bsps/sh/gensh2/start/cpu_asm.c b/bsps/sh/gensh2/start/cpu_asm.c index 47bc859dbd..7d6e09c4c4 100644 --- a/bsps/sh/gensh2/start/cpu_asm.c +++ b/bsps/sh/gensh2/start/cpu_asm.c @@ -42,9 +42,7 @@ /* from cpu_isps.c */ extern proc_ptr _Hardware_isr_Table[]; -#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) - unsigned long *_old_stack_ptr; -#endif +unsigned long *_old_stack_ptr; register unsigned long *stack_ptr __asm__ ("r15"); @@ -136,7 +134,6 @@ void __ISR_Handler( uint32_t vector) _Thread_Dispatch_disable(); -#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) if ( _ISR_Nest_level == 0 ) { /* Install irq stack */ @@ -144,8 +141,6 @@ void __ISR_Handler( uint32_t vector) stack_ptr = _CPU_Interrupt_stack_high; } -#endif - _ISR_Nest_level++; _ISR_Local_enable( level ); @@ -160,12 +155,9 @@ void __ISR_Handler( uint32_t vector) _ISR_Nest_level--; -#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) - if ( _ISR_Nest_level == 0 ) /* restore old stack pointer */ stack_ptr = _old_stack_ptr; -#endif _ISR_Local_enable( level ); diff --git a/bsps/sh/gensh2/start/linkcmds b/bsps/sh/gensh2/start/linkcmds index e6db97e0c3..d083d33330 100644 --- a/bsps/sh/gensh2/start/linkcmds +++ b/bsps/sh/gensh2/start/linkcmds @@ -203,9 +203,6 @@ SECTIONS *(SORT(.rtemsstack.*)) } > onchip_ram - _CPU_Interrupt_stack_low = 0xFFFFF000; - _CPU_Interrupt_stack_high = 0xFFFFFFFF; - /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } @@ -239,7 +236,5 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - - .stack 0xFFFFFEC0 : { _stack = .; *(.stack) } > onchip_ram /* These must appear regardless of . */ } diff --git a/bsps/sh/gensh2/start/linkcmds.ram b/bsps/sh/gensh2/start/linkcmds.ram index 8b53cd4f39..01765f683d 100644 --- a/bsps/sh/gensh2/start/linkcmds.ram +++ b/bsps/sh/gensh2/start/linkcmds.ram @@ -205,9 +205,6 @@ SECTIONS *(SORT(.rtemsstack.*)) } > onchip_ram - _CPU_Interrupt_stack_low = 0xFFFFF000; - _CPU_Interrupt_stack_high = 0xFFFFFFFF; - /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } @@ -241,7 +238,5 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - - .stack 0xFFFFFEC0 : { _stack = .; *(.stack) } > onchip_ram /* These must appear regardless of . */ } diff --git a/bsps/sh/gensh2/start/linkcmds.rom b/bsps/sh/gensh2/start/linkcmds.rom index 9f50cd7e64..d6a1bee744 100644 --- a/bsps/sh/gensh2/start/linkcmds.rom +++ b/bsps/sh/gensh2/start/linkcmds.rom @@ -210,9 +210,6 @@ SECTIONS *(SORT(.rtemsstack.*)) } > onchip_ram - _CPU_Interrupt_stack_low = 0xFFFFF000; - _CPU_Interrupt_stack_high = 0xFFFFFFFF; - /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } @@ -246,7 +243,5 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - - .stack 0xFFFFFEC0 : { _stack = .; *(.stack) } > onchip_ram /* These must appear regardless of . */ } diff --git a/bsps/sh/gensh2/start/start.S b/bsps/sh/gensh2/start/start.S index cba17af740..b8b3f50156 100644 --- a/bsps/sh/gensh2/start/start.S +++ b/bsps/sh/gensh2/start/start.S @@ -155,7 +155,7 @@ SYM (start): .align 2 stack_k: - .long SYM(stack) + .long SYM(_Configuration_Interrupt_stack_area_end) edata_k: .long SYM(edata) end_k: @@ -176,14 +176,6 @@ vects_size: .word 255 #ifdef __ELF__ - .section .stack,"aw" -#else - .section .stack -#endif -SYM(stack): - .long 0xdeaddead - -#ifdef __ELF__ .section .bss,"aw" #else .section .bss diff --git a/bsps/sh/gensh2/start/start.ram b/bsps/sh/gensh2/start/start.ram index 04e68238a6..7f6b5faf65 100644 --- a/bsps/sh/gensh2/start/start.ram +++ b/bsps/sh/gensh2/start/start.ram @@ -158,7 +158,7 @@ SYM (start): .align 2 stack_k: - .long SYM(stack) + .long SYM(_Configuration_Interrupt_stack_area_end) edata_k: .long SYM(edata) end_k: @@ -179,14 +179,6 @@ vects_size: .word 255 #ifdef __ELF__ - .section .stack,"aw" -#else - .section .stack -#endif -SYM(stack): - .long 0xdeaddead - -#ifdef __ELF__ .section .bss,"aw" #else .section .bss diff --git a/bsps/sh/gensh2/start/start.rom b/bsps/sh/gensh2/start/start.rom index 87fadd50f3..79068daa82 100644 --- a/bsps/sh/gensh2/start/start.rom +++ b/bsps/sh/gensh2/start/start.rom @@ -67,7 +67,7 @@ SYM (start): .align 2 stack_k: - .long SYM(stack) + .long SYM(_Configuration_Interrupt_stack_area_end) edata_k: .long SYM(edata) end_k: @@ -81,11 +81,3 @@ vects_k: .long SYM(vectab) vects_size: .word 255 - -#ifdef __ELF__ - .section .stack,"aw" -#else - .section .stack -#endif -SYM(stack): - .long 0xdeaddead diff --git a/bsps/sh/gensh4/include/bsp.h b/bsps/sh/gensh4/include/bsp.h index b70c2ffdac..f29957cfa5 100644 --- a/bsps/sh/gensh4/include/bsp.h +++ b/bsps/sh/gensh4/include/bsp.h @@ -53,13 +53,6 @@ extern "C" { /* Constants */ /* - * Defined in the linker script 'linkcmds' - */ - -extern void *CPU_Interrupt_stack_low; -extern void *CPU_Interrupt_stack_high; - -/* * Defined in start.S */ extern uint32_t boot_mode; diff --git a/bsps/sh/gensh4/start/cpu_asm.c b/bsps/sh/gensh4/start/cpu_asm.c index 52a033bb75..7618db3e27 100644 --- a/bsps/sh/gensh4/start/cpu_asm.c +++ b/bsps/sh/gensh4/start/cpu_asm.c @@ -42,9 +42,7 @@ /* from cpu_isps.c */ extern proc_ptr _Hardware_isr_Table[]; -#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) - unsigned long *_old_stack_ptr; -#endif +unsigned long *_old_stack_ptr; register unsigned long *stack_ptr __asm__ ("r15"); @@ -60,7 +58,6 @@ void __ISR_Handler( uint32_t vector) _Thread_Dispatch_disable(); -#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) if ( _ISR_Nest_level == 0 ) { /* Install irq stack */ @@ -68,8 +65,6 @@ void __ISR_Handler( uint32_t vector) stack_ptr = _CPU_Interrupt_stack_high; } -#endif - _ISR_Nest_level++; _ISR_Local_enable( level ); @@ -84,11 +79,9 @@ void __ISR_Handler( uint32_t vector) _ISR_Nest_level--; -#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) if ( _ISR_Nest_level == 0 ) /* restore old stack pointer */ stack_ptr = _old_stack_ptr; -#endif _ISR_Local_enable( level ); diff --git a/bsps/sh/gensh4/start/linkcmds b/bsps/sh/gensh4/start/linkcmds index 21e0fdc5c9..df1c157865 100644 --- a/bsps/sh/gensh4/start/linkcmds +++ b/bsps/sh/gensh4/start/linkcmds @@ -144,20 +144,12 @@ SECTIONS __bss_end = .; } > ram - .stack : { - . = . + 4096; - } > ram - .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) } > ram _WorkAreaBase = . ; - . = ALIGN(16); - _CPU_Interrupt_stack_low = . ; - _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ; - /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } diff --git a/bsps/sh/gensh4/start/linkcmds.rom b/bsps/sh/gensh4/start/linkcmds.rom index 5e37f06941..49b5b08884 100644 --- a/bsps/sh/gensh4/start/linkcmds.rom +++ b/bsps/sh/gensh4/start/linkcmds.rom @@ -193,17 +193,6 @@ SECTIONS _WorkAreaBase = . ; - . = ALIGN(16); - .stack . : { - stack_start = .; - . = . + 4096; - stack_end = .; - } - - . = ALIGN(16); - _CPU_Interrupt_stack_low = . ; - _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ; - /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } @@ -237,6 +226,5 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - .stack : { _stack = .; *(.stack) } /* These must appear regardless of . */ } diff --git a/bsps/sh/gensh4/start/linkcmds.rom2ram b/bsps/sh/gensh4/start/linkcmds.rom2ram index 2fff0d1f98..99a4a89147 100644 --- a/bsps/sh/gensh4/start/linkcmds.rom2ram +++ b/bsps/sh/gensh4/start/linkcmds.rom2ram @@ -197,17 +197,6 @@ SECTIONS _WorkAreaBase = . ; - . = ALIGN(16); - .stack . : { - stack_start = .; - . = . + 4096; - stack_end = .; - } - - . = ALIGN(16); - _CPU_Interrupt_stack_low = . ; - _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ; - /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } @@ -241,6 +230,5 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - .stack : { _stack = .; *(.stack) } /* These must appear regardless of . */ } diff --git a/bsps/sh/gensh4/start/start.S b/bsps/sh/gensh4/start/start.S index a695daaf8a..711583ed6d 100644 --- a/bsps/sh/gensh4/start/start.S +++ b/bsps/sh/gensh4/start/start.S @@ -215,7 +215,7 @@ _vbr_base_k: __VBR_Saved_k: .long SYM(_VBR_Saved) stack_k: - .long SYM(stack) + .long SYM(_Configuration_Interrupt_stack_area_end) __bss_start_k: .long __bss_start __bss_end_k: @@ -255,14 +255,6 @@ boot_mode_k: .long _boot_mode #ifdef __ELF__ - .section .stack,"aw" -#else - .section .stack -#endif -SYM(stack): - .long 0xdeaddead - -#ifdef __ELF__ .section .bss,"aw" #else .section .bss diff --git a/bsps/sh/shared/start/bspstart.c b/bsps/sh/shared/start/bspstart.c index 57b2c9e1ef..a2b0110874 100644 --- a/bsps/sh/shared/start/bspstart.c +++ b/bsps/sh/shared/start/bspstart.c @@ -49,14 +49,6 @@ void bsp_start( void ) #endif /* - * initialize the interrupt stack for this BSP - */ - #if ( CPU_ALLOCATE_INTERRUPT_STACK == FALSE ) - _CPU_Interrupt_stack_low = &CPU_Interrupt_stack_low; - _CPU_Interrupt_stack_high = &CPU_Interrupt_stack_high; - #endif - - /* * initialize the device driver parameters */ bsp_clicks_per_second = CPU_CLOCK_RATE_HZ; diff --git a/bsps/sh/shsim/include/bsp.h b/bsps/sh/shsim/include/bsp.h index 7b8236b09a..ff63b3849b 100644 --- a/bsps/sh/shsim/include/bsp.h +++ b/bsps/sh/shsim/include/bsp.h @@ -46,12 +46,6 @@ void *clock_driver_sim_idle_body(uintptr_t); #define BSP_IDLE_TASK_BODY clock_driver_sim_idle_body /* - * Defined in the linker script 'linkcmds' - */ -extern void *CPU_Interrupt_stack_low; -extern void *CPU_Interrupt_stack_high; - -/* * BSP methods that cross file boundaries. */ int _sys_exit (int n); diff --git a/bsps/sh/shsim/start/cpu_asm.c b/bsps/sh/shsim/start/cpu_asm.c index 2ca8926a24..1b8135ee0a 100644 --- a/bsps/sh/shsim/start/cpu_asm.c +++ b/bsps/sh/shsim/start/cpu_asm.c @@ -18,9 +18,7 @@ #include <rtems/score/threaddispatch.h> #include <rtems/score/sh.h> -#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) - unsigned long *_old_stack_ptr; -#endif +unsigned long *_old_stack_ptr; register unsigned long *stack_ptr __asm__ ("r15"); @@ -37,7 +35,6 @@ void __ISR_Handler( uint32_t vector) _Thread_Dispatch_disable(); -#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) if ( _ISR_Nest_level == 0 ) { /* Install irq stack */ @@ -45,8 +42,6 @@ void __ISR_Handler( uint32_t vector) stack_ptr = _CPU_Interrupt_stack_high; } -#endif - _ISR_Nest_level++; _ISR_Local_enable( level ); @@ -61,12 +56,9 @@ void __ISR_Handler( uint32_t vector) _ISR_Nest_level--; -#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) - if ( _ISR_Nest_level == 0 ) /* restore old stack pointer */ stack_ptr = _old_stack_ptr; -#endif _ISR_Local_enable( level ); diff --git a/bsps/sh/shsim/start/linkcmds b/bsps/sh/shsim/start/linkcmds index 932d94161f..c0381c0b14 100644 --- a/bsps/sh/shsim/start/linkcmds +++ b/bsps/sh/shsim/start/linkcmds @@ -202,22 +202,12 @@ SECTIONS _end = . ; PROVIDE (end = .); - .stack : { - . += 0x1000; - *(.stack) - _stack = .; - } > ram - _stack = .; - .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) } > ram _WorkAreaBase = . ; - _CPU_Interrupt_stack_low = 0x00080000 ; - _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ; - /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } @@ -251,9 +241,5 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - -/* - .stack 0x00081ff0 : { _stack = .; *(.stack) } > onchip_ram -*/ /* These must appear regardless of . */ } diff --git a/bsps/sh/shsim/start/start.S b/bsps/sh/shsim/start/start.S index cc4727b9ff..e116704370 100644 --- a/bsps/sh/shsim/start/start.S +++ b/bsps/sh/shsim/start/start.S @@ -68,7 +68,7 @@ SYM (start): .align 2 stack_k: - .long SYM(stack) + .long SYM(_Configuration_Interrupt_stack_area_end) edata_k: .long SYM(edata) end_k: @@ -82,13 +82,3 @@ vects_k: .long SYM(vectab) vects_size: .word 255 - -#ifdef __ELF__ - .section .stack,"aw" -#else - .section .stack -#endif -SYM(stack): - .long 0xdeaddead -monvects_k: - .long SYM(monvects) diff --git a/bsps/sparc/shared/start/bspgetworkarea.c b/bsps/sparc/shared/start/bspgetworkarea.c index b05113d9eb..512d223211 100644 --- a/bsps/sparc/shared/start/bspgetworkarea.c +++ b/bsps/sparc/shared/start/bspgetworkarea.c @@ -27,13 +27,9 @@ extern uint32_t rdb_start; */ void bsp_work_area_initialize(void) { - /* must be identical to STACK_SIZE in start.S */ - #define STACK_SIZE (16 * 1024) - /* Early dynamic memory allocator is placed just above _end */ void *work_area_start = (void *)&end; - uintptr_t work_area_size = - (uintptr_t)rdb_start - (uintptr_t)&end - STACK_SIZE; + uintptr_t work_area_size = (uintptr_t)rdb_start - (uintptr_t)work_area_start; /* * The following may be helpful in debugging what goes wrong when diff --git a/bsps/sparc/shared/start/start.S b/bsps/sparc/shared/start/start.S index 64498c6110..5bd2937a13 100644 --- a/bsps/sparc/shared/start/start.S +++ b/bsps/sparc/shared/start/start.S @@ -265,7 +265,6 @@ SYM(CLOCK_SPEED): #define PSR_INIT 0x10c0 /* Disable traps, set s and ps */ #define WIM_INIT 2 -#define STACK_SIZE 16 * 1024 PUBLIC(hard_reset) SYM(hard_reset): @@ -317,9 +316,16 @@ SYM(hard_reset): st %o0, [%o1] #endif - set (SYM(rdb_start)), %g5 ! End of RAM + set SYM(rdb_start), %g5 ! End of RAM st %sp, [%g5] - sub %sp, 4, %sp ! stack starts at end of RAM - 4 + set SYM(_Configuration_Interrupt_stack_size), %g5 +#if defined(START_LEON3_ENABLE_SMP) + add %o0, 1, %o0 + smul %o0, %g5, %g5 +#endif + set SYM(_Configuration_Interrupt_stack_area_begin), %sp + add %sp, %g5, %sp + sub %sp, 4, %sp ! stack starts at end of area - 4 andn %sp, 0x0f, %sp ! align stack on 16-byte boundary mov %sp, %fp ! Set frame pointer nop diff --git a/bsps/v850/gdbv850sim/start/linkcmds b/bsps/v850/gdbv850sim/start/linkcmds index 86613dd73d..c128a08de1 100644 --- a/bsps/v850/gdbv850sim/start/linkcmds +++ b/bsps/v850/gdbv850sim/start/linkcmds @@ -4,7 +4,6 @@ _RamBase = DEFINED(_RamBase) ? _RamBase : 0x100000; /* RAM starts at 1MB */ _RamSize = DEFINED(_RamSize) ? _RamSize : 0x100000; /* default is 1MB */ _HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0; -_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000; /* Default linker script, for normal executables */ OUTPUT_FORMAT("elf32-v850-rh850", "elf32-v850-rh850", @@ -192,8 +191,6 @@ SECTIONS *(.bss) *(COMMON) } - . += _StackSize; - _stack = .; .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) } @@ -233,13 +230,5 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - /* libgloss - User stack. */ -/* - .stack 0x200000 : - { - __stack = .; - *(.stack) - } -*/ } diff --git a/bsps/v850/gdbv850sim/start/start.S b/bsps/v850/gdbv850sim/start/start.S index 419e635393..82ae4ebcb7 100644 --- a/bsps/v850/gdbv850sim/start/start.S +++ b/bsps/v850/gdbv850sim/start/start.S @@ -9,7 +9,7 @@ _start: movea 255, r0, r20 mov 65535, r21 - mov hilo(_stack), sp + mov hilo(__Configuration_Interrupt_stack_area_end), sp mov hilo(__ep), ep mov hilo(__gp), gp mov hilo(__ctbp), r6 @@ -36,8 +36,8 @@ _start: movea 255, r0, r20 mov r0, r21 ori 65535, r0, r21 - movhi hi(_stack), r0, sp - movea lo(_stack), sp, sp + movhi hi(__Configuration_Interrupt_stack_area_end), r0, sp + movea lo(__Configuration_Interrupt_stack_area_end), sp, sp movhi hi(__ep), r0, ep movea lo(__ep), ep, ep movhi hi(__gp), r0, gp @@ -66,11 +66,6 @@ _start: /* jarl _exit, r31 */ # endif -#if 0 - .section .stack -_stack: .long 1 -#endif - .section .data .global ___dso_handle .weak ___dso_handle diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/Makefile.am b/c/src/lib/libbsp/arm/altera-cyclone-v/Makefile.am index 3c5bea2029..5f34001877 100644 --- a/c/src/lib/libbsp/arm/altera-cyclone-v/Makefile.am +++ b/c/src/lib/libbsp/arm/altera-cyclone-v/Makefile.am @@ -19,7 +19,6 @@ project_lib_DATA = start.$(OBJEXT) project_lib_DATA += linkcmds dist_project_lib_DATA += ../../../../../../bsps/arm/altera-cyclone-v/start/linkcmds.altcycv dist_project_lib_DATA += ../../../../../../bsps/arm/altera-cyclone-v/start/linkcmds.altcycv_devkit -dist_project_lib_DATA += ../../../../../../bsps/arm/altera-cyclone-v/start/linkcmds.altcycv_devkit_smp project_lib_LIBRARIES = librtemsbsp.a diff --git a/c/src/lib/libbsp/arm/raspberrypi/configure.ac b/c/src/lib/libbsp/arm/raspberrypi/configure.ac index c88ce82f43..0f3a399877 100644 --- a/c/src/lib/libbsp/arm/raspberrypi/configure.ac +++ b/c/src/lib/libbsp/arm/raspberrypi/configure.ac @@ -10,6 +10,7 @@ AC_INIT([rtems-c-src-lib-libbsp-arm-raspberrypi],[_RTEMS_VERSION],[https://devel RTEMS_TOP(../../../../../..) RTEMS_SOURCE_TOP RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) @@ -36,21 +37,7 @@ RTEMS_BSPOPTS_SET([BSP_IS_RPI2],[*],[0]) RTEMS_BSPOPTS_HELP([BSP_IS_RPI2],[Set if the BSP variant is Raspberry Pi 2.]) AM_CONDITIONAL(RTEMS_RPI2,[test "$BSP_IS_RPI2" = "1"]) -# Hom many CPUs are used? -RASPBERRYPI_CPUS="1" -AS_IF([test "$rtems_cv_HAS_SMP" = "yes"], - [RASPBERRYPI_CPUS="4"]) - -AC_DEFUN([RASPBERRYPI_LINKCMD],[ -AC_ARG_VAR([$1],[$2; default $3])dnl -[$1]=[$]{[$1]:-[$3]} -]) - -RASPBERRYPI_LINKCMD([RASPBERRYPI_CPUS],[Number of active cores],[${RASPBERRYPI_CPUS}]) - RTEMS_BSP_CLEANUP_OPTIONS -AC_CONFIG_FILES([ -Makefile -linkcmds:../../../../../../bsps/arm/raspberrypi/start/linkcmds.in]) +AC_CONFIG_FILES([Makefile]) AC_OUTPUT diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am b/c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am index e41e065ba1..01e1f3eae4 100644 --- a/c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am @@ -26,7 +26,6 @@ project_lib_DATA = start.$(OBJEXT) project_lib_DATA += linkcmds dist_project_lib_DATA += ../../../../../../bsps/arm/realview-pbx-a9/start/linkcmds.realview_pbx_a9_qemu -dist_project_lib_DATA += ../../../../../../bsps/arm/realview-pbx-a9/start/linkcmds.realview_pbx_a9_qemu_smp ############################################################################### # LibBSP # diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac b/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac index e282b3546b..f58b737b1b 100644 --- a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac +++ b/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac @@ -58,10 +58,6 @@ RTEMS_BSPOPTS_HELP([BSP_CONSOLE_MINOR],[minor number of console device]) RTEMS_BSPOPTS_SET([ZYNQ_CONSOLE_USE_INTERRUPTS],[*],[1]) RTEMS_BSPOPTS_HELP([ZYNQ_CONSOLE_USE_INTERRUPTS],[use interrupt driven mode for console devices (used by default)]) -ZYNQ_CPUS="1" -AS_IF([test "$rtems_cv_HAS_SMP" = "yes"], - [ZYNQ_CPUS="2"]) - # # Zynq Memory map can be controlled from the configure command line. Use ... # @@ -126,7 +122,6 @@ AC_ARG_VAR([$1],[$2; default $3])dnl [$1]=[$]{[$1]:-[$3]} ]) -ZYNQ_LINKCMD([ZYNQ_CPUS],[Number of active cores],[${ZYNQ_CPUS}]) ZYNQ_LINKCMD([ZYNQ_RAM_ORIGIN],[normal RAM region origin],[${ZYNQ_RAM_ORIGIN}]) ZYNQ_LINKCMD([ZYNQ_RAM_LENGTH],[normal RAM region length],[${BSP_ZYNQ_RAM_LENGTH}]) ZYNQ_LINKCMD([ZYNQ_RAM_MMU],[MMU region origin],[${ZYNQ_RAM_MMU}]) diff --git a/cpukit/include/rtems/confdefs.h b/cpukit/include/rtems/confdefs.h index 7f3ffdff0d..e56826af5a 100644 --- a/cpukit/include/rtems/confdefs.h +++ b/cpukit/include/rtems/confdefs.h @@ -1182,12 +1182,13 @@ extern rtems_initialization_tasks_table Initialization_tasks[]; #error "CONFIGURE_IDLE_TASK_STACK_SIZE less than CONFIGURE_MINIMUM_TASK_STACK_SIZE" #endif -/** - * @brief Interrupt stack size configuration. +/* + * Interrupt stack configuration. * * By default, the interrupt stack will be of minimum size. * The BSP or application may override this value. */ + #ifndef CONFIGURE_INTERRUPT_STACK_SIZE #ifdef BSP_INTERRUPT_STACK_SIZE #define CONFIGURE_INTERRUPT_STACK_SIZE BSP_INTERRUPT_STACK_SIZE @@ -1196,18 +1197,23 @@ extern rtems_initialization_tasks_table Initialization_tasks[]; #endif #endif -/** - * This reserves memory for the interrupt stack if it is to be allocated - * by RTEMS rather than the BSP. - * - * @todo Try to get to the point where all BSPs support allocating the - * memory from the Workspace. - */ -#if (CPU_ALLOCATE_INTERRUPT_STACK == 0) - #define _CONFIGURE_INTERRUPT_STACK_MEMORY 0 -#else - #define _CONFIGURE_INTERRUPT_STACK_MEMORY \ - _Configure_From_workspace( CONFIGURE_INTERRUPT_STACK_SIZE ) +#if CONFIGURE_INTERRUPT_STACK_SIZE % CPU_INTERRUPT_STACK_ALIGNMENT != 0 + #error "CONFIGURE_INTERRUPT_STACK_SIZE fails to meet the CPU port interrupt stack alignment" +#endif + +#ifdef CONFIGURE_INIT + RTEMS_DEFINE_GLOBAL_SYMBOL( + _Configuration_Interrupt_stack_size, + CONFIGURE_INTERRUPT_STACK_SIZE + ); + + char _Configuration_Interrupt_stack_area_begin[ + CONFIGURE_MAXIMUM_PROCESSORS * CONFIGURE_INTERRUPT_STACK_SIZE + ] RTEMS_ALIGNED( CPU_INTERRUPT_STACK_ALIGNMENT ) + RTEMS_SECTION( ".rtemsstack.interrupt.begin" ); + + const char _Configuration_Interrupt_stack_area_end[ 0 ] + RTEMS_SECTION( ".rtemsstack.interrupt.end" ) = { }; #endif /** @@ -2720,9 +2726,7 @@ extern rtems_initialization_tasks_table Initialization_tasks[]; * This macro accounts for general RTEMS system overhead. */ #define _CONFIGURE_MEMORY_FOR_SYSTEM_OVERHEAD \ - ( _CONFIGURE_MEMORY_FOR_INTERNAL_TASKS + \ - _CONFIGURE_INTERRUPT_STACK_MEMORY \ - ) + _CONFIGURE_MEMORY_FOR_INTERNAL_TASKS /** * This macro reserves the memory required by the statically configured @@ -2752,18 +2756,6 @@ extern rtems_initialization_tasks_table Initialization_tasks[]; _CONFIGURE_MEMORY_FOR_USER_EXTENSIONS(CONFIGURE_MAXIMUM_USER_EXTENSIONS) \ ) -/* - * This macro provides a summation of the memory required by SMP as configured. - */ -#if defined(RTEMS_SMP) - #define _CONFIGURE_MEMORY_FOR_SMP \ - (CONFIGURE_MAXIMUM_PROCESSORS * \ - _Configure_From_workspace( CONFIGURE_INTERRUPT_STACK_SIZE ) \ - ) -#else - #define _CONFIGURE_MEMORY_FOR_SMP 0 -#endif - /** * This calculates the memory required for the executive workspace. * @@ -2783,7 +2775,6 @@ extern rtems_initialization_tasks_table Initialization_tasks[]; _CONFIGURE_MEMORY_FOR_POSIX + \ _CONFIGURE_MEMORY_FOR_STATIC_EXTENSIONS + \ _CONFIGURE_MEMORY_FOR_MP + \ - _CONFIGURE_MEMORY_FOR_SMP + \ CONFIGURE_MESSAGE_BUFFER_MEMORY + \ (CONFIGURE_MEMORY_OVERHEAD * 1024) + \ _CONFIGURE_HEAP_HANDLER_OVERHEAD \ @@ -3082,7 +3073,6 @@ extern rtems_initialization_tasks_table Initialization_tasks[]; CONFIGURE_TICKS_PER_TIMESLICE, /* ticks per timeslice quantum */ CONFIGURE_IDLE_TASK_BODY, /* user's IDLE task */ CONFIGURE_IDLE_TASK_STACK_SIZE, /* IDLE task stack size */ - CONFIGURE_INTERRUPT_STACK_SIZE, /* interrupt stack size */ CONFIGURE_TASK_STACK_ALLOCATOR_INIT, /* stack allocator init */ CONFIGURE_TASK_STACK_ALLOCATOR, /* stack allocator */ CONFIGURE_TASK_STACK_DEALLOCATOR, /* stack deallocator */ @@ -3239,7 +3229,6 @@ extern rtems_initialization_tasks_table Initialization_tasks[]; uint32_t POSIX; /* System overhead pieces */ - uint32_t INTERRUPT_STACK_MEMORY; uint32_t MEMORY_FOR_IDLE_TASK; /* Classic API Pieces */ @@ -3288,7 +3277,6 @@ extern rtems_initialization_tasks_table Initialization_tasks[]; _CONFIGURE_MEMORY_FOR_POSIX, /* System overhead pieces */ - _CONFIGURE_INTERRUPT_STACK_MEMORY, _CONFIGURE_MEMORY_FOR_INTERNAL_TASKS, /* Classic API Pieces */ diff --git a/cpukit/include/rtems/config.h b/cpukit/include/rtems/config.h index 6b97376511..248ace0721 100644 --- a/cpukit/include/rtems/config.h +++ b/cpukit/include/rtems/config.h @@ -184,13 +184,6 @@ typedef struct { */ uint32_t idle_task_stack_size; - /** - * This field specifies the size of the interrupt stack. If less than or - * equal to the minimum stack size, then the interrupt stack will be of - * minimum stack size. - */ - uint32_t interrupt_stack_size; - /** * @brief Optional task stack allocator initialization hook. */ @@ -313,8 +306,34 @@ extern const rtems_configuration_table Configuration; #define rtems_configuration_get_idle_task_stack_size() \ (Configuration.idle_task_stack_size) +/** + * @brief Global symbol with a value equal to the configure interrupt stack size. + * + * This global symbol is defined by the application configuration option + * CONFIGURE_INIT_TASK_STACK_SIZE via <rtems/confdefs.h>. + */ +RTEMS_DECLARE_GLOBAL_SYMBOL( _Configuration_Interrupt_stack_size ); + +/** + * @brief The interrupt stack area begin. + * + * The interrupt stack area is defined by the application configuration via + * <rtems/confdefs.h>. The size of the area depends on + * CONFIGURE_INIT_TASK_STACK_SIZE and CONFIGURE_MAXIMUM_PROCESSORS. + */ +extern char _Configuration_Interrupt_stack_area_begin[]; + +/** + * @brief The interrupt stack area end. + * + * The interrupt stack area is defined by the application configuration via + * <rtems/confdefs.h>. The size of the area depends on + * CONFIGURE_INIT_TASK_STACK_SIZE and CONFIGURE_MAXIMUM_PROCESSORS. + */ +extern const char _Configuration_Interrupt_stack_area_end[]; + #define rtems_configuration_get_interrupt_stack_size() \ - (Configuration.interrupt_stack_size) + ((size_t) _Configuration_Interrupt_stack_size) #define rtems_configuration_get_stack_allocate_init_hook() \ (Configuration.stack_allocate_init_hook) diff --git a/cpukit/include/rtems/score/percpu.h b/cpukit/include/rtems/score/percpu.h index 7d0a6c06bf..4a8353db47 100644 --- a/cpukit/include/rtems/score/percpu.h +++ b/cpukit/include/rtems/score/percpu.h @@ -293,20 +293,15 @@ typedef struct Per_CPU_Control { CPU_Per_CPU_control cpu_per_cpu; #endif - #if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \ - (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) - /** - * This contains a pointer to the lower range of the interrupt stack for - * this CPU. This is the address allocated and freed. - */ - void *interrupt_stack_low; + /** + * @brief The interrupt stack low address for this processor. + */ + void *interrupt_stack_low; - /** - * This contains a pointer to the interrupt stack pointer for this CPU. - * It will be loaded at the beginning on an ISR. - */ - void *interrupt_stack_high; - #endif + /** + * @brief The interrupt stack high address for this processor. + */ + void *interrupt_stack_high; /** * This contains the current interrupt nesting level on this @@ -800,33 +795,21 @@ RTEMS_INLINE_ROUTINE struct _Thread_Control *_Thread_Get_executing( void ) #if defined( ASM ) || defined( _RTEMS_PERCPU_DEFINE_OFFSETS ) -#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \ - (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) - /* - * If this CPU target lets RTEMS allocates the interrupt stack, then - * we need to have places in the per CPU table to hold them. - */ - #define PER_CPU_INTERRUPT_STACK_LOW \ - CPU_PER_CPU_CONTROL_SIZE - #define PER_CPU_INTERRUPT_STACK_HIGH \ - PER_CPU_INTERRUPT_STACK_LOW + CPU_SIZEOF_POINTER - #define PER_CPU_END_STACK \ - PER_CPU_INTERRUPT_STACK_HIGH + CPU_SIZEOF_POINTER - - #define INTERRUPT_STACK_LOW \ - (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_LOW) - #define INTERRUPT_STACK_HIGH \ - (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_HIGH) -#else - #define PER_CPU_END_STACK \ - CPU_PER_CPU_CONTROL_SIZE -#endif +#define PER_CPU_INTERRUPT_STACK_LOW \ + CPU_PER_CPU_CONTROL_SIZE +#define PER_CPU_INTERRUPT_STACK_HIGH \ + PER_CPU_INTERRUPT_STACK_LOW + CPU_SIZEOF_POINTER + +#define INTERRUPT_STACK_LOW \ + (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_LOW) +#define INTERRUPT_STACK_HIGH \ + (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_HIGH) /* * These are the offsets of the required elements in the per CPU table. */ #define PER_CPU_ISR_NEST_LEVEL \ - PER_CPU_END_STACK + PER_CPU_INTERRUPT_STACK_HIGH + CPU_SIZEOF_POINTER #define PER_CPU_ISR_DISPATCH_DISABLE \ PER_CPU_ISR_NEST_LEVEL + 4 #define PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL \ diff --git a/cpukit/libmisc/stackchk/check.c b/cpukit/libmisc/stackchk/check.c index abbd0e0845..bc4a7fc478 100644 --- a/cpukit/libmisc/stackchk/check.c +++ b/cpukit/libmisc/stackchk/check.c @@ -181,7 +181,6 @@ bool rtems_stack_checker_create_extension( void rtems_stack_checker_begin_extension( Thread_Control *executing ) { -#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) Per_CPU_Control *cpu_self; uint32_t cpu_self_index; Stack_Control *stack; @@ -214,7 +213,6 @@ void rtems_stack_checker_begin_extension( Thread_Control *executing ) #if defined(RTEMS_SMP) _Thread_Dispatch_enable( cpu_self ); #endif -#endif } /* diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu.h b/cpukit/score/cpu/arm/include/rtems/score/cpu.h index 3f06c036f0..4260e98221 100644 --- a/cpukit/score/cpu/arm/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/arm/include/rtems/score/cpu.h @@ -105,12 +105,6 @@ */ #define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE - -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -#define CPU_ALLOCATE_INTERRUPT_STACK FALSE - #define CPU_ISR_PASSES_FRAME_POINTER FALSE #define CPU_HARDWARE_FP FALSE diff --git a/cpukit/score/cpu/bfin/cpu.c b/cpukit/score/cpu/bfin/cpu.c index 98c83c9586..f5fb0c4cdd 100644 --- a/cpukit/score/cpu/bfin/cpu.c +++ b/cpukit/score/cpu/bfin/cpu.c @@ -198,17 +198,3 @@ void _CPU_Context_Initialize( the_context->register_rets = (uint32_t) entry_point; the_context->imask = new_level ? 0 : 0xffff; } - - - -/* - * _CPU_Install_interrupt_stack - * - * NO_CPU Specific Information: - * - * XXX document implementation including references if appropriate - */ - -void _CPU_Install_interrupt_stack( void ) -{ -} diff --git a/cpukit/score/cpu/bfin/include/rtems/score/cpu.h b/cpukit/score/cpu/bfin/include/rtems/score/cpu.h index d3e4e4b057..c19a077bd3 100644 --- a/cpukit/score/cpu/bfin/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/bfin/include/rtems/score/cpu.h @@ -30,35 +30,6 @@ extern "C" { /* conditional compilation parameters */ -/** - * Does RTEMS manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * If the CPU supports a dedicated interrupt stack in hardware, - * then it is generally the responsibility of the BSP to allocate it - * and set it up. - * - * If the CPU does not support a dedicated interrupt stack, then - * the porter has two options: (1) execute interrupts on the - * stack of the interrupted task, and (2) have RTEMS manage a dedicated - * interrupt stack. - * - * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE - /* * Does the CPU follow the simple vectored interrupt model? * @@ -73,40 +44,6 @@ extern "C" { #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE /** - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * If TRUE, then it must be installed during initialization. - * If FALSE, then no installation is performed. - * - * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -/** - * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager? - * - * If TRUE, then the memory is allocated during initialization. - * If FALSE, then the memory is allocated during initialization. - * - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/** * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? @@ -402,21 +339,6 @@ typedef struct { /** * @defgroup CPUInterrupt Processor Dependent Interrupt Management - * - * On some CPUs, RTEMS supports a software managed interrupt stack. - * This stack is allocated by the Interrupt Manager and the switch - * is performed in @ref _ISR_Handler. These variables contain pointers - * to the lowest and highest addresses in the chunk of memory allocated - * for the interrupt stack. Since it is unknown whether the stack - * grows up or down (in general), this give the CPU dependent - * code the option of picking the version it wants to use. - * - * @note These two variables are required if the macro - * @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate */ /**@{**/ @@ -816,19 +738,6 @@ void _CPU_ISR_install_vector( ); /** - * @ingroup CPUInterrupt - * This routine installs the hardware interrupt stack pointer. - * - * @note It need only be provided if @ref CPU_HAS_HARDWARE_INTERRUPT_STACK - * is TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -void _CPU_Install_interrupt_stack( void ); - -/** * This routine is the CPU dependent IDLE thread body. * * @note It need only be provided if @ref CPU_PROVIDES_IDLE_THREAD_BODY diff --git a/cpukit/score/cpu/epiphany/cpu.c b/cpukit/score/cpu/epiphany/cpu.c index 0428a86367..489576cfc7 100644 --- a/cpukit/score/cpu/epiphany/cpu.c +++ b/cpukit/score/cpu/epiphany/cpu.c @@ -83,11 +83,6 @@ void _CPU_ISR_install_vector( /* Do nothing */ } -void _CPU_Install_interrupt_stack( void ) -{ - /* Do nothing */ -} - CPU_Counter_ticks _CPU_Counter_read( void ) { static CPU_Counter_ticks counter; diff --git a/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h b/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h index 65f28ac435..9167c09eab 100644 --- a/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h @@ -50,67 +50,6 @@ extern "C" { /* conditional compilation parameters */ /* - * Does RTEMS manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * If the CPU supports a dedicated interrupt stack in hardware, - * then it is generally the responsibility of the BSP to allocate it - * and set it up. - * - * If the CPU does not support a dedicated interrupt stack, then - * the porter has two options: (1) execute interrupts on the - * stack of the interrupted task, and (2) have RTEMS manage a dedicated - * interrupt stack. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * Currently, for epiphany port, _ISR_Handler is responsible for switching to - * RTEMS dedicated interrupt task. - * - */ - -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE - -/* - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * If TRUE, then it must be installed during initialization. - * If FALSE, then no installation is performed. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - */ - -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -/* - * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager? - * - * If TRUE, then the memory is allocated during initialization. - * If FALSE, then the memory is allocated during initialization. - * - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE - * or CPU_INSTALL_HARDWARE_INTERRUPT_STACK is TRUE. - * - */ - -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/* * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? @@ -728,18 +667,6 @@ void _CPU_ISR_install_vector( ); /* - * _CPU_Install_interrupt_stack - * - * This routine installs the hardware interrupt stack pointer. - * - * NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK - * is TRUE. - * - */ - -void _CPU_Install_interrupt_stack( void ); - -/* * _CPU_Thread_Idle_body * * This routine is the CPU dependent IDLE thread body. diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpu.h b/cpukit/score/cpu/i386/include/rtems/score/cpu.h index c22b42e54b..3f780dbcab 100644 --- a/cpukit/score/cpu/i386/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/i386/include/rtems/score/cpu.h @@ -50,14 +50,6 @@ extern "C" { #define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE /* - * i386 has an RTEMS allocated and managed interrupt stack. - */ - -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/* * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? diff --git a/cpukit/score/cpu/lm32/cpu.c b/cpukit/score/cpu/lm32/cpu.c index a9a90c245f..577f5cbb45 100644 --- a/cpukit/score/cpu/lm32/cpu.c +++ b/cpukit/score/cpu/lm32/cpu.c @@ -101,18 +101,6 @@ void _CPU_ISR_install_vector( } /* - * _CPU_Install_interrupt_stack - * - * LM32 Specific Information: - * - * XXX document implementation including references if appropriate - */ - -void _CPU_Install_interrupt_stack( void ) -{ -} - -/* * _CPU_Thread_Idle_body * * NOTES: diff --git a/cpukit/score/cpu/lm32/include/rtems/score/cpu.h b/cpukit/score/cpu/lm32/include/rtems/score/cpu.h index 77f3389f39..d5fd9cea85 100644 --- a/cpukit/score/cpu/lm32/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/lm32/include/rtems/score/cpu.h @@ -29,35 +29,6 @@ extern "C" { /* conditional compilation parameters */ /** - * Does RTEMS manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * If the CPU supports a dedicated interrupt stack in hardware, - * then it is generally the responsibility of the BSP to allocate it - * and set it up. - * - * If the CPU does not support a dedicated interrupt stack, then - * the porter has two options: (1) execute interrupts on the - * stack of the interrupted task, and (2) have RTEMS manage a dedicated - * interrupt stack. - * - * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE - -/** * Does the CPU follow the simple vectored interrupt model? * * If TRUE, then RTEMS allocates the vector table it internally manages. @@ -71,40 +42,6 @@ extern "C" { #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE /** - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * If TRUE, then it must be installed during initialization. - * If FALSE, then no installation is performed. - * - * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -/** - * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager? - * - * If TRUE, then the memory is allocated during initialization. - * If FALSE, then the memory is allocated during initialization. - * - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/** * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? @@ -426,21 +363,6 @@ extern Context_Control_fp _CPU_Null_fp_context; /** * @defgroup CPUInterrupt Processor Dependent Interrupt Management - * - * On some CPUs, RTEMS supports a software managed interrupt stack. - * This stack is allocated by the Interrupt Manager and the switch - * is performed in @ref _ISR_Handler. These variables contain pointers - * to the lowest and highest addresses in the chunk of memory allocated - * for the interrupt stack. Since it is unknown whether the stack - * grows up or down (in general), this give the CPU dependent - * code the option of picking the version it wants to use. - * - * NOTE: These two variables are required if the macro - * @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate */ /**@{**/ @@ -847,18 +769,6 @@ void _CPU_ISR_install_vector( proc_ptr *old_handler ); -/** - * This routine installs the hardware interrupt stack pointer. - * - * NOTE: It need only be provided if @ref CPU_HAS_HARDWARE_INTERRUPT_STACK - * is TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -void _CPU_Install_interrupt_stack( void ); - /** @} */ /** diff --git a/cpukit/score/cpu/lm32/irq.c b/cpukit/score/cpu/lm32/irq.c index be84d747b6..5d227cb2e4 100644 --- a/cpukit/score/cpu/lm32/irq.c +++ b/cpukit/score/cpu/lm32/irq.c @@ -21,9 +21,7 @@ #include <rtems/score/percpu.h> #include <rtems/score/threaddispatch.h> -#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) - unsigned long *_old_stack_ptr; -#endif +unsigned long *_old_stack_ptr; void *_exception_stack_frame; @@ -44,13 +42,11 @@ void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr) _Thread_Dispatch_disable(); -#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) if ( _ISR_Nest_level == 0 ) { /* Install irq stack */ _old_stack_ptr = stack_ptr; stack_ptr = _CPU_Interrupt_stack_high - 4; } -#endif _ISR_Nest_level++; @@ -64,10 +60,8 @@ void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr) _ISR_Nest_level--; -#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) if( _ISR_Nest_level == 0) stack_ptr = _old_stack_ptr; -#endif _Thread_Dispatch_unnest( _Per_CPU_Get() ); diff --git a/cpukit/score/cpu/m32c/cpu.c b/cpukit/score/cpu/m32c/cpu.c index 4592e8ced3..6b4f88634d 100644 --- a/cpukit/score/cpu/m32c/cpu.c +++ b/cpukit/score/cpu/m32c/cpu.c @@ -113,18 +113,6 @@ void _CPU_ISR_install_vector( } /* - * _CPU_Install_interrupt_stack - * - * NO_CPU Specific Information: - * - * XXX document implementation including references if appropriate - */ - -void _CPU_Install_interrupt_stack( void ) -{ -} - -/* * _CPU_Thread_Idle_body * * NOTES: diff --git a/cpukit/score/cpu/m32c/cpu_asm.c b/cpukit/score/cpu/m32c/cpu_asm.c index f992c57b3d..16a80b2963 100644 --- a/cpukit/score/cpu/m32c/cpu_asm.c +++ b/cpukit/score/cpu/m32c/cpu_asm.c @@ -73,10 +73,8 @@ void _ISR_Handler(void) * save some or all context on stack * may need to save some special interrupt information for exit * - * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) - * if ( _ISR_Nest_level == 0 ) - * switch to software interrupt stack - * #endif + * if ( _ISR_Nest_level == 0 ) + * switch to software interrupt stack * * _ISR_Nest_level++; * @@ -100,10 +98,8 @@ void _ISR_Handler(void) * return from interrupt (maybe to _ISR_Dispatch) * * LABEL "exit interrupt (simple case): - * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) - * if outermost interrupt - * restore stack - * #endif + * if outermost interrupt + * restore stack * prepare to get out of interrupt * return from interrupt */ diff --git a/cpukit/score/cpu/m32c/include/rtems/score/cpu.h b/cpukit/score/cpu/m32c/include/rtems/score/cpu.h index 3f23c21d88..74794fe6fe 100644 --- a/cpukit/score/cpu/m32c/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/m32c/include/rtems/score/cpu.h @@ -45,35 +45,6 @@ extern "C" { #define RTEMS_USE_16_BIT_OBJECT /** - * Does RTEMS manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * If the CPU supports a dedicated interrupt stack in hardware, - * then it is generally the responsibility of the BSP to allocate it - * and set it up. - * - * If the CPU does not support a dedicated interrupt stack, then - * the porter has two options: (1) execute interrupts on the - * stack of the interrupted task, and (2) have RTEMS manage a dedicated - * interrupt stack. - * - * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE - -/** * Does the CPU follow the simple vectored interrupt model? * * If TRUE, then RTEMS allocates the vector table it internally manages. @@ -87,40 +58,6 @@ extern "C" { #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE /** - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * If TRUE, then it must be installed during initialization. - * If FALSE, then no installation is performed. - * - * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_HAS_HARDWARE_INTERRUPT_STACK TRUE - -/** - * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager? - * - * If TRUE, then the memory is allocated during initialization. - * If FALSE, then the memory is allocated during initialization. - * - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/** * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? @@ -409,22 +346,6 @@ typedef struct { /** * @defgroup CPUInterrupt Processor Dependent Interrupt Management - * - * On some CPUs, RTEMS supports a software managed interrupt stack. - * This stack is allocated by the Interrupt Manager and the switch - * is performed in @ref _ISR_Handler. These variables contain pointers - * to the lowest and highest addresses in the chunk of memory allocated - * for the interrupt stack. Since it is unknown whether the stack - * grows up or down (in general), this give the CPU dependent - * code the option of picking the version it wants to use. - * - * NOTE: These two variables are required if the macro - * @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - * */ /**@{**/ @@ -836,20 +757,6 @@ void _CPU_ISR_install_vector( ); /** - * @ingroup CPUInterrupt - * - * This routine installs the hardware interrupt stack pointer. - * - * NOTE: It need only be provided if @ref CPU_HAS_HARDWARE_INTERRUPT_STACK - * is TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -void _CPU_Install_interrupt_stack( void ); - -/** * This routine is the CPU dependent IDLE thread body. * * NOTE: It need only be provided if @ref CPU_PROVIDES_IDLE_THREAD_BODY diff --git a/cpukit/score/cpu/m68k/cpu.c b/cpukit/score/cpu/m68k/cpu.c index c50a63fda1..77a91535c3 100644 --- a/cpukit/score/cpu/m68k/cpu.c +++ b/cpukit/score/cpu/m68k/cpu.c @@ -20,6 +20,7 @@ #include <rtems/score/isr.h> #include <rtems/score/percpu.h> #include <rtems/score/tls.h> +#include <rtems/config.h> #if ( M68K_HAS_VBR == 0 ) @@ -58,6 +59,15 @@ int (*_FPSP_install_raw_handler)( uint32_t _CPU_cacr_shadow; #endif +static void m68k_install_interrupt_stack( void ) +{ +#if ( M68K_HAS_SEPARATE_STACKS == 1 ) + uintptr_t isp = (uintptr_t) _Configuration_Interrupt_stack_area_end; + + __asm__ volatile ( "movec %0,%%isp" : "=r" (isp) : "0" (isp) ); +#endif +} + void _CPU_Initialize(void) { #if ( M68K_HAS_VBR == 0 ) @@ -74,6 +84,8 @@ void _CPU_Initialize(void) _CPU_ISR_jump_table[slot].isr_handler = (uint32_t) 0xDEADDEAD; } #endif /* M68K_HAS_VBR */ + + m68k_install_interrupt_stack(); } uint32_t _CPU_ISR_Get_level( void ) @@ -151,20 +163,6 @@ void _CPU_ISR_install_vector( _ISR_Vector_table[ vector ] = new_handler; } - -/* - * _CPU_Install_interrupt_stack - */ - -void _CPU_Install_interrupt_stack( void ) -{ -#if ( M68K_HAS_SEPARATE_STACKS == 1 ) - void *isp = _CPU_Interrupt_stack_high; - - __asm__ volatile ( "movec %0,%%isp" : "=r" (isp) : "0" (isp) ); -#endif -} - #if ( M68K_HAS_BFFFO != 1 ) /* * Returns table for duplication of the BFFFO instruction (16 bits only) diff --git a/cpukit/score/cpu/m68k/cpu_asm.S b/cpukit/score/cpu/m68k/cpu_asm.S index a31c1588a4..6ec89d8ee0 100644 --- a/cpukit/score/cpu/m68k/cpu_asm.S +++ b/cpukit/score/cpu/m68k/cpu_asm.S @@ -259,7 +259,7 @@ SYM (_ISR_Handler): andl #0x03fc,d0 | d0 = vector offset in vbr -#if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 ) +#if ( M68K_HAS_SEPARATE_STACKS == 0 ) | Make a0 point just above interrupt stack movel INTERRUPT_STACK_HIGH,a0 cmpl INTERRUPT_STACK_LOW,a7 | stack below interrupt stack? @@ -272,7 +272,7 @@ SYM (_ISR_Handler): movel a1,a7@- | store task stack pointer | on interrupt stack 2: -#endif /* CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 */ +#endif /* M68K_HAS_SEPARATE_STACKS == 0 */ addql #1,ISR_NEST_LEVEL | one nest level deeper @@ -285,14 +285,14 @@ SYM (_ISR_Handler): addql #4,a7 | remove vector number subql #1,ISR_NEST_LEVEL | Reduce interrupt-nesting count -#if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 ) +#if ( M68K_HAS_SEPARATE_STACKS == 0 ) movel INTERRUPT_STACK_HIGH,a0 subql #4,a0 cmpl a0,a7 | At top of interrupt stack? bne.b 1f | No, do not restore task stack pointer movel (a7),a7 | Restore task stack pointer 1: -#endif /* CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 */ +#endif /* M68K_HAS_SEPARATE_STACKS == 0 */ subql #1,THREAD_DISPATCH_DISABLE_LEVEL | unnest multitasking bne.b exit | If dispatch disabled, exit diff --git a/cpukit/score/cpu/m68k/include/rtems/score/cpu.h b/cpukit/score/cpu/m68k/include/rtems/score/cpu.h index 1b1b460901..9915f36434 100644 --- a/cpukit/score/cpu/m68k/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/m68k/include/rtems/score/cpu.h @@ -42,20 +42,6 @@ extern "C" { #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE /* - * Use the m68k's hardware interrupt stack support and have the - * interrupt manager allocate the memory for it. - */ - -#if ( M68K_HAS_SEPARATE_STACKS == 1) -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK 0 -#define CPU_HAS_HARDWARE_INTERRUPT_STACK 1 -#else -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK 1 -#define CPU_HAS_HARDWARE_INTERRUPT_STACK 0 -#endif -#define CPU_ALLOCATE_INTERRUPT_STACK 1 - -/* * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? @@ -615,14 +601,6 @@ void _CPU_ISR_install_vector( ); /* - * _CPU_Install_interrupt_stack - * - * This routine installs the hardware interrupt stack pointer. - */ - -void _CPU_Install_interrupt_stack( void ); - -/* * _CPU_Context_switch * * This routine switches from the run context to the heir context. diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c index fe89a10ec7..7f48d090f9 100644 --- a/cpukit/score/cpu/mips/cpu.c +++ b/cpukit/score/cpu/mips/cpu.c @@ -166,11 +166,6 @@ void _CPU_ISR_Set_level( uint32_t new_level ) mips_set_sr( sr ); } -void _CPU_Install_interrupt_stack( void ) -{ -/* we don't support this yet */ -} - void _CPU_Context_Initialize( Context_Control *the_context, uintptr_t *stack_base, diff --git a/cpukit/score/cpu/mips/cpu_asm.S b/cpukit/score/cpu/mips/cpu_asm.S index c58aee1e50..8a58831b92 100644 --- a/cpukit/score/cpu/mips/cpu_asm.S +++ b/cpukit/score/cpu/mips/cpu_asm.S @@ -872,10 +872,8 @@ _ISR_Handler_1: * save some or all context on stack * may need to save some special interrupt information for exit * - * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) - * if ( _ISR_Nest_level == 0 ) - * switch to software interrupt stack - * #endif + * if ( _ISR_Nest_level == 0 ) + * switch to software interrupt stack */ @@ -939,9 +937,7 @@ _ISR_Handler_1: /* - * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) - * restore stack - * #endif + * restore stack * * if !_Thread_Dispatch_necessary * goto the label "exit interrupt (simple case)" diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpu.h b/cpukit/score/cpu/mips/include/rtems/score/cpu.h index c20e5f4f01..df9f2b71b0 100644 --- a/cpukit/score/cpu/mips/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/mips/include/rtems/score/cpu.h @@ -62,32 +62,6 @@ extern "C" { /* conditional compilation parameters */ /* - * Does RTEMS manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in _Interrupt_Manager_initialization. - * If FALSE, nothing is done. - * - * If the CPU supports a dedicated interrupt stack in hardware, - * then it is generally the responsibility of the BSP to allocate it - * and set it up. - * - * If the CPU does not support a dedicated interrupt stack, then - * the porter has two options: (1) execute interrupts on the - * stack of the interrupted task, and (2) have RTEMS manage a dedicated - * interrupt stack. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - */ - -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE - -/* * Does the CPU follow the simple vectored interrupt model? * * If TRUE, then RTEMS allocates the vector table it internally manages. @@ -102,34 +76,6 @@ extern "C" { #define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE /* - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * If TRUE, then it must be installed during initialization. - * If FALSE, then no installation is performed. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - */ - -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -/* - * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager? - * - * If TRUE, then the memory is allocated during initialization. - * If FALSE, then the memory is allocated during initialization. - * - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE. - */ - -#define CPU_ALLOCATE_INTERRUPT_STACK FALSE - -/* * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? @@ -871,17 +817,6 @@ void _CPU_ISR_install_vector( ); /* - * _CPU_Install_interrupt_stack - * - * This routine installs the hardware interrupt stack pointer. - * - * NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK - * is TRUE. - */ - -void _CPU_Install_interrupt_stack( void ); - -/* * _CPU_Internal_threads_Idle_thread_body * * This routine is the CPU dependent IDLE thread body. diff --git a/cpukit/score/cpu/moxie/cpu.c b/cpukit/score/cpu/moxie/cpu.c index 2a0dc1e9fd..7fd21cd04c 100644 --- a/cpukit/score/cpu/moxie/cpu.c +++ b/cpukit/score/cpu/moxie/cpu.c @@ -105,13 +105,6 @@ void _CPU_ISR_install_vector( } /* - * _CPU_Install_interrupt_stack - */ -void _CPU_Install_interrupt_stack( void ) -{ -} - -/* * _CPU_Thread_Idle_body * * NOTES: diff --git a/cpukit/score/cpu/moxie/include/rtems/score/cpu.h b/cpukit/score/cpu/moxie/include/rtems/score/cpu.h index 9b6dbecc9c..4b6891f495 100644 --- a/cpukit/score/cpu/moxie/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/moxie/include/rtems/score/cpu.h @@ -38,35 +38,6 @@ extern "C" { #define RTEMS_USE_32_BIT_OBJECT /* - * Does RTEMS manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * If the CPU supports a dedicated interrupt stack in hardware, - * then it is generally the responsibility of the BSP to allocate it - * and set it up. - * - * If the CPU does not support a dedicated interrupt stack, then - * the porter has two options: (1) execute interrupts on the - * stack of the interrupted task, and (2) have RTEMS manage a dedicated - * interrupt stack. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * MOXIE Specific Information: - * - * XXX - */ -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE - -/* * Does the CPU follow the simple vectored interrupt model? * * If TRUE, then RTEMS allocates the vector table it internally manages. @@ -80,40 +51,6 @@ extern "C" { #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE /* - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * If TRUE, then it must be installed during initialization. - * If FALSE, then no installation is performed. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * MOXIE Specific Information: - * - * XXX - */ -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -/* - * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager? - * - * If TRUE, then the memory is allocated during initialization. - * If FALSE, then the memory is allocated during initialization. - * - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE. - * - * MOXIE Specific Information: - * - * XXX - */ -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/* * Does the CPU have hardware floating point? * * If TRUE, then the RTEMS_FLOATING_POINT task attribute is supported. @@ -679,20 +616,6 @@ void _CPU_ISR_install_vector( ); /* - * _CPU_Install_interrupt_stack - * - * This routine installs the hardware interrupt stack pointer. - * - * NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK - * is TRUE. - * - * MOXIE Specific Information: - * - * XXX - */ -void _CPU_Install_interrupt_stack( void ); - -/* * _CPU_Internal_threads_Idle_thread_body * * This routine is the CPU dependent IDLE thread body. diff --git a/cpukit/score/cpu/nios2/include/rtems/score/cpu.h b/cpukit/score/cpu/nios2/include/rtems/score/cpu.h index 3cc56e591b..ae1c027def 100644 --- a/cpukit/score/cpu/nios2/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/nios2/include/rtems/score/cpu.h @@ -27,8 +27,6 @@ extern "C" { #include <rtems/score/basedefs.h> #include <rtems/score/nios2.h> -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE - #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE #define CPU_INTERRUPT_NUMBER_OF_VECTORS 32 @@ -37,10 +35,6 @@ extern "C" { #define CPU_PROVIDES_ISR_IS_IN_PROGRESS TRUE -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - #define CPU_ISR_PASSES_FRAME_POINTER FALSE #define CPU_HARDWARE_FP FALSE diff --git a/cpukit/score/cpu/nios2/nios2-iic-irq.c b/cpukit/score/cpu/nios2/nios2-iic-irq.c index 99f1618f02..cec24fd5dc 100644 --- a/cpukit/score/cpu/nios2/nios2-iic-irq.c +++ b/cpukit/score/cpu/nios2/nios2-iic-irq.c @@ -32,9 +32,7 @@ * Upon entry, interrupts are disabled */ -#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) - unsigned long *_old_stack_ptr; -#endif +unsigned long *_old_stack_ptr; /* * Prototypes @@ -98,13 +96,11 @@ void __ISR_Handler(void) /* Interrupts are disabled upon entry to this Handler */ -#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) if ( _ISR_Nest_level == 0 ) { /* Install irq stack */ _old_stack_ptr = stack_ptr; stack_ptr = _CPU_Interrupt_stack_high - 4; } -#endif _ISR_Nest_level++; @@ -120,9 +116,7 @@ void __ISR_Handler(void) _ISR_Nest_level--; if( _ISR_Nest_level == 0) { -#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) stack_ptr = _old_stack_ptr; -#endif if( _Thread_Dispatch_is_enabled() ) { diff --git a/cpukit/score/cpu/no_cpu/cpu.c b/cpukit/score/cpu/no_cpu/cpu.c index 88bd413f21..fe1e303320 100644 --- a/cpukit/score/cpu/no_cpu/cpu.c +++ b/cpukit/score/cpu/no_cpu/cpu.c @@ -87,18 +87,6 @@ void _CPU_ISR_install_vector( } /* - * _CPU_Install_interrupt_stack - * - * NO_CPU Specific Information: - * - * XXX document implementation including references if appropriate - */ - -void _CPU_Install_interrupt_stack( void ) -{ -} - -/* * _CPU_Thread_Idle_body * * NOTES: diff --git a/cpukit/score/cpu/no_cpu/cpu_asm.c b/cpukit/score/cpu/no_cpu/cpu_asm.c index 4e56960168..359bee3367 100644 --- a/cpukit/score/cpu/no_cpu/cpu_asm.c +++ b/cpukit/score/cpu/no_cpu/cpu_asm.c @@ -151,10 +151,8 @@ void _ISR_Handler(void) * save some or all context on stack * may need to save some special interrupt information for exit * - * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) - * if ( _ISR_Nest_level == 0 ) - * switch to software interrupt stack - * #endif + * if ( _ISR_Nest_level == 0 ) + * switch to software interrupt stack * * _ISR_Nest_level++; * @@ -178,10 +176,8 @@ void _ISR_Handler(void) * return from interrupt (maybe to _ISR_Dispatch) * * LABEL "exit interrupt (simple case): - * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) - * if outermost interrupt - * restore stack - * #endif + * if outermost interrupt + * restore stack * prepare to get out of interrupt * return from interrupt */ diff --git a/cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h index c843e2661a..2cbad57843 100644 --- a/cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h @@ -46,35 +46,6 @@ extern "C" { /* conditional compilation parameters */ /** - * Does RTEMS manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * If the CPU supports a dedicated interrupt stack in hardware, - * then it is generally the responsibility of the BSP to allocate it - * and set it up. - * - * If the CPU does not support a dedicated interrupt stack, then - * the porter has two options: (1) execute interrupts on the - * stack of the interrupted task, and (2) have RTEMS manage a dedicated - * interrupt stack. - * - * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE - -/** * Does the CPU follow the simple vectored interrupt model? * * If TRUE, then RTEMS allocates the vector table it internally manages. @@ -88,40 +59,6 @@ extern "C" { #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE /** - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * If TRUE, then it must be installed during initialization. - * If FALSE, then no installation is performed. - * - * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_HAS_HARDWARE_INTERRUPT_STACK TRUE - -/** - * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager? - * - * If TRUE, then the memory is allocated during initialization. - * If FALSE, then the memory is allocated during initialization. - * - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/** * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? @@ -521,16 +458,13 @@ extern Context_Control_fp _CPU_Null_fp_context; /** * @defgroup CPUInterrupt Processor Dependent Interrupt Management * - * On some CPUs, RTEMS supports a software managed interrupt stack. - * This stack is allocated by the Interrupt Manager and the switch - * is performed in @ref _ISR_Handler. These variables contain pointers - * to the lowest and highest addresses in the chunk of memory allocated - * for the interrupt stack. Since it is unknown whether the stack - * grows up or down (in general), this give the CPU dependent - * code the option of picking the version it wants to use. - * - * NOTE: These two variables are required if the macro - * @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE. + * RTEMS supports a software managed interrupt stack. The interrupt stacks + * are statically allocated by <rtems/confdefs.h> and the switch is performed + * by hardware or the interrupt processing code. These variables contain + * pointers to the lowest and highest addresses in the chunk of memory + * allocated for the interrupt stack. Since it is unknown whether the stack + * grows up or down (in general), this give the CPU dependent code the option + * of picking the version it wants to use. * * Port Specific Information: * @@ -1126,19 +1060,6 @@ void _CPU_ISR_install_vector( ); /** - * @ingroup CPUInterrupt - * This routine installs the hardware interrupt stack pointer. - * - * NOTE: It need only be provided if @ref CPU_HAS_HARDWARE_INTERRUPT_STACK - * is TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -void _CPU_Install_interrupt_stack( void ); - -/** * This routine is the CPU dependent IDLE thread body. * * NOTE: It need only be provided if @ref CPU_PROVIDES_IDLE_THREAD_BODY diff --git a/cpukit/score/cpu/or1k/cpu.c b/cpukit/score/cpu/or1k/cpu.c index fe933f0cbb..b4cbe00f9b 100644 --- a/cpukit/score/cpu/or1k/cpu.c +++ b/cpukit/score/cpu/or1k/cpu.c @@ -105,10 +105,6 @@ void _CPU_ISR_install_vector( _ISR_Local_enable( level ); } -void _CPU_Install_interrupt_stack( void ) -{ -} - void *_CPU_Thread_Idle_body( uintptr_t ignored ) { do { diff --git a/cpukit/score/cpu/or1k/include/rtems/score/cpu.h b/cpukit/score/cpu/or1k/include/rtems/score/cpu.h index 4f8df4a7f0..bd1b6bc1a0 100644 --- a/cpukit/score/cpu/or1k/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/or1k/include/rtems/score/cpu.h @@ -40,67 +40,6 @@ extern "C" { /* conditional compilation parameters */ /* - * Does RTEMS manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * If the CPU supports a dedicated interrupt stack in hardware, - * then it is generally the responsibility of the BSP to allocate it - * and set it up. - * - * If the CPU does not support a dedicated interrupt stack, then - * the porter has two options: (1) execute interrupts on the - * stack of the interrupted task, and (2) have RTEMS manage a dedicated - * interrupt stack. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * Currently, for or1k port, _ISR_Handler is responsible for switching to - * RTEMS dedicated interrupt task. - * - */ - -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE - -/* - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * If TRUE, then it must be installed during initialization. - * If FALSE, then no installation is performed. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - */ - -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -/* - * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager? - * - * If TRUE, then the memory is allocated during initialization. - * If FALSE, then the memory is allocated during initialization. - * - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE - * or CPU_INSTALL_HARDWARE_INTERRUPT_STACK is TRUE. - * - */ - -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/* * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? @@ -736,18 +675,6 @@ void _CPU_ISR_install_vector( ); /* - * _CPU_Install_interrupt_stack - * - * This routine installs the hardware interrupt stack pointer. - * - * NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK - * is TRUE. - * - */ - -void _CPU_Install_interrupt_stack( void ); - -/* * _CPU_Thread_Idle_body * * This routine is the CPU dependent IDLE thread body. diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h index 65f31ddb6c..8a17af287c 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h @@ -473,60 +473,6 @@ typedef struct { #define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE /* - * Does RTEMS manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * If the CPU supports a dedicated interrupt stack in hardware, - * then it is generally the responsibility of the BSP to allocate it - * and set it up. - * - * If the CPU does not support a dedicated interrupt stack, then - * the porter has two options: (1) execute interrupts on the - * stack of the interrupted task, and (2) have RTEMS manage a dedicated - * interrupt stack. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - */ - -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE - -/* - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * If TRUE, then it must be installed during initialization. - * If FALSE, then no installation is performed. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - */ - -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -/* - * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager? - * - * If TRUE, then the memory is allocated during initialization. - * If FALSE, then the memory is allocated during initialization. - * - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE. - */ - -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/* * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? diff --git a/cpukit/score/cpu/riscv/cpu.c b/cpukit/score/cpu/riscv/cpu.c index 8d2926e715..fbdb4c5238 100644 --- a/cpukit/score/cpu/riscv/cpu.c +++ b/cpukit/score/cpu/riscv/cpu.c @@ -110,11 +110,6 @@ void _CPU_ISR_install_vector( } -void _CPU_Install_interrupt_stack( void ) -{ - /* Do nothing */ -} - void *_CPU_Thread_Idle_body( uintptr_t ignored ) { do { diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h index 2b3b60937e..1e72dd3709 100644 --- a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h @@ -50,9 +50,6 @@ extern "C" { #define CPU_INLINE_ENABLE_DISPATCH FALSE #define CPU_UNROLL_ENQUEUE_PRIORITY TRUE -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE #define CPU_ISR_PASSES_FRAME_POINTER 1 #define CPU_HARDWARE_FP FALSE #define CPU_SOFTWARE_FP FALSE @@ -351,18 +348,6 @@ void _CPU_ISR_install_vector( ); /* - * _CPU_Install_interrupt_stack - * - * This routine installs the hardware interrupt stack pointer. - * - * NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK - * is TRUE. - * - */ - -void _CPU_Install_interrupt_stack( void ); - -/* * _CPU_Thread_Idle_body * * This routine is the CPU dependent IDLE thread body. diff --git a/cpukit/score/cpu/sh/include/rtems/score/cpu.h b/cpukit/score/cpu/sh/include/rtems/score/cpu.h index d3c9bc6d39..3952abeae5 100644 --- a/cpukit/score/cpu/sh/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/sh/include/rtems/score/cpu.h @@ -50,38 +50,6 @@ extern "C" { #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE /* - * Does RTEMS manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * If the CPU supports a dedicated interrupt stack in hardware, - * then it is generally the responsibility of the BSP to allocate it - * and set it up. - * - * If the CPU does not support a dedicated interrupt stack, then - * the porter has two options: (1) execute interrupts on the - * stack of the interrupted task, and (2) have RTEMS manage a dedicated - * interrupt stack. - * - * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - */ - -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -/* - * We define the interrupt stack in the linker script - */ -#define CPU_ALLOCATE_INTERRUPT_STACK FALSE - -/* * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? @@ -641,17 +609,6 @@ void _CPU_ISR_install_vector( ); /* - * _CPU_Install_interrupt_stack - * - * This routine installs the hardware interrupt stack pointer. - * - * NOTE: It needs only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK - * is TRUE. - */ - -void _CPU_Install_interrupt_stack( void ); - -/* * _CPU_Thread_Idle_body * * This routine is the CPU dependent IDLE thread body. diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h index 16618e7b49..9b32f76338 100644 --- a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h @@ -69,17 +69,6 @@ extern "C" { #endif /** - * Does the executive manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * The SPARC does not have a dedicated HW interrupt stack and one has - * been implemented in SW. - */ -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE - -/** * Does the CPU follow the simple vectored interrupt model? * * - If TRUE, then RTEMS allocates the vector table it internally manages. @@ -92,29 +81,6 @@ extern "C" { #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE /** - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * - If TRUE, then it must be installed during initialization. - * - If FALSE, then no installation is performed. - * - * The SPARC does not have a dedicated HW interrupt stack. - */ -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -/** - * Do we allocate a dedicated interrupt stack in the Interrupt Manager? - * - * - If TRUE, then the memory is allocated during initialization. - * - If FALSE, then the memory is allocated during initialization. - * - * The SPARC does not have hardware support for switching to a - * dedicated interrupt stack. The port includes support for doing this - * in software. - * - */ -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/** * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? diff --git a/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h b/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h index feb7752915..3172802046 100644 --- a/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h @@ -34,18 +34,6 @@ extern "C" { /* conditional compilation parameters */ /* - * Does the executive manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * The SPARC does not have a dedicated HW interrupt stack and one has - * been implemented in SW. - */ - -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE - -/* * Does the CPU follow the simple vectored interrupt model? * * If TRUE, then RTEMS allocates the vector table it internally manages. @@ -59,26 +47,6 @@ extern "C" { #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE /* - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * If TRUE, then it must be installed during initialization. - * If FALSE, then no installation is performed. - * - * The SPARC does not have a dedicated HW interrupt stack. - */ - -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -/* - * Do we allocate a dedicated interrupt stack in the Interrupt Manager? - * - * If TRUE, then the memory is allocated during initialization. - * If FALSE, then the memory is allocated during initialization. - */ - -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/* * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector * number (0)? diff --git a/cpukit/score/cpu/v850/cpu_asm.S b/cpukit/score/cpu/v850/cpu_asm.S index 328c71cea2..e9aa738d13 100644 --- a/cpukit/score/cpu/v850/cpu_asm.S +++ b/cpukit/score/cpu/v850/cpu_asm.S @@ -138,76 +138,3 @@ restore: __CPU_Context_restore: mov r6, r7 /* move to second parameter register */ br restore - -#if 0 -/** - * This routine provides the RTEMS interrupt management. - * - * v850 Specific Information: - * - * XXX document implementation including references if appropriate - */ -void _ISR_Handler(void); /* C warning avoidance */ -void _ISR_Handler(void) -{ - /* - * This discussion ignores a lot of the ugly details in a real - * implementation such as saving enough registers/state to be - * able to do something real. Keep in mind that the goal is - * to invoke a user's ISR handler which is written in C and - * uses a certain set of registers. - * - * Also note that the exact order is to a large extent flexible. - * Hardware will dictate a sequence for a certain subset of - * _ISR_Handler while requirements for setting - */ - - /* - * At entry to "common" _ISR_Handler, the vector number must be - * available. On some CPUs the hardware puts either the vector - * number or the offset into the vector table for this ISR in a - * known place. If the hardware does not give us this information, - * then the assembly portion of RTEMS for this port will contain - * a set of distinct interrupt entry points which somehow place - * the vector number in a known place (which is safe if another - * interrupt nests this one) and branches to _ISR_Handler. - * - * save some or all context on stack - * may need to save some special interrupt information for exit - * - * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) - * if ( _ISR_Nest_level == 0 ) - * switch to software interrupt stack - * #endif - * - * _ISR_Nest_level++; - * - * _Thread_Dispatch_disable_level++; - * - * (*_ISR_Vector_table[ vector ])( vector ); - * - * _Thread_Dispatch_disable_level--; - * - * --_ISR_Nest_level; - * - * if ( _ISR_Nest_level ) - * goto the label "exit interrupt (simple case)" - * - * if ( _Thread_Dispatch_disable_level ) - * goto the label "exit interrupt (simple case)" - * - * if ( _Thread_Dispatch_necessary ) { - * call _Thread_Dispatch() or prepare to return to _ISR_Dispatch - * prepare to get out of interrupt - * return from interrupt (maybe to _ISR_Dispatch) - * - * LABEL "exit interrupt (simple case): - * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) - * if outermost interrupt - * restore stack - * #endif - * prepare to get out of interrupt - * return from interrupt - */ -} -#endif diff --git a/cpukit/score/cpu/v850/include/rtems/score/cpu.h b/cpukit/score/cpu/v850/include/rtems/score/cpu.h index dbae3c4234..f19efa9bec 100644 --- a/cpukit/score/cpu/v850/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/v850/include/rtems/score/cpu.h @@ -29,35 +29,6 @@ extern "C" { /* conditional compilation parameters */ /** - * Does RTEMS manage a dedicated interrupt stack in software? - * - * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization. - * If FALSE, nothing is done. - * - * If the CPU supports a dedicated interrupt stack in hardware, - * then it is generally the responsibility of the BSP to allocate it - * and set it up. - * - * If the CPU does not support a dedicated interrupt stack, then - * the porter has two options: (1) execute interrupts on the - * stack of the interrupted task, and (2) have RTEMS manage a dedicated - * interrupt stack. - * - * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * Port Specific Information: - * - * The v850 does not have support for a hardware interrupt stack. - */ -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE - -/** * Does the CPU follow the simple vectored interrupt model? * * If TRUE, then RTEMS allocates the vector table it internally manages. @@ -71,40 +42,6 @@ extern "C" { #define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE /** - * Does this CPU have hardware support for a dedicated interrupt stack? - * - * If TRUE, then it must be installed during initialization. - * If FALSE, then no installation is performed. - * - * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE. - * - * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and - * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is - * possible that both are FALSE for a particular CPU. Although it - * is unclear what that would imply about the interrupt processing - * procedure on that CPU. - * - * Port Specific Information: - * - * The v850 does not have support for a hardware interrupt stack. - */ -#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE - -/** - * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager? - * - * If TRUE, then the memory is allocated during initialization. - * If FALSE, then the memory is allocated during initialization. - * - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/** * @def CPU_HARDWARE_FP * * Does the CPU have hardware floating point? @@ -389,21 +326,6 @@ typedef struct { /** * @defgroup CPUInterrupt Processor Dependent Interrupt Management - * - * On some CPUs, RTEMS supports a software managed interrupt stack. - * This stack is allocated by the Interrupt Manager and the switch - * is performed in @ref _ISR_Handler. These variables contain pointers - * to the lowest and highest addresses in the chunk of memory allocated - * for the interrupt stack. Since it is unknown whether the stack - * grows up or down (in general), this give the CPU dependent - * code the option of picking the version it wants to use. - * - * @note These two variables are required if the macro - * @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate */ /**@{**/ diff --git a/cpukit/score/src/isr.c b/cpukit/score/src/isr.c index 1078ef6f63..3bda275b07 100644 --- a/cpukit/score/src/isr.c +++ b/cpukit/score/src/isr.c @@ -23,7 +23,6 @@ #include <rtems/score/interr.h> #include <rtems/score/percpu.h> #include <rtems/score/stackimpl.h> -#include <rtems/score/wkspace.h> #include <rtems/config.h> #if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE) @@ -36,51 +35,48 @@ void _ISR_Handler_initialization( void ) { + uint32_t cpu_max; + uint32_t cpu_index; + size_t stack_size; + char *stack_low; + _ISR_Nest_level = 0; #if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE) _CPU_Initialize_vectors(); #endif -#if ( CPU_ALLOCATE_INTERRUPT_STACK == TRUE ) - { - size_t stack_size = rtems_configuration_get_interrupt_stack_size(); - uint32_t cpu_max = rtems_configuration_get_maximum_processors(); - uint32_t cpu_index; + stack_size = rtems_configuration_get_interrupt_stack_size(); - if ( !_Stack_Is_enough( stack_size ) ) - _Internal_error( INTERNAL_ERROR_INTERRUPT_STACK_TOO_SMALL ); + if ( !_Stack_Is_enough( stack_size ) ) + _Internal_error( INTERNAL_ERROR_INTERRUPT_STACK_TOO_SMALL ); - for ( cpu_index = 0 ; cpu_index < cpu_max; ++cpu_index ) { - Per_CPU_Control *cpu = _Per_CPU_Get_by_index( cpu_index ); - void *low = _Workspace_Allocate_or_fatal_error( stack_size ); - void *high = _Addresses_Add_offset( low, stack_size ); + cpu_max = rtems_configuration_get_maximum_processors(); + stack_low = _Configuration_Interrupt_stack_area_begin; -#if (CPU_STACK_ALIGNMENT != 0) - high = _Addresses_Align_down( high, CPU_STACK_ALIGNMENT ); -#endif + for ( cpu_index = 0 ; cpu_index < cpu_max; ++cpu_index ) { + Per_CPU_Control *cpu; + char *stack_high; - cpu->interrupt_stack_low = low; - cpu->interrupt_stack_high = high; + cpu = _Per_CPU_Get_by_index( cpu_index ); + stack_high = _Addresses_Add_offset( stack_low, stack_size ); - /* - * Interrupt stack might have to be aligned and/or setup in a specific - * way. Do not use the local low or high variables here since - * _CPU_Interrupt_stack_setup() is a nasty macro that might want to play - * with the real memory locations. - */ -#if defined(_CPU_Interrupt_stack_setup) - _CPU_Interrupt_stack_setup( - cpu->interrupt_stack_low, - cpu->interrupt_stack_high - ); -#endif - } - } + cpu->interrupt_stack_low = stack_low; + cpu->interrupt_stack_high = stack_high; + /* + * Interrupt stack might have to be aligned and/or setup in a specific + * way. Do not use the local low or high variables here since + * _CPU_Interrupt_stack_setup() is a nasty macro that might want to play + * with the real memory locations. + */ +#if defined(_CPU_Interrupt_stack_setup) + _CPU_Interrupt_stack_setup( + cpu->interrupt_stack_low, + cpu->interrupt_stack_high + ); #endif -#if ( CPU_HAS_HARDWARE_INTERRUPT_STACK == TRUE ) - _CPU_Install_interrupt_stack(); -#endif + stack_low = stack_high; + } } diff --git a/cpukit/score/src/percpuasm.c b/cpukit/score/src/percpuasm.c index 2908643f6c..ccd101a929 100644 --- a/cpukit/score/src/percpuasm.c +++ b/cpukit/score/src/percpuasm.c @@ -122,17 +122,14 @@ RTEMS_STATIC_ASSERT( ); #endif -#if CPU_ALLOCATE_INTERRUPT_STACK == TRUE \ - || CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE - RTEMS_STATIC_ASSERT( - offsetof(Per_CPU_Control, interrupt_stack_low) - == PER_CPU_INTERRUPT_STACK_LOW, - PER_CPU_INTERRUPT_STACK_LOW - ); +RTEMS_STATIC_ASSERT( + offsetof(Per_CPU_Control, interrupt_stack_low) + == PER_CPU_INTERRUPT_STACK_LOW, + PER_CPU_INTERRUPT_STACK_LOW +); - RTEMS_STATIC_ASSERT( - offsetof(Per_CPU_Control, interrupt_stack_high) - == PER_CPU_INTERRUPT_STACK_HIGH, - PER_CPU_INTERRUPT_STACK_HIGH - ); -#endif +RTEMS_STATIC_ASSERT( + offsetof(Per_CPU_Control, interrupt_stack_high) + == PER_CPU_INTERRUPT_STACK_HIGH, + PER_CPU_INTERRUPT_STACK_HIGH +); diff --git a/testsuites/sptests/spfatal07/testcase.h b/testsuites/sptests/spfatal07/testcase.h index e84796324e..156f9b55e2 100644 --- a/testsuites/sptests/spfatal07/testcase.h +++ b/testsuites/sptests/spfatal07/testcase.h @@ -9,28 +9,6 @@ * http://www.rtems.org/license/LICENSE. */ -#include <rtems/bspIo.h> - -/* - * Way too much stack space. Should generate a fatal error - * on the init task create. - */ -#define CONFIGURE_HAS_OWN_INIT_TASK_TABLE -#define CONFIGURE_INIT_TASK_STACK_SIZE RTEMS_MINIMUM_STACK_SIZE -rtems_initialization_tasks_table Initialization_tasks[] = { - { rtems_build_name('I', 'N', 'I', ' '), - RTEMS_MINIMUM_STACK_SIZE, - 1, - RTEMS_DEFAULT_ATTRIBUTES, - Init, - RTEMS_DEFAULT_MODES, - 0 - } -}; -#define CONFIGURE_INIT_TASK_TABLE Initialization_tasks -#define CONFIGURE_INIT_TASK_TABLE_SIZE \ - sizeof(CONFIGURE_INIT_TASK_TABLE) / sizeof(rtems_initialization_tasks_table) - #define FATAL_ERROR_TEST_NAME "7" #define FATAL_ERROR_DESCRIPTION \ "Core Configuration Invalid ISR stack size" @@ -38,20 +16,9 @@ rtems_initialization_tasks_table Initialization_tasks[] = { #define FATAL_ERROR_EXPECTED_ERROR \ INTERNAL_ERROR_INTERRUPT_STACK_TOO_SMALL -#if CPU_ALLOCATE_INTERRUPT_STACK == TRUE - #define CONFIGURE_INTERRUPT_STACK_SIZE (STACK_MINIMUM_SIZE - 1) -#endif +#define CONFIGURE_INTERRUPT_STACK_SIZE CPU_INTERRUPT_STACK_ALIGNMENT void force_error() { - #if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) - /* we will not run this far */ - #else - printk( - "WARNING - Test not applicable on this target architecture.\n" - "WARNING - Only applicable when CPU_ALLOCATE_INTERRUPT_STACK == TRUE.\n" - ); - TEST_END(); - rtems_test_exit(0); - #endif + /* we will not run this far */ } diff --git a/testsuites/sptests/spsize/size.c b/testsuites/sptests/spsize/size.c index 7b7b3a5dbb..951cdd7414 100644 --- a/testsuites/sptests/spsize/size.c +++ b/testsuites/sptests/spsize/size.c @@ -391,10 +391,8 @@ uninitialized = /* cpu.h */ uninitialized += (sizeof _CPU_Null_fp_context); -#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) uninitialized += (sizeof _CPU_Interrupt_stack_low) + (sizeof _CPU_Interrupt_stack_high); -#endif #endif |