summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog9
-rw-r--r--c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S46
-rw-r--r--c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S7
3 files changed, 59 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog b/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog
index 3aa7bbe5c3..8060b2b0e7 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog
@@ -1,5 +1,14 @@
2001-01-16 Eric Valette <valette@crt.canon.fr>
+ * vector/vector.S, irq/irq_asm.S: Make sure vectors work properly
+ in RAM and Flash based code. The code executed for the Flash
+ version runs in both cases (code in Flash/code in RAM) but as it
+ is less efficient than the one optimized for RAM, it put it inside
+ ifdef. A compilation error is generated if code is linked in Flash
+ with the correct ifdef set...
+
+2001-01-16 Eric Valette <valette@crt.canon.fr>
+
* irq/irq.c: Correct minor bug in mbx8xx interrupt handling.
Quoting Eric, "In theory it should be applied in each mpc8xx
related BSP but as I cannot test it plase maintainer/users
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
index 914ab67a4d..01e02f4027 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
@@ -35,8 +35,26 @@ SYM (decrementer_exception_vector_prolog_code):
*/
stwu r1, - (EXCEPTION_FRAME_END)(r1)
stw r4, GPR4_OFFSET(r1)
+#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
+ /*
+ * save link register
+ */
+ mflr r4
+ stw r4, EXC_LR_OFFSET(r1)
+ /*
+ * make link register contain shared_raw_irq_code_entry
+ * address
+ */
+ lis r4,shared_raw_irq_code_entry@h
+ ori r4,r4,shared_raw_irq_code_entry@l
+ mtlr r4
+
+ li r4, ASM_DEC_VECTOR
+ blr
+#else
li r4, ASM_DEC_VECTOR
ba shared_raw_irq_code_entry
+#endif
PUBLIC_VAR (decrementer_exception_vector_prolog_code_size)
@@ -50,9 +68,27 @@ SYM (external_exception_vector_prolog_code):
*/
stwu r1, - (EXCEPTION_FRAME_END)(r1)
stw r4, GPR4_OFFSET(r1)
+#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
+ /*
+ * save link register
+ */
+ mflr r4
+ stw r4, EXC_LR_OFFSET(r1)
+ /*
+ * make link register contain shared_raw_irq_code_entry
+ * address
+ */
+ lis r4,shared_raw_irq_code_entry@h
+ ori r4,r4,shared_raw_irq_code_entry@l
+ mtlr r4
+
+ li r4, ASM_EXT_VECTOR
+ blr
+#else
li r4, ASM_EXT_VECTOR
ba shared_raw_irq_code_entry
-
+#endif
+
PUBLIC_VAR (external_exception_vector_prolog_code_size)
external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code
@@ -116,13 +152,17 @@ SYM (shared_raw_irq_code_entry):
mfcr r5
mfctr r6
mfxer r7
+#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
mflr r8
-
+#endif
+
stw r5, EXC_CR_OFFSET(r1)
stw r6, EXC_CTR_OFFSET(r1)
stw r7, EXC_XER_OFFSET(r1)
+#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
stw r8, EXC_LR_OFFSET(r1)
-
+#endif
+
/*
* Add some non volatile registers to store information
* that will be used when returning from C handler
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S b/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S
index a056fab3ce..291a70a0b7 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S
@@ -43,7 +43,14 @@ SYM (default_exception_vector_code_prolog):
* r3 = r3 >> 8 = vector
*/
srwi r3,r3,8
+#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
+ lis r2,push_normalized_frame@h
+ ori r2,r2,push_normalized_frame@l
+ mtlr r2
+ blr
+#else
ba push_normalized_frame
+#endif
PUBLIC_VAR (default_exception_vector_code_prolog_size)