diff options
| -rw-r--r-- | c/src/exec/score/cpu/mips/ChangeLog | 7 | ||||
| -rw-r--r-- | cpukit/score/cpu/mips/ChangeLog | 7 |
2 files changed, 14 insertions, 0 deletions
diff --git a/c/src/exec/score/cpu/mips/ChangeLog b/c/src/exec/score/cpu/mips/ChangeLog index 27a75e7b84..5be34d5eb3 100644 --- a/c/src/exec/score/cpu/mips/ChangeLog +++ b/c/src/exec/score/cpu/mips/ChangeLog @@ -1,3 +1,10 @@ +2000-05-24 Joel Sherrill <joel@OARcorp.com> + + * rtems/score/mips.h: Added constants for MIPS exception numbers. + All exceptions should be given low numbers and thus can be installed + and processed in a uniform manner. Variances between various MIPS + ISA levels were not accounted for. + 2001-05-24 Greg Menke <gregory.menke@gsfc.nasa.gov> * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog index 27a75e7b84..5be34d5eb3 100644 --- a/cpukit/score/cpu/mips/ChangeLog +++ b/cpukit/score/cpu/mips/ChangeLog @@ -1,3 +1,10 @@ +2000-05-24 Joel Sherrill <joel@OARcorp.com> + + * rtems/score/mips.h: Added constants for MIPS exception numbers. + All exceptions should be given low numbers and thus can be installed + and processed in a uniform manner. Variances between various MIPS + ISA levels were not accounted for. + 2001-05-24 Greg Menke <gregory.menke@gsfc.nasa.gov> * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. |